1 /* 2 * Distributed under the Boost Software License, Version 1.0. 3 * (See accompanying file LICENSE_1_0.txt or copy at 4 * http://www.boost.org/LICENSE_1_0.txt) 5 * 6 * Copyright (c) 2020 Andrey Semashev 7 */ 8 /*! 9 * \file atomic/detail/fence_arch_ops_gcc_ppc.hpp 10 * 11 * This header contains implementation of the \c fence_arch_operations struct. 12 */ 13 14 #ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_ 15 #define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_ 16 17 #include <boost/memory_order.hpp> 18 #include <boost/atomic/detail/config.hpp> 19 #include <boost/atomic/detail/header.hpp> 20 21 #ifdef BOOST_HAS_PRAGMA_ONCE 22 #pragma once 23 #endif 24 25 namespace boost { 26 namespace atomics { 27 namespace detail { 28 29 //! Fence operations for PowerPC 30 struct fence_arch_operations_gcc_ppc 31 { thread_fenceboost::atomics::detail::fence_arch_operations_gcc_ppc32 static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT 33 { 34 if (order != memory_order_relaxed) 35 { 36 #if defined(__powerpc64__) || defined(__PPC64__) 37 if (order != memory_order_seq_cst) 38 __asm__ __volatile__ ("lwsync" ::: "memory"); 39 else 40 __asm__ __volatile__ ("sync" ::: "memory"); 41 #else 42 __asm__ __volatile__ ("sync" ::: "memory"); 43 #endif 44 } 45 } 46 signal_fenceboost::atomics::detail::fence_arch_operations_gcc_ppc47 static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT 48 { 49 if (order != memory_order_relaxed) 50 { 51 #if defined(__ibmxl__) || defined(__IBMCPP__) 52 __fence(); 53 #else 54 __asm__ __volatile__ ("" ::: "memory"); 55 #endif 56 } 57 } 58 }; 59 60 typedef fence_arch_operations_gcc_ppc fence_arch_operations; 61 62 } // namespace detail 63 } // namespace atomics 64 } // namespace boost 65 66 #include <boost/atomic/detail/footer.hpp> 67 68 #endif // BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_ 69