1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines wrappers for the Target class and related global 11 // functionality. This makes it easier to access the data and provides a single 12 // place that needs to check it for validity. All of these classes throw 13 // exceptions on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #ifndef CODEGEN_TARGET_H 18 #define CODEGEN_TARGET_H 19 20 #include "CodeGenRegisters.h" 21 #include "CodeGenInstruction.h" 22 #include "Record.h" 23 #include "llvm/Support/raw_ostream.h" 24 #include <algorithm> 25 26 namespace llvm { 27 28 struct CodeGenRegister; 29 class CodeGenTarget; 30 31 // SelectionDAG node properties. 32 // SDNPMemOperand: indicates that a node touches memory and therefore must 33 // have an associated memory operand that describes the access. 34 enum SDNP { 35 SDNPCommutative, 36 SDNPAssociative, 37 SDNPHasChain, 38 SDNPOutFlag, 39 SDNPInFlag, 40 SDNPOptInFlag, 41 SDNPMayLoad, 42 SDNPMayStore, 43 SDNPSideEffect, 44 SDNPMemOperand, 45 SDNPVariadic 46 }; 47 48 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 49 /// record corresponds to. 50 MVT::SimpleValueType getValueType(Record *Rec); 51 52 std::string getName(MVT::SimpleValueType T); 53 std::string getEnumName(MVT::SimpleValueType T); 54 55 /// getQualifiedName - Return the name of the specified record, with a 56 /// namespace qualifier if the record contains one. 57 std::string getQualifiedName(const Record *R); 58 59 /// CodeGenTarget - This class corresponds to the Target class in the .td files. 60 /// 61 class CodeGenTarget { 62 Record *TargetRec; 63 64 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions; 65 mutable std::vector<CodeGenRegister> Registers; 66 mutable std::vector<Record*> SubRegIndices; 67 mutable std::vector<CodeGenRegisterClass> RegisterClasses; 68 mutable std::vector<MVT::SimpleValueType> LegalValueTypes; 69 void ReadRegisters() const; 70 void ReadSubRegIndices() const; 71 void ReadRegisterClasses() const; 72 void ReadInstructions() const; 73 void ReadLegalValueTypes() const; 74 75 mutable std::vector<const CodeGenInstruction*> InstrsByEnum; 76 public: 77 CodeGenTarget(); 78 getTargetRecord()79 Record *getTargetRecord() const { return TargetRec; } 80 const std::string &getName() const; 81 82 /// getInstNamespace - Return the target-specific instruction namespace. 83 /// 84 std::string getInstNamespace() const; 85 86 /// getInstructionSet - Return the InstructionSet object. 87 /// 88 Record *getInstructionSet() const; 89 90 /// getAsmParser - Return the AssemblyParser definition for this target. 91 /// 92 Record *getAsmParser() const; 93 94 /// getAsmWriter - Return the AssemblyWriter definition for this target. 95 /// 96 Record *getAsmWriter() const; 97 getRegisters()98 const std::vector<CodeGenRegister> &getRegisters() const { 99 if (Registers.empty()) ReadRegisters(); 100 return Registers; 101 } 102 getSubRegIndices()103 const std::vector<Record*> &getSubRegIndices() const { 104 if (SubRegIndices.empty()) ReadSubRegIndices(); 105 return SubRegIndices; 106 } 107 108 // Map a SubRegIndex Record to its number. getSubRegIndexNo(Record * idx)109 unsigned getSubRegIndexNo(Record *idx) const { 110 if (SubRegIndices.empty()) ReadSubRegIndices(); 111 std::vector<Record*>::const_iterator i = 112 std::find(SubRegIndices.begin(), SubRegIndices.end(), idx); 113 assert(i != SubRegIndices.end() && "Not a SubRegIndex"); 114 return (i - SubRegIndices.begin()) + 1; 115 } 116 getRegisterClasses()117 const std::vector<CodeGenRegisterClass> &getRegisterClasses() const { 118 if (RegisterClasses.empty()) ReadRegisterClasses(); 119 return RegisterClasses; 120 } 121 getRegisterClass(Record * R)122 const CodeGenRegisterClass &getRegisterClass(Record *R) const { 123 const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses(); 124 for (unsigned i = 0, e = RC.size(); i != e; ++i) 125 if (RC[i].TheDef == R) 126 return RC[i]; 127 assert(0 && "Didn't find the register class"); 128 abort(); 129 } 130 131 /// getRegisterClassForRegister - Find the register class that contains the 132 /// specified physical register. If the register is not in a register 133 /// class, return null. If the register is in multiple classes, and the 134 /// classes have a superset-subset relationship and the same set of 135 /// types, return the superclass. Otherwise return null. getRegisterClassForRegister(Record * R)136 const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const { 137 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 138 const CodeGenRegisterClass *FoundRC = 0; 139 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 140 const CodeGenRegisterClass &RC = RegisterClasses[i]; 141 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 142 if (R != RC.Elements[ei]) 143 continue; 144 145 // If a register's classes have different types, return null. 146 if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes()) 147 return 0; 148 149 // If this is the first class that contains the register, 150 // make a note of it and go on to the next class. 151 if (!FoundRC) { 152 FoundRC = &RC; 153 break; 154 } 155 156 std::vector<Record *> Elements(RC.Elements); 157 std::vector<Record *> FoundElements(FoundRC->Elements); 158 std::sort(Elements.begin(), Elements.end()); 159 std::sort(FoundElements.begin(), FoundElements.end()); 160 161 // Check to see if the previously found class that contains 162 // the register is a subclass of the current class. If so, 163 // prefer the superclass. 164 if (std::includes(Elements.begin(), Elements.end(), 165 FoundElements.begin(), FoundElements.end())) { 166 FoundRC = &RC; 167 break; 168 } 169 170 // Check to see if the previously found class that contains 171 // the register is a superclass of the current class. If so, 172 // prefer the superclass. 173 if (std::includes(FoundElements.begin(), FoundElements.end(), 174 Elements.begin(), Elements.end())) 175 break; 176 177 // Multiple classes, and neither is a superclass of the other. 178 // Return null. 179 return 0; 180 } 181 } 182 return FoundRC; 183 } 184 185 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the 186 /// specified physical register. 187 std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const; 188 getLegalValueTypes()189 const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const { 190 if (LegalValueTypes.empty()) ReadLegalValueTypes(); 191 return LegalValueTypes; 192 } 193 194 /// isLegalValueType - Return true if the specified value type is natively 195 /// supported by the target (i.e. there are registers that directly hold it). isLegalValueType(MVT::SimpleValueType VT)196 bool isLegalValueType(MVT::SimpleValueType VT) const { 197 const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes(); 198 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i) 199 if (LegalVTs[i] == VT) return true; 200 return false; 201 } 202 203 private: getInstructions()204 DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const { 205 if (Instructions.empty()) ReadInstructions(); 206 return Instructions; 207 } 208 public: 209 getInstruction(const Record * InstRec)210 CodeGenInstruction &getInstruction(const Record *InstRec) const { 211 if (Instructions.empty()) ReadInstructions(); 212 DenseMap<const Record*, CodeGenInstruction*>::iterator I = 213 Instructions.find(InstRec); 214 assert(I != Instructions.end() && "Not an instruction"); 215 return *I->second; 216 } 217 218 /// getInstructionsByEnumValue - Return all of the instructions defined by the 219 /// target, ordered by their enum value. 220 const std::vector<const CodeGenInstruction*> & getInstructionsByEnumValue()221 getInstructionsByEnumValue() const { 222 if (InstrsByEnum.empty()) ComputeInstrsByEnum(); 223 return InstrsByEnum; 224 } 225 226 typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator; inst_begin()227 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();} inst_end()228 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); } 229 230 231 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? 232 /// 233 bool isLittleEndianEncoding() const; 234 235 private: 236 void ComputeInstrsByEnum() const; 237 }; 238 239 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern 240 /// tablegen class in TargetSelectionDAG.td 241 class ComplexPattern { 242 MVT::SimpleValueType Ty; 243 unsigned NumOperands; 244 std::string SelectFunc; 245 std::vector<Record*> RootNodes; 246 unsigned Properties; // Node properties 247 public: ComplexPattern()248 ComplexPattern() : NumOperands(0) {} 249 ComplexPattern(Record *R); 250 getValueType()251 MVT::SimpleValueType getValueType() const { return Ty; } getNumOperands()252 unsigned getNumOperands() const { return NumOperands; } getSelectFunc()253 const std::string &getSelectFunc() const { return SelectFunc; } getRootNodes()254 const std::vector<Record*> &getRootNodes() const { 255 return RootNodes; 256 } hasProperty(enum SDNP Prop)257 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); } 258 }; 259 260 } // End llvm namespace 261 262 #endif 263