1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_flash.h 4 * @author MCD Application Team 5 * @version V1.2.0 6 * @date 01-July-2016 7 * @brief Header file of Flash HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32L1xx_HAL_FLASH_EX_H 40 #define __STM32L1xx_HAL_FLASH_EX_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32l1xx_hal_def.h" 48 49 /** @addtogroup STM32L1xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup FLASHEx 54 * @{ 55 */ 56 57 /** @addtogroup FLASHEx_Private_Constants 58 * @{ 59 */ 60 #if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR) 61 62 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ 63 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ 64 FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR) 65 66 #elif defined(FLASH_SR_RDERR) 67 68 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ 69 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ 70 FLASH_FLAG_RDERR) 71 72 #elif defined(FLASH_SR_OPTVERRUSR) 73 74 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ 75 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ 76 FLASH_FLAG_OPTVERRUSR) 77 78 #else 79 80 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ 81 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR) 82 83 #endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */ 84 85 #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ 86 || defined(STM32L151xBA) || defined(STM32L152xBA) 87 88 /******* Devices with FLASH 128K *******/ 89 #define FLASH_NBPAGES_MAX 512 /* 512 pages from page 0 to page 511 */ 90 91 #elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ 92 || defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA) 93 94 /******* Devices with FLASH 256K *******/ 95 #define FLASH_NBPAGES_MAX 1025 /* 1025 pages from page 0 to page 1024 */ 96 97 #elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ 98 || defined(STM32L162xD) || defined(STM32L162xDX) 99 100 /******* Devices with FLASH 384K *******/ 101 #define FLASH_NBPAGES_MAX 1536 /* 1536 pages from page 0 to page 1535 */ 102 103 #elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) 104 105 /******* Devices with FLASH 512K *******/ 106 #define FLASH_NBPAGES_MAX 2048 /* 2048 pages from page 0 to page 2047 */ 107 108 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ 109 110 #define WRP_MASK_LOW ((uint32_t)0x0000FFFFU) 111 #define WRP_MASK_HIGH ((uint32_t)0xFFFF0000U) 112 113 /** 114 * @} 115 */ 116 117 /** @addtogroup FLASHEx_Private_Macros 118 * @{ 119 */ 120 121 #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES)) 122 123 #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) 124 125 #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \ 126 ((__VALUE__) == OB_WRPSTATE_ENABLE)) 127 128 #define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U)) 129 130 #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\ 131 ((__LEVEL__) == OB_RDP_LEVEL_1) ||\ 132 ((__LEVEL__) == OB_RDP_LEVEL_2)) 133 134 #define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \ 135 ((__LEVEL__) == OB_BOR_LEVEL1) || \ 136 ((__LEVEL__) == OB_BOR_LEVEL2) || \ 137 ((__LEVEL__) == OB_BOR_LEVEL3) || \ 138 ((__LEVEL__) == OB_BOR_LEVEL4) || \ 139 ((__LEVEL__) == OB_BOR_LEVEL5)) 140 141 #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW)) 142 143 #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST)) 144 145 #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST)) 146 147 #if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) 148 149 #define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)) 150 151 #elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2) 152 153 #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP) 154 155 #elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) 156 157 #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG) 158 159 #endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */ 160 161 #if defined(FLASH_OBR_SPRMOD) 162 163 #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \ 164 ((__VALUE__) == OB_PCROP_STATE_ENABLE)) 165 166 #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U)) 167 #endif /* FLASH_OBR_SPRMOD */ 168 169 #if defined(FLASH_OBR_nRST_BFB2) 170 171 #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1)) 172 173 #endif /* FLASH_OBR_nRST_BFB2 */ 174 175 #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \ 176 ((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \ 177 ((__VALUE__) == FLASH_TYPEERASEDATA_WORD)) 178 179 #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \ 180 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \ 181 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \ 182 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \ 183 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \ 184 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD)) 185 186 /** @defgroup FLASHEx_Address FLASHEx Address 187 * @{ 188 */ 189 190 #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END)) 191 192 #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ 193 || defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \ 194 || defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \ 195 || defined(STM32L162xCA) 196 197 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END)) 198 199 #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ 200 201 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) 202 #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END)) 203 #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) 204 205 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */ 206 207 #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1) && ((__PAGES__) <= FLASH_NBPAGES_MAX)) 208 209 /** 210 * @} 211 */ 212 213 /** 214 * @} 215 */ 216 /* Exported types ------------------------------------------------------------*/ 217 218 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types 219 * @{ 220 */ 221 222 /** 223 * @brief FLASH Erase structure definition 224 */ 225 typedef struct 226 { 227 uint32_t TypeErase; /*!< TypeErase: Page Erase only. 228 This parameter can be a value of @ref FLASHEx_Type_Erase */ 229 230 uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased 231 This parameter must be a value belonging to FLASH Programm address (depending on the devices) */ 232 233 uint32_t NbPages; /*!< NbPages: Number of pages to be erased. 234 This parameter must be a value between 1 and (max number of pages - value of Initial page)*/ 235 236 } FLASH_EraseInitTypeDef; 237 238 /** 239 * @brief FLASH Option Bytes PROGRAM structure definition 240 */ 241 typedef struct 242 { 243 uint32_t OptionType; /*!< OptionType: Option byte to be configured. 244 This parameter can be a value of @ref FLASHEx_Option_Type */ 245 246 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. 247 This parameter can be a value of @ref FLASHEx_WRP_State */ 248 249 uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31 250 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */ 251 252 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ 253 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ 254 || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ 255 || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) 256 uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63 257 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */ 258 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */ 259 260 #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ 261 || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ 262 || defined(STM32L162xE) 263 uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95 264 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */ 265 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ 266 267 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ 268 || defined(STM32L152xDX) || defined(STM32L162xDX) 269 uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or 270 Sectors 96 to 111 for STM32L1xxxDX devices. 271 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */ 272 #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ 273 274 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level. 275 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ 276 277 uint8_t BORLevel; /*!< BORLevel: Set the BOR Level. 278 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */ 279 280 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. 281 This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, 282 @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/ 283 } FLASH_OBProgramInitTypeDef; 284 285 #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) 286 /** 287 * @brief FLASH Advanced Option Bytes Program structure definition 288 */ 289 typedef struct 290 { 291 uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . 292 This parameter can be a value of @ref FLASHEx_OptionAdv_Type */ 293 294 #if defined(FLASH_OBR_SPRMOD) 295 uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. 296 This parameter can be a value of @ref FLASHEx_PCROP_State */ 297 298 uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP 299 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */ 300 301 #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) 302 uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP 303 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */ 304 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ 305 #endif /* FLASH_OBR_SPRMOD */ 306 307 #if defined(FLASH_OBR_nRST_BFB2) 308 uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config 309 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */ 310 #endif /* FLASH_OBR_nRST_BFB2*/ 311 } FLASH_AdvOBProgramInitTypeDef; 312 313 /** 314 * @} 315 */ 316 #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ 317 318 /* Exported constants --------------------------------------------------------*/ 319 320 321 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants 322 * @{ 323 */ 324 325 /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase 326 * @{ 327 */ 328 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00U) /*!<Page erase only*/ 329 330 /** 331 * @} 332 */ 333 334 /** @defgroup FLASHEx_Option_Type FLASHEx Option Type 335 * @{ 336 */ 337 #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!<WRP option byte configuration*/ 338 #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!<RDP option byte configuration*/ 339 #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!<USER option byte configuration*/ 340 #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!<BOR option byte configuration*/ 341 342 /** 343 * @} 344 */ 345 346 /** @defgroup FLASHEx_WRP_State FLASHEx WRP State 347 * @{ 348 */ 349 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!<Disable the write protection of the desired sectors*/ 350 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!<Enable the write protection of the desired sectors*/ 351 352 /** 353 * @} 354 */ 355 356 /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1 357 * @{ 358 */ 359 360 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ 361 #define OB_WRP1_PAGES0TO15 ((uint32_t)0x00000001) /* Write protection of Sector0 */ 362 #define OB_WRP1_PAGES16TO31 ((uint32_t)0x00000002) /* Write protection of Sector1 */ 363 #define OB_WRP1_PAGES32TO47 ((uint32_t)0x00000004) /* Write protection of Sector2 */ 364 #define OB_WRP1_PAGES48TO63 ((uint32_t)0x00000008) /* Write protection of Sector3 */ 365 #define OB_WRP1_PAGES64TO79 ((uint32_t)0x00000010) /* Write protection of Sector4 */ 366 #define OB_WRP1_PAGES80TO95 ((uint32_t)0x00000020) /* Write protection of Sector5 */ 367 #define OB_WRP1_PAGES96TO111 ((uint32_t)0x00000040) /* Write protection of Sector6 */ 368 #define OB_WRP1_PAGES112TO127 ((uint32_t)0x00000080) /* Write protection of Sector7 */ 369 #define OB_WRP1_PAGES128TO143 ((uint32_t)0x00000100) /* Write protection of Sector8 */ 370 #define OB_WRP1_PAGES144TO159 ((uint32_t)0x00000200) /* Write protection of Sector9 */ 371 #define OB_WRP1_PAGES160TO175 ((uint32_t)0x00000400) /* Write protection of Sector10 */ 372 #define OB_WRP1_PAGES176TO191 ((uint32_t)0x00000800) /* Write protection of Sector11 */ 373 #define OB_WRP1_PAGES192TO207 ((uint32_t)0x00001000) /* Write protection of Sector12 */ 374 #define OB_WRP1_PAGES208TO223 ((uint32_t)0x00002000) /* Write protection of Sector13 */ 375 #define OB_WRP1_PAGES224TO239 ((uint32_t)0x00004000) /* Write protection of Sector14 */ 376 #define OB_WRP1_PAGES240TO255 ((uint32_t)0x00008000) /* Write protection of Sector15 */ 377 #define OB_WRP1_PAGES256TO271 ((uint32_t)0x00010000) /* Write protection of Sector16 */ 378 #define OB_WRP1_PAGES272TO287 ((uint32_t)0x00020000) /* Write protection of Sector17 */ 379 #define OB_WRP1_PAGES288TO303 ((uint32_t)0x00040000) /* Write protection of Sector18 */ 380 #define OB_WRP1_PAGES304TO319 ((uint32_t)0x00080000) /* Write protection of Sector19 */ 381 #define OB_WRP1_PAGES320TO335 ((uint32_t)0x00100000) /* Write protection of Sector20 */ 382 #define OB_WRP1_PAGES336TO351 ((uint32_t)0x00200000) /* Write protection of Sector21 */ 383 #define OB_WRP1_PAGES352TO367 ((uint32_t)0x00400000) /* Write protection of Sector22 */ 384 #define OB_WRP1_PAGES368TO383 ((uint32_t)0x00800000) /* Write protection of Sector23 */ 385 #define OB_WRP1_PAGES384TO399 ((uint32_t)0x01000000) /* Write protection of Sector24 */ 386 #define OB_WRP1_PAGES400TO415 ((uint32_t)0x02000000) /* Write protection of Sector25 */ 387 #define OB_WRP1_PAGES416TO431 ((uint32_t)0x04000000) /* Write protection of Sector26 */ 388 #define OB_WRP1_PAGES432TO447 ((uint32_t)0x08000000) /* Write protection of Sector27 */ 389 #define OB_WRP1_PAGES448TO463 ((uint32_t)0x10000000) /* Write protection of Sector28 */ 390 #define OB_WRP1_PAGES464TO479 ((uint32_t)0x20000000) /* Write protection of Sector29 */ 391 #define OB_WRP1_PAGES480TO495 ((uint32_t)0x40000000) /* Write protection of Sector30 */ 392 #define OB_WRP1_PAGES496TO511 ((uint32_t)0x80000000U) /* Write protection of Sector31 */ 393 394 #define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */ 395 396 /** 397 * @} 398 */ 399 400 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ 401 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ 402 || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ 403 || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) 404 405 /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2 406 * @{ 407 */ 408 409 /* Pages for Cat3, Cat4 & Cat5 devices*/ 410 #define OB_WRP2_PAGES512TO527 ((uint32_t)0x00000001) /* Write protection of Sector32 */ 411 #define OB_WRP2_PAGES528TO543 ((uint32_t)0x00000002) /* Write protection of Sector33 */ 412 #define OB_WRP2_PAGES544TO559 ((uint32_t)0x00000004) /* Write protection of Sector34 */ 413 #define OB_WRP2_PAGES560TO575 ((uint32_t)0x00000008) /* Write protection of Sector35 */ 414 #define OB_WRP2_PAGES576TO591 ((uint32_t)0x00000010) /* Write protection of Sector36 */ 415 #define OB_WRP2_PAGES592TO607 ((uint32_t)0x00000020) /* Write protection of Sector37 */ 416 #define OB_WRP2_PAGES608TO623 ((uint32_t)0x00000040) /* Write protection of Sector38 */ 417 #define OB_WRP2_PAGES624TO639 ((uint32_t)0x00000080) /* Write protection of Sector39 */ 418 #define OB_WRP2_PAGES640TO655 ((uint32_t)0x00000100) /* Write protection of Sector40 */ 419 #define OB_WRP2_PAGES656TO671 ((uint32_t)0x00000200) /* Write protection of Sector41 */ 420 #define OB_WRP2_PAGES672TO687 ((uint32_t)0x00000400) /* Write protection of Sector42 */ 421 #define OB_WRP2_PAGES688TO703 ((uint32_t)0x00000800) /* Write protection of Sector43 */ 422 #define OB_WRP2_PAGES704TO719 ((uint32_t)0x00001000) /* Write protection of Sector44 */ 423 #define OB_WRP2_PAGES720TO735 ((uint32_t)0x00002000) /* Write protection of Sector45 */ 424 #define OB_WRP2_PAGES736TO751 ((uint32_t)0x00004000) /* Write protection of Sector46 */ 425 #define OB_WRP2_PAGES752TO767 ((uint32_t)0x00008000) /* Write protection of Sector47 */ 426 427 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ 428 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \ 429 || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \ 430 || defined(STM32L162xE) 431 432 #define OB_WRP2_PAGES768TO783 ((uint32_t)0x00010000) /* Write protection of Sector48 */ 433 #define OB_WRP2_PAGES784TO799 ((uint32_t)0x00020000) /* Write protection of Sector49 */ 434 #define OB_WRP2_PAGES800TO815 ((uint32_t)0x00040000) /* Write protection of Sector50 */ 435 #define OB_WRP2_PAGES816TO831 ((uint32_t)0x00080000) /* Write protection of Sector51 */ 436 #define OB_WRP2_PAGES832TO847 ((uint32_t)0x00100000) /* Write protection of Sector52 */ 437 #define OB_WRP2_PAGES848TO863 ((uint32_t)0x00200000) /* Write protection of Sector53 */ 438 #define OB_WRP2_PAGES864TO879 ((uint32_t)0x00400000) /* Write protection of Sector54 */ 439 #define OB_WRP2_PAGES880TO895 ((uint32_t)0x00800000) /* Write protection of Sector55 */ 440 #define OB_WRP2_PAGES896TO911 ((uint32_t)0x01000000) /* Write protection of Sector56 */ 441 #define OB_WRP2_PAGES912TO927 ((uint32_t)0x02000000) /* Write protection of Sector57 */ 442 #define OB_WRP2_PAGES928TO943 ((uint32_t)0x04000000) /* Write protection of Sector58 */ 443 #define OB_WRP2_PAGES944TO959 ((uint32_t)0x08000000) /* Write protection of Sector59 */ 444 #define OB_WRP2_PAGES960TO975 ((uint32_t)0x10000000) /* Write protection of Sector60 */ 445 #define OB_WRP2_PAGES976TO991 ((uint32_t)0x20000000) /* Write protection of Sector61 */ 446 #define OB_WRP2_PAGES992TO1007 ((uint32_t)0x40000000) /* Write protection of Sector62 */ 447 #define OB_WRP2_PAGES1008TO1023 ((uint32_t)0x80000000U) /* Write protection of Sector63 */ 448 449 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ 450 451 #define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */ 452 453 /** 454 * @} 455 */ 456 457 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */ 458 459 #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ 460 || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ 461 || defined(STM32L162xE) 462 463 /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3 464 * @{ 465 */ 466 467 /* Pages for devices with FLASH >= 256KB*/ 468 #define OB_WRP3_PAGES1024TO1039 ((uint32_t)0x00000001) /* Write protection of Sector64 */ 469 #define OB_WRP3_PAGES1040TO1055 ((uint32_t)0x00000002) /* Write protection of Sector65 */ 470 #define OB_WRP3_PAGES1056TO1071 ((uint32_t)0x00000004) /* Write protection of Sector66 */ 471 #define OB_WRP3_PAGES1072TO1087 ((uint32_t)0x00000008) /* Write protection of Sector67 */ 472 #define OB_WRP3_PAGES1088TO1103 ((uint32_t)0x00000010) /* Write protection of Sector68 */ 473 #define OB_WRP3_PAGES1104TO1119 ((uint32_t)0x00000020) /* Write protection of Sector69 */ 474 #define OB_WRP3_PAGES1120TO1135 ((uint32_t)0x00000040) /* Write protection of Sector70 */ 475 #define OB_WRP3_PAGES1136TO1151 ((uint32_t)0x00000080) /* Write protection of Sector71 */ 476 #define OB_WRP3_PAGES1152TO1167 ((uint32_t)0x00000100) /* Write protection of Sector72 */ 477 #define OB_WRP3_PAGES1168TO1183 ((uint32_t)0x00000200) /* Write protection of Sector73 */ 478 #define OB_WRP3_PAGES1184TO1199 ((uint32_t)0x00000400) /* Write protection of Sector74 */ 479 #define OB_WRP3_PAGES1200TO1215 ((uint32_t)0x00000800) /* Write protection of Sector75 */ 480 #define OB_WRP3_PAGES1216TO1231 ((uint32_t)0x00001000) /* Write protection of Sector76 */ 481 #define OB_WRP3_PAGES1232TO1247 ((uint32_t)0x00002000) /* Write protection of Sector77 */ 482 #define OB_WRP3_PAGES1248TO1263 ((uint32_t)0x00004000) /* Write protection of Sector78 */ 483 #define OB_WRP3_PAGES1264TO1279 ((uint32_t)0x00008000) /* Write protection of Sector79 */ 484 #define OB_WRP3_PAGES1280TO1295 ((uint32_t)0x00010000) /* Write protection of Sector80 */ 485 #define OB_WRP3_PAGES1296TO1311 ((uint32_t)0x00020000) /* Write protection of Sector81 */ 486 #define OB_WRP3_PAGES1312TO1327 ((uint32_t)0x00040000) /* Write protection of Sector82 */ 487 #define OB_WRP3_PAGES1328TO1343 ((uint32_t)0x00080000) /* Write protection of Sector83 */ 488 #define OB_WRP3_PAGES1344TO1359 ((uint32_t)0x00100000) /* Write protection of Sector84 */ 489 #define OB_WRP3_PAGES1360TO1375 ((uint32_t)0x00200000) /* Write protection of Sector85 */ 490 #define OB_WRP3_PAGES1376TO1391 ((uint32_t)0x00400000) /* Write protection of Sector86 */ 491 #define OB_WRP3_PAGES1392TO1407 ((uint32_t)0x00800000) /* Write protection of Sector87 */ 492 #define OB_WRP3_PAGES1408TO1423 ((uint32_t)0x01000000) /* Write protection of Sector88 */ 493 #define OB_WRP3_PAGES1424TO1439 ((uint32_t)0x02000000) /* Write protection of Sector89 */ 494 #define OB_WRP3_PAGES1440TO1455 ((uint32_t)0x04000000) /* Write protection of Sector90 */ 495 #define OB_WRP3_PAGES1456TO1471 ((uint32_t)0x08000000) /* Write protection of Sector91 */ 496 #define OB_WRP3_PAGES1472TO1487 ((uint32_t)0x10000000) /* Write protection of Sector92 */ 497 #define OB_WRP3_PAGES1488TO1503 ((uint32_t)0x20000000) /* Write protection of Sector93 */ 498 #define OB_WRP3_PAGES1504TO1519 ((uint32_t)0x40000000) /* Write protection of Sector94 */ 499 #define OB_WRP3_PAGES1520TO1535 ((uint32_t)0x80000000U) /* Write protection of Sector95 */ 500 501 #define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */ 502 503 /** 504 * @} 505 */ 506 507 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/ 508 509 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ 510 || defined(STM32L152xDX) || defined(STM32L162xDX) 511 512 /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4 513 * @{ 514 */ 515 516 /* Pages for Cat5 devices*/ 517 #define OB_WRP4_PAGES1536TO1551 ((uint32_t)0x00000001)/* Write protection of Sector96*/ 518 #define OB_WRP4_PAGES1552TO1567 ((uint32_t)0x00000002)/* Write protection of Sector97*/ 519 #define OB_WRP4_PAGES1568TO1583 ((uint32_t)0x00000004)/* Write protection of Sector98*/ 520 #define OB_WRP4_PAGES1584TO1599 ((uint32_t)0x00000008)/* Write protection of Sector99*/ 521 #define OB_WRP4_PAGES1600TO1615 ((uint32_t)0x00000010) /* Write protection of Sector100*/ 522 #define OB_WRP4_PAGES1616TO1631 ((uint32_t)0x00000020) /* Write protection of Sector101*/ 523 #define OB_WRP4_PAGES1632TO1647 ((uint32_t)0x00000040) /* Write protection of Sector102*/ 524 #define OB_WRP4_PAGES1648TO1663 ((uint32_t)0x00000080) /* Write protection of Sector103*/ 525 #define OB_WRP4_PAGES1664TO1679 ((uint32_t)0x00000100) /* Write protection of Sector104*/ 526 #define OB_WRP4_PAGES1680TO1695 ((uint32_t)0x00000200) /* Write protection of Sector105*/ 527 #define OB_WRP4_PAGES1696TO1711 ((uint32_t)0x00000400) /* Write protection of Sector106*/ 528 #define OB_WRP4_PAGES1712TO1727 ((uint32_t)0x00000800) /* Write protection of Sector107*/ 529 #define OB_WRP4_PAGES1728TO1743 ((uint32_t)0x00001000) /* Write protection of Sector108*/ 530 #define OB_WRP4_PAGES1744TO1759 ((uint32_t)0x00002000) /* Write protection of Sector109*/ 531 #define OB_WRP4_PAGES1760TO1775 ((uint32_t)0x00004000) /* Write protection of Sector110*/ 532 #define OB_WRP4_PAGES1776TO1791 ((uint32_t)0x00008000) /* Write protection of Sector111*/ 533 534 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) 535 536 #define OB_WRP4_PAGES1792TO1807 ((uint32_t)0x00010000) /* Write protection of Sector112*/ 537 #define OB_WRP4_PAGES1808TO1823 ((uint32_t)0x00020000) /* Write protection of Sector113*/ 538 #define OB_WRP4_PAGES1824TO1839 ((uint32_t)0x00040000) /* Write protection of Sector114*/ 539 #define OB_WRP4_PAGES1840TO1855 ((uint32_t)0x00080000) /* Write protection of Sector115*/ 540 #define OB_WRP4_PAGES1856TO1871 ((uint32_t)0x00100000) /* Write protection of Sector116*/ 541 #define OB_WRP4_PAGES1872TO1887 ((uint32_t)0x00200000) /* Write protection of Sector117*/ 542 #define OB_WRP4_PAGES1888TO1903 ((uint32_t)0x00400000) /* Write protection of Sector118*/ 543 #define OB_WRP4_PAGES1904TO1919 ((uint32_t)0x00800000) /* Write protection of Sector119*/ 544 #define OB_WRP4_PAGES1920TO1935 ((uint32_t)0x01000000) /* Write protection of Sector120*/ 545 #define OB_WRP4_PAGES1936TO1951 ((uint32_t)0x02000000) /* Write protection of Sector121*/ 546 #define OB_WRP4_PAGES1952TO1967 ((uint32_t)0x04000000) /* Write protection of Sector122*/ 547 #define OB_WRP4_PAGES1968TO1983 ((uint32_t)0x08000000) /* Write protection of Sector123*/ 548 #define OB_WRP4_PAGES1984TO1999 ((uint32_t)0x10000000) /* Write protection of Sector124*/ 549 #define OB_WRP4_PAGES2000TO2015 ((uint32_t)0x20000000) /* Write protection of Sector125*/ 550 #define OB_WRP4_PAGES2016TO2031 ((uint32_t)0x40000000) /* Write protection of Sector126*/ 551 #define OB_WRP4_PAGES2032TO2047 ((uint32_t)0x80000000U) /* Write protection of Sector127*/ 552 553 #endif /* STM32L151xE || STM32L152xE || STM32L162xE */ 554 555 #define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */ 556 557 /** 558 * @} 559 */ 560 561 #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ 562 563 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection 564 * @{ 565 */ 566 #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) 567 #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) 568 #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2 569 it is no more possible to go back to level 1 or 0 */ 570 571 /** 572 * @} 573 */ 574 575 /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level 576 * @{ 577 */ 578 579 #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD 580 power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ 581 #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ 582 #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ 583 #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ 584 #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ 585 #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ 586 587 /** 588 * @} 589 */ 590 591 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog 592 * @{ 593 */ 594 595 #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */ 596 #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */ 597 598 /** 599 * @} 600 */ 601 602 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP 603 * @{ 604 */ 605 606 #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */ 607 #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ 608 /** 609 * @} 610 */ 611 612 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY 613 * @{ 614 */ 615 616 #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */ 617 #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ 618 619 /** 620 * @} 621 */ 622 623 #if defined(FLASH_OBR_SPRMOD) 624 625 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type 626 * @{ 627 */ 628 629 #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!<PCROP option byte configuration*/ 630 631 /** 632 * @} 633 */ 634 635 #endif /* FLASH_OBR_SPRMOD */ 636 637 #if defined(FLASH_OBR_nRST_BFB2) 638 639 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type 640 * @{ 641 */ 642 643 #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02U) /*!<BOOTConfig option byte configuration*/ 644 645 /** 646 * @} 647 */ 648 649 #endif /* FLASH_OBR_nRST_BFB2 */ 650 651 #if defined(FLASH_OBR_SPRMOD) 652 653 /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State 654 * @{ 655 */ 656 #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00U) /*!<Disable PCROP for selected sectors */ 657 #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01U) /*!<Enable PCROP for selected sectors */ 658 659 /** 660 * @} 661 */ 662 663 /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode 664 * @{ 665 */ 666 #define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */ 667 #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */ 668 669 /** 670 * @} 671 */ 672 #endif /* FLASH_OBR_SPRMOD */ 673 674 #if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \ 675 || defined(STM32L162xC) 676 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1 677 * @{ 678 */ 679 680 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ 681 #define OB_PCROP1_PAGES0TO15 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector0 */ 682 #define OB_PCROP1_PAGES16TO31 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector1 */ 683 #define OB_PCROP1_PAGES32TO47 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector2 */ 684 #define OB_PCROP1_PAGES48TO63 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector3 */ 685 #define OB_PCROP1_PAGES64TO79 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector4 */ 686 #define OB_PCROP1_PAGES80TO95 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector5 */ 687 #define OB_PCROP1_PAGES96TO111 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector6 */ 688 #define OB_PCROP1_PAGES112TO127 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector7 */ 689 #define OB_PCROP1_PAGES128TO143 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector8 */ 690 #define OB_PCROP1_PAGES144TO159 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector9 */ 691 #define OB_PCROP1_PAGES160TO175 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector10 */ 692 #define OB_PCROP1_PAGES176TO191 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector11 */ 693 #define OB_PCROP1_PAGES192TO207 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector12 */ 694 #define OB_PCROP1_PAGES208TO223 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector13 */ 695 #define OB_PCROP1_PAGES224TO239 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector14 */ 696 #define OB_PCROP1_PAGES240TO255 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector15 */ 697 #define OB_PCROP1_PAGES256TO271 ((uint32_t)0x00010000U) /* PC Read/Write protection of Sector16 */ 698 #define OB_PCROP1_PAGES272TO287 ((uint32_t)0x00020000U) /* PC Read/Write protection of Sector17 */ 699 #define OB_PCROP1_PAGES288TO303 ((uint32_t)0x00040000U) /* PC Read/Write protection of Sector18 */ 700 #define OB_PCROP1_PAGES304TO319 ((uint32_t)0x00080000U) /* PC Read/Write protection of Sector19 */ 701 #define OB_PCROP1_PAGES320TO335 ((uint32_t)0x00100000U) /* PC Read/Write protection of Sector20 */ 702 #define OB_PCROP1_PAGES336TO351 ((uint32_t)0x00200000U) /* PC Read/Write protection of Sector21 */ 703 #define OB_PCROP1_PAGES352TO367 ((uint32_t)0x00400000U) /* PC Read/Write protection of Sector22 */ 704 #define OB_PCROP1_PAGES368TO383 ((uint32_t)0x00800000U) /* PC Read/Write protection of Sector23 */ 705 #define OB_PCROP1_PAGES384TO399 ((uint32_t)0x01000000U) /* PC Read/Write protection of Sector24 */ 706 #define OB_PCROP1_PAGES400TO415 ((uint32_t)0x02000000U) /* PC Read/Write protection of Sector25 */ 707 #define OB_PCROP1_PAGES416TO431 ((uint32_t)0x04000000U) /* PC Read/Write protection of Sector26 */ 708 #define OB_PCROP1_PAGES432TO447 ((uint32_t)0x08000000U) /* PC Read/Write protection of Sector27 */ 709 #define OB_PCROP1_PAGES448TO463 ((uint32_t)0x10000000U) /* PC Read/Write protection of Sector28 */ 710 #define OB_PCROP1_PAGES464TO479 ((uint32_t)0x20000000U) /* PC Read/Write protection of Sector29 */ 711 #define OB_PCROP1_PAGES480TO495 ((uint32_t)0x40000000U) /* PC Read/Write protection of Sector30 */ 712 #define OB_PCROP1_PAGES496TO511 ((uint32_t)0x80000000U) /* PC Read/Write protection of Sector31 */ 713 714 #define OB_PCROP1_ALLPAGES ((uint32_t)0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ 715 716 /** 717 * @} 718 */ 719 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ 720 721 #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) 722 723 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2 724 * @{ 725 */ 726 727 /* Pages for Cat3, Cat4 & Cat5 devices*/ 728 #define OB_PCROP2_PAGES512TO527 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector32 */ 729 #define OB_PCROP2_PAGES528TO543 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector33 */ 730 #define OB_PCROP2_PAGES544TO559 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector34 */ 731 #define OB_PCROP2_PAGES560TO575 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector35 */ 732 #define OB_PCROP2_PAGES576TO591 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector36 */ 733 #define OB_PCROP2_PAGES592TO607 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector37 */ 734 #define OB_PCROP2_PAGES608TO623 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector38 */ 735 #define OB_PCROP2_PAGES624TO639 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector39 */ 736 #define OB_PCROP2_PAGES640TO655 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector40 */ 737 #define OB_PCROP2_PAGES656TO671 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector41 */ 738 #define OB_PCROP2_PAGES672TO687 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector42 */ 739 #define OB_PCROP2_PAGES688TO703 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector43 */ 740 #define OB_PCROP2_PAGES704TO719 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector44 */ 741 #define OB_PCROP2_PAGES720TO735 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector45 */ 742 #define OB_PCROP2_PAGES736TO751 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector46 */ 743 #define OB_PCROP2_PAGES752TO767 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector47 */ 744 #define OB_PCROP2_PAGES768TO783 ((uint32_t)0x00010000U) /* PC Read/Write protection of Sector48 */ 745 #define OB_PCROP2_PAGES784TO799 ((uint32_t)0x00020000U) /* PC Read/Write protection of Sector49 */ 746 #define OB_PCROP2_PAGES800TO815 ((uint32_t)0x00040000U) /* PC Read/Write protection of Sector50 */ 747 #define OB_PCROP2_PAGES816TO831 ((uint32_t)0x00080000U) /* PC Read/Write protection of Sector51 */ 748 #define OB_PCROP2_PAGES832TO847 ((uint32_t)0x00100000U) /* PC Read/Write protection of Sector52 */ 749 #define OB_PCROP2_PAGES848TO863 ((uint32_t)0x00200000U) /* PC Read/Write protection of Sector53 */ 750 #define OB_PCROP2_PAGES864TO879 ((uint32_t)0x00400000U) /* PC Read/Write protection of Sector54 */ 751 #define OB_PCROP2_PAGES880TO895 ((uint32_t)0x00800000U) /* PC Read/Write protection of Sector55 */ 752 #define OB_PCROP2_PAGES896TO911 ((uint32_t)0x01000000U) /* PC Read/Write protection of Sector56 */ 753 #define OB_PCROP2_PAGES912TO927 ((uint32_t)0x02000000U) /* PC Read/Write protection of Sector57 */ 754 #define OB_PCROP2_PAGES928TO943 ((uint32_t)0x04000000U) /* PC Read/Write protection of Sector58 */ 755 #define OB_PCROP2_PAGES944TO959 ((uint32_t)0x08000000U) /* PC Read/Write protection of Sector59 */ 756 #define OB_PCROP2_PAGES960TO975 ((uint32_t)0x10000000U) /* PC Read/Write protection of Sector60 */ 757 #define OB_PCROP2_PAGES976TO991 ((uint32_t)0x20000000U) /* PC Read/Write protection of Sector61 */ 758 #define OB_PCROP2_PAGES992TO1007 ((uint32_t)0x40000000U) /* PC Read/Write protection of Sector62 */ 759 #define OB_PCROP2_PAGES1008TO1023 ((uint32_t)0x80000000U) /* PC Read/Write protection of Sector63 */ 760 761 #define OB_PCROP2_ALLPAGES ((uint32_t)0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ 762 763 /** 764 * @} 765 */ 766 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ 767 768 /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data 769 * @{ 770 */ 771 #define FLASH_TYPEERASEDATA_BYTE ((uint32_t)0x00U) /*!<Erase byte (8-bit) at a specified address.*/ 772 #define FLASH_TYPEERASEDATA_HALFWORD ((uint32_t)0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/ 773 #define FLASH_TYPEERASEDATA_WORD ((uint32_t)0x02U) /*!<Erase a word (32-bit) at a specified address.*/ 774 775 /** 776 * @} 777 */ 778 779 /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data 780 * @{ 781 */ 782 #define FLASH_TYPEPROGRAMDATA_BYTE ((uint32_t)0x00U) /*!<Program byte (8-bit) at a specified address.*/ 783 #define FLASH_TYPEPROGRAMDATA_HALFWORD ((uint32_t)0x01U) /*!<Program a half-word (16-bit) at a specified address.*/ 784 #define FLASH_TYPEPROGRAMDATA_WORD ((uint32_t)0x02U) /*!<Program a word (32-bit) at a specified address.*/ 785 #define FLASH_TYPEPROGRAMDATA_FASTBYTE ((uint32_t)0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/ 786 #define FLASH_TYPEPROGRAMDATA_FASTHALFWORD ((uint32_t)0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/ 787 #define FLASH_TYPEPROGRAMDATA_FASTWORD ((uint32_t)0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/ 788 789 /** 790 * @} 791 */ 792 793 #if defined(FLASH_OBR_nRST_BFB2) 794 795 /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT 796 * @{ 797 */ 798 799 #define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position 800 and this parameter is selected the device will boot from Bank 2 801 or Bank 1, depending on the activation of the bank */ 802 #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16)) /*!< At startup, if boot pins are set in boot from user Flash position 803 and this parameter is selected the device will boot from Bank1(Default) */ 804 805 /** 806 * @} 807 */ 808 #endif /* FLASH_OBR_nRST_BFB2 */ 809 810 /** 811 * @} 812 */ 813 814 /* Exported macro ------------------------------------------------------------*/ 815 816 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros 817 * @{ 818 */ 819 820 /** 821 * @brief Set the FLASH Latency. 822 * @param __LATENCY__ FLASH Latency 823 * This parameter can be one of the following values: 824 * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle 825 * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle 826 * @retval none 827 */ 828 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \ 829 if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \ 830 MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \ 831 } while(0) 832 833 /** 834 * @brief Get the FLASH Latency. 835 * @retval FLASH Latency 836 * This parameter can be one of the following values: 837 * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle 838 * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle 839 */ 840 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) 841 842 /** 843 * @brief Enable the FLASH 64-bit access. 844 * @note Read access 64 bit is used. 845 * @note This bit cannot be written at the same time as the LATENCY and 846 * PRFTEN bits. 847 * @retval none 848 */ 849 #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64)) 850 851 /** 852 * @brief Disable the FLASH 64-bit access. 853 * @note Read access 32 bit is used 854 * @note To reset this bit, the LATENCY should be zero wait state and the 855 * prefetch off. 856 * @retval none 857 */ 858 #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64)) 859 860 /** 861 * @brief Enable the FLASH prefetch buffer. 862 * @retval none 863 */ 864 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \ 865 SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \ 866 } while(0) 867 868 /** 869 * @brief Disable the FLASH prefetch buffer. 870 * @retval none 871 */ 872 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) 873 874 /** 875 * @brief Enable the FLASH power down during Sleep mode 876 * @retval none 877 */ 878 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 879 880 /** 881 * @brief Disable the FLASH power down during Sleep mode 882 * @retval none 883 */ 884 #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 885 886 /** 887 * @brief Enable the Flash Run power down mode. 888 * @note Writing this bit to 0 this bit, automatically the keys are 889 * loss and a new unlock sequence is necessary to re-write it to 1. 890 */ 891 #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ 892 FLASH->PDKEYR = FLASH_PDKEY2; \ 893 SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ 894 } while (0) 895 896 /** 897 * @brief Disable the Flash Run power down mode. 898 * @note Writing this bit to 0 this bit, automatically the keys are 899 * loss and a new unlock sequence is necessary to re-write it to 1. 900 */ 901 #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ 902 FLASH->PDKEYR = FLASH_PDKEY2; \ 903 CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ 904 } while (0) 905 906 /** 907 * @} 908 */ 909 910 /* Exported functions --------------------------------------------------------*/ 911 912 /** @addtogroup FLASHEx_Exported_Functions 913 * @{ 914 */ 915 916 /** @addtogroup FLASHEx_Exported_Functions_Group1 917 * @{ 918 */ 919 920 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 921 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 922 923 /** 924 * @} 925 */ 926 927 /** @addtogroup FLASHEx_Exported_Functions_Group2 928 * @{ 929 */ 930 931 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 932 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 933 934 #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) 935 936 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); 937 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); 938 939 #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ 940 941 #if defined(FLASH_OBR_SPRMOD) 942 943 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); 944 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); 945 946 #endif /* FLASH_OBR_SPRMOD */ 947 948 /** 949 * @} 950 */ 951 952 /** @addtogroup FLASHEx_Exported_Functions_Group3 953 * @{ 954 */ 955 956 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void); 957 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void); 958 959 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address); 960 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data); 961 void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void); 962 void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void); 963 964 /** 965 * @} 966 */ 967 968 /** 969 * @} 970 */ 971 972 /** 973 * @} 974 */ 975 976 /** 977 * @} 978 */ 979 980 #ifdef __cplusplus 981 } 982 #endif 983 984 #endif /* __STM32L1xx_HAL_FLASH_EX_H */ 985 986 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 987