1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_i2c.h 4 * @author MCD Application Team 5 * @version V1.2.0 6 * @date 01-July-2016 7 * @brief Header file of I2C HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32L1xx_HAL_I2C_H 40 #define __STM32L1xx_HAL_I2C_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32l1xx_hal_def.h" 48 49 /** @addtogroup STM32L1xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup I2C 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup I2C_Exported_Types I2C Exported Types 59 * @{ 60 */ 61 62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 63 * @brief I2C Configuration Structure definition 64 * @{ 65 */ 66 typedef struct 67 { 68 uint32_t ClockSpeed; /*!< Specifies the clock frequency. 69 This parameter must be set to a value lower than 400kHz */ 70 71 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. 72 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ 73 74 uint32_t OwnAddress1; /*!< Specifies the first device own address. 75 This parameter can be a 7-bit or 10-bit address. */ 76 77 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 78 This parameter can be a value of @ref I2C_addressing_mode */ 79 80 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 81 This parameter can be a value of @ref I2C_dual_addressing_mode */ 82 83 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 84 This parameter can be a 7-bit address. */ 85 86 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 87 This parameter can be a value of @ref I2C_general_call_addressing_mode */ 88 89 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 90 This parameter can be a value of @ref I2C_nostretch_mode */ 91 92 }I2C_InitTypeDef; 93 94 /** 95 * @} 96 */ 97 98 /** @defgroup HAL_state_structure_definition HAL state structure definition 99 * @brief HAL State structure definition 100 * @note HAL I2C State value coding follow below described bitmap : 101 * b7-b6 Error information 102 * 00 : No Error 103 * 01 : Abort (Abort user request on going) 104 * 10 : Timeout 105 * 11 : Error 106 * b5 IP initilisation status 107 * 0 : Reset (IP not initialized) 108 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called) 109 * b4 (not used) 110 * x : Should be set to 0 111 * b3 112 * 0 : Ready or Busy (No Listen mode ongoing) 113 * 1 : Listen (IP in Address Listen Mode) 114 * b2 Intrinsic process state 115 * 0 : Ready 116 * 1 : Busy (IP busy with some configuration or internal operations) 117 * b1 Rx state 118 * 0 : Ready (no Rx operation ongoing) 119 * 1 : Busy (Rx operation ongoing) 120 * b0 Tx state 121 * 0 : Ready (no Tx operation ongoing) 122 * 1 : Busy (Tx operation ongoing) 123 * @{ 124 */ 125 typedef enum 126 { 127 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 128 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 129 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 130 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 131 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 132 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 133 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 134 process is ongoing */ 135 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 136 process is ongoing */ 137 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 138 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 139 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 140 141 }HAL_I2C_StateTypeDef; 142 143 /** 144 * @} 145 */ 146 147 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 148 * @brief HAL Mode structure definition 149 * @note HAL I2C Mode value coding follow below described bitmap : 150 * b7 (not used) 151 * x : Should be set to 0 152 * b6 153 * 0 : None 154 * 1 : Memory (HAL I2C communication is in Memory Mode) 155 * b5 156 * 0 : None 157 * 1 : Slave (HAL I2C communication is in Slave Mode) 158 * b4 159 * 0 : None 160 * 1 : Master (HAL I2C communication is in Master Mode) 161 * b3-b2-b1-b0 (not used) 162 * xxxx : Should be set to 0000 163 * @{ 164 */ 165 typedef enum 166 { 167 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 168 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 169 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 170 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 171 172 }HAL_I2C_ModeTypeDef; 173 174 /** 175 * @} 176 */ 177 178 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 179 * @brief I2C Error Code definition 180 * @{ 181 */ 182 #define HAL_I2C_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 183 #define HAL_I2C_ERROR_BERR ((uint32_t)0x00000001U) /*!< BERR error */ 184 #define HAL_I2C_ERROR_ARLO ((uint32_t)0x00000002U) /*!< ARLO error */ 185 #define HAL_I2C_ERROR_AF ((uint32_t)0x00000004U) /*!< AF error */ 186 #define HAL_I2C_ERROR_OVR ((uint32_t)0x00000008U) /*!< OVR error */ 187 #define HAL_I2C_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 188 #define HAL_I2C_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout Error */ 189 /** 190 * @} 191 */ 192 193 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 194 * @brief I2C handle Structure definition 195 * @{ 196 */ 197 typedef struct 198 { 199 I2C_TypeDef *Instance; /*!< I2C registers base address */ 200 201 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 202 203 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 204 205 uint16_t XferSize; /*!< I2C transfer size */ 206 207 __IO uint16_t XferCount; /*!< I2C transfer counter */ 208 209 __IO uint32_t XferOptions; /*!< I2C transfer options */ 210 211 __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode 212 context for internal usage */ 213 214 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 215 216 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 217 218 HAL_LockTypeDef Lock; /*!< I2C locking object */ 219 220 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 221 222 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 223 224 __IO uint32_t ErrorCode; /*!< I2C Error code */ 225 226 __IO uint32_t Devaddress; /*!< I2C Target device address */ 227 228 __IO uint32_t Memaddress; /*!< I2C Target memory address */ 229 230 __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ 231 232 __IO uint32_t EventCount; /*!< I2C Event counter */ 233 234 }I2C_HandleTypeDef; 235 236 /** 237 * @} 238 */ 239 240 /** 241 * @} 242 */ 243 /* Exported constants --------------------------------------------------------*/ 244 /** @defgroup I2C_Exported_Constants I2C Exported Constants 245 * @{ 246 */ 247 248 /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode 249 * @{ 250 */ 251 #define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000U) 252 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY 253 /** 254 * @} 255 */ 256 257 /** @defgroup I2C_addressing_mode I2C addressing mode 258 * @{ 259 */ 260 #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000U) 261 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000U)) 262 /** 263 * @} 264 */ 265 266 /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode 267 * @{ 268 */ 269 #define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000U) 270 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL 271 /** 272 * @} 273 */ 274 275 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode 276 * @{ 277 */ 278 #define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000U) 279 #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC 280 /** 281 * @} 282 */ 283 284 /** @defgroup I2C_nostretch_mode I2C nostretch mode 285 * @{ 286 */ 287 #define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000U) 288 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 289 /** 290 * @} 291 */ 292 293 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size 294 * @{ 295 */ 296 #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001U) 297 #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010U) 298 /** 299 * @} 300 */ 301 302 /** @defgroup I2C_XferDirection_definition I2C XferDirection definition Master Point of View 303 * @{ 304 */ 305 #define I2C_DIRECTION_RECEIVE ((uint32_t)0x00000000U) 306 #define I2C_DIRECTION_TRANSMIT ((uint32_t)0x00000001U) 307 /** 308 * @} 309 */ 310 311 /** @defgroup I2C_XferOptions_definition I2C XferOptions definition 312 * @{ 313 */ 314 #define I2C_FIRST_FRAME ((uint32_t)0x00000001U) 315 #define I2C_NEXT_FRAME ((uint32_t)0x00000002U) 316 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)0x00000004U) 317 #define I2C_LAST_FRAME ((uint32_t)0x00000008U) 318 /** 319 * @} 320 */ 321 322 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 323 * @brief I2C Interrupt definition 324 * Elements values convention: 0xXXXXXXXX 325 * - XXXXXXXX : Interrupt control mask 326 * @{ 327 */ 328 #define I2C_IT_BUF I2C_CR2_ITBUFEN 329 #define I2C_IT_EVT I2C_CR2_ITEVTEN 330 #define I2C_IT_ERR I2C_CR2_ITERREN 331 /** 332 * @} 333 */ 334 335 /** @defgroup I2C_Flag_definition I2C Flag definition 336 * @{ 337 */ 338 #define I2C_FLAG_OVR ((uint32_t)(1U << 16U | I2C_SR1_OVR)) 339 #define I2C_FLAG_AF ((uint32_t)(1U << 16U | I2C_SR1_AF)) 340 #define I2C_FLAG_ARLO ((uint32_t)(1U << 16U | I2C_SR1_ARLO)) 341 #define I2C_FLAG_BERR ((uint32_t)(1U << 16U | I2C_SR1_BERR)) 342 #define I2C_FLAG_TXE ((uint32_t)(1U << 16U | I2C_SR1_TXE)) 343 #define I2C_FLAG_RXNE ((uint32_t)(1U << 16U | I2C_SR1_RXNE)) 344 #define I2C_FLAG_STOPF ((uint32_t)(1U << 16U | I2C_SR1_STOPF)) 345 #define I2C_FLAG_ADD10 ((uint32_t)(1U << 16U | I2C_SR1_ADD10)) 346 #define I2C_FLAG_BTF ((uint32_t)(1U << 16U | I2C_SR1_BTF)) 347 #define I2C_FLAG_ADDR ((uint32_t)(1U << 16U | I2C_SR1_ADDR)) 348 #define I2C_FLAG_SB ((uint32_t)(1U << 16U | I2C_SR1_SB)) 349 #define I2C_FLAG_DUALF ((uint32_t)(2U << 16U | I2C_SR2_DUALF)) 350 #define I2C_FLAG_GENCALL ((uint32_t)(2U << 16U | I2C_SR2_GENCALL)) 351 #define I2C_FLAG_TRA ((uint32_t)(2U << 16U | I2C_SR2_TRA)) 352 #define I2C_FLAG_BUSY ((uint32_t)(2U << 16U | I2C_SR2_BUSY)) 353 #define I2C_FLAG_MSL ((uint32_t)(2U << 16U | I2C_SR2_MSL)) 354 /** 355 * @} 356 */ 357 358 /** 359 * @} 360 */ 361 362 /* Exported macros -----------------------------------------------------------*/ 363 /** @defgroup I2C_Exported_Macros I2C Exported Macros 364 * @{ 365 */ 366 367 /** @brief Reset I2C handle state. 368 * @param __HANDLE__ specifies the I2C Handle. 369 * @retval None 370 */ 371 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 372 373 /** @brief Enable the specified I2C interrupt. 374 * @param __HANDLE__ specifies the I2C Handle. 375 * @param __INTERRUPT__: specifies the interrupt source to enable. 376 * This parameter can be one of the following values: 377 * @arg I2C_IT_BUF: Buffer interrupt enable 378 * @arg I2C_IT_EVT: Event interrupt enable 379 * @arg I2C_IT_ERR: Error interrupt enable 380 * @retval None 381 */ 382 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)) 383 384 /** @brief Disable the specified I2C interrupt. 385 * @param __HANDLE__ specifies the I2C Handle. 386 * @param __INTERRUPT__: specifies the interrupt source to disable. 387 * This parameter can be one of the following values: 388 * @arg I2C_IT_BUF: Buffer interrupt enable 389 * @arg I2C_IT_EVT: Event interrupt enable 390 * @arg I2C_IT_ERR: Error interrupt enable 391 * 392 * @retval None 393 */ 394 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 395 396 /** @brief Check whether the specified I2C interrupt source is enabled or not. 397 * @param __HANDLE__ specifies the I2C Handle. 398 * @param __INTERRUPT__: specifies the I2C interrupt source to check. 399 * This parameter can be one of the following values: 400 * @arg I2C_IT_BUF: Buffer interrupt enable 401 * @arg I2C_IT_EVT: Event interrupt enable 402 * @arg I2C_IT_ERR: Error interrupt enable 403 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 404 */ 405 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 406 407 /** @brief Check whether the specified I2C flag is set or not. 408 * @param __HANDLE__ specifies the I2C Handle. 409 * @param __FLAG__ specifies the flag to check. 410 * This parameter can be one of the following values: 411 * @arg I2C_FLAG_OVR: Overrun/Underrun flag 412 * @arg I2C_FLAG_AF: Acknowledge failure flag 413 * @arg I2C_FLAG_ARLO: Arbitration lost flag 414 * @arg I2C_FLAG_BERR: Bus error flag 415 * @arg I2C_FLAG_TXE: Data register empty flag 416 * @arg I2C_FLAG_RXNE: Data register not empty flag 417 * @arg I2C_FLAG_STOPF: Stop detection flag 418 * @arg I2C_FLAG_ADD10: 10-bit header sent flag 419 * @arg I2C_FLAG_BTF: Byte transfer finished flag 420 * @arg I2C_FLAG_ADDR: Address sent flag 421 * Address matched flag 422 * @arg I2C_FLAG_SB: Start bit flag 423 * @arg I2C_FLAG_DUALF: Dual flag 424 * @arg I2C_FLAG_GENCALL: General call header flag 425 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag 426 * @arg I2C_FLAG_BUSY: Bus busy flag 427 * @arg I2C_FLAG_MSL: Master/Slave flag 428 * @retval The new state of __FLAG__ (TRUE or FALSE). 429 */ 430 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?(((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET): \ 431 (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)) 432 433 /** @brief Clear the I2C pending flags which are cleared by writing 0 in a specific bit. 434 * @param __HANDLE__ specifies the I2C Handle. 435 * @param __FLAG__ specifies the flag to clear. 436 * This parameter can be any combination of the following values: 437 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) 438 * @arg I2C_FLAG_AF: Acknowledge failure flag 439 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) 440 * @arg I2C_FLAG_BERR: Bus error flag 441 * @retval None 442 */ 443 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) 444 445 /** @brief Clears the I2C ADDR pending flag. 446 * @param __HANDLE__: specifies the I2C Handle. 447 * @retval None 448 */ 449 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ 450 do{ \ 451 __IO uint32_t tmpreg = 0x00U; \ 452 tmpreg = (__HANDLE__)->Instance->SR1; \ 453 tmpreg = (__HANDLE__)->Instance->SR2; \ 454 UNUSED(tmpreg); \ 455 }while(0) 456 457 /** @brief Clears the I2C STOPF pending flag. 458 * @param __HANDLE__: specifies the I2C Handle. 459 * @retval None 460 */ 461 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ 462 do{ \ 463 __IO uint32_t tmpreg = 0x00U; \ 464 tmpreg = (__HANDLE__)->Instance->SR1; \ 465 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \ 466 UNUSED(tmpreg); \ 467 }while(0) 468 469 /** @brief Enable the I2C peripheral. 470 * @param __HANDLE__: specifies the I2C Handle. 471 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. 472 * @retval None 473 */ 474 #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) 475 476 /** @brief Disable the I2C peripheral. 477 * @param __HANDLE__: specifies the I2C Handle. 478 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. 479 * @retval None 480 */ 481 #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) 482 483 /** 484 * @} 485 */ 486 487 /* Exported functions --------------------------------------------------------*/ 488 /** @addtogroup I2C_Exported_Functions 489 * @{ 490 */ 491 492 /** @addtogroup I2C_Exported_Functions_Group1 493 * @{ 494 */ 495 /* Initialization and de-initialization functions******************************/ 496 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 497 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); 498 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 499 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 500 501 /** 502 * @} 503 */ 504 505 /** @addtogroup I2C_Exported_Functions_Group2 506 * @{ 507 */ 508 /* IO operation functions ****************************************************/ 509 /******* Blocking mode: Polling */ 510 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 511 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 512 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 513 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 514 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 515 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 516 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 517 518 /******* Non-Blocking mode: Interrupt */ 519 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 520 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 521 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 522 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 523 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 524 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 525 526 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 527 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 528 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 529 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 530 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 531 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 532 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 533 534 /******* Non-Blocking mode: DMA */ 535 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 536 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 537 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 538 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 539 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 540 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 541 /** 542 * @} 543 */ 544 545 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 546 * @{ 547 */ 548 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 549 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 550 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 551 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 552 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 553 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 554 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 555 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 556 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 557 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 558 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 559 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 560 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 561 /** 562 * @} 563 */ 564 565 /** @addtogroup I2C_Exported_Functions_Group3 566 * @{ 567 */ 568 /* Peripheral State, Mode and Error functions *********************************/ 569 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 570 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 571 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 572 573 /** 574 * @} 575 */ 576 /** 577 * @} 578 */ 579 580 /* Private constants ---------------------------------------------------------*/ 581 /** @defgroup I2C_Private_Constants I2C Private Constants 582 * @{ 583 */ 584 #define I2C_FLAG_MASK ((uint32_t)0x0000FFFFU) 585 /** 586 * @} 587 */ 588 589 /* Private macros ------------------------------------------------------------*/ 590 /** @defgroup I2C_Private_Macro I2C Private Macros 591 * @{ 592 */ 593 594 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 595 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 596 597 598 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 599 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 600 601 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ 602 ((CYCLE) == I2C_DUTYCYCLE_16_9)) 603 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (0xFFFFFF01U)) == 0U) 604 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (0xFFFFFC00U)) == 0U) 605 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 606 ((CALL) == I2C_GENERALCALL_ENABLE)) 607 608 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 609 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 610 611 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 612 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 613 614 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U)) 615 616 617 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 618 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 619 620 621 #define I2C_FREQ_RANGE(__PCLK__) ((__PCLK__)/1000000U) 622 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) 623 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U))) 624 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9)) 625 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ 626 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ 627 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) 628 629 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) 630 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) 631 632 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 633 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF0U)))) 634 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF1U)))) 635 636 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 637 ((REQUEST) == I2C_NEXT_FRAME) || \ 638 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 639 ((REQUEST) == I2C_LAST_FRAME)) 640 /** 641 * @} 642 */ 643 644 /* Private Functions ---------------------------------------------------------*/ 645 /** @defgroup I2C_Private_Functions I2C Private Functions 646 * @{ 647 */ 648 /* Private functions are defined in stm32f0xx_hal_i2c.c file */ 649 /** 650 * @} 651 */ 652 653 /** 654 * @} 655 */ 656 657 /** 658 * @} 659 */ 660 661 #ifdef __cplusplus 662 } 663 #endif 664 665 666 #endif /* __STM32L1xx_HAL_I2C_H */ 667 668 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 669 670