1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_i2s.h 4 * @author MCD Application Team 5 * @version V1.2.0 6 * @date 01-July-2016 7 * @brief Header file of I2S HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32L1xx_HAL_I2S_H 40 #define __STM32L1xx_HAL_I2S_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 #if defined(STM32L100xC) || \ 47 defined(STM32L151xC) || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xE) || defined(STM32L151xDX) || \ 48 defined(STM32L152xC) || defined(STM32L152xCA) || defined(STM32L152xD) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L151xE) || defined(STM32L151xDX) || \ 49 defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) || defined(STM32L162xDX) 50 51 /* Includes ------------------------------------------------------------------*/ 52 #include "stm32l1xx_hal_def.h" 53 54 /** @addtogroup STM32L1xx_HAL_Driver 55 * @{ 56 */ 57 58 /** @addtogroup I2S 59 * @{ 60 */ 61 62 /* Exported types ------------------------------------------------------------*/ 63 /** @defgroup I2S_Exported_Types I2S Exported Types 64 * @{ 65 */ 66 67 /** 68 * @brief I2S Init structure definition 69 */ 70 typedef struct 71 { 72 uint32_t Mode; /*!< Specifies the I2S operating mode. 73 This parameter can be a value of @ref I2S_Mode */ 74 75 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 76 This parameter can be a value of @ref I2S_Standard */ 77 78 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 79 This parameter can be a value of @ref I2S_Data_Format */ 80 81 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 82 This parameter can be a value of @ref I2S_MCLK_Output */ 83 84 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 85 This parameter can be a value of @ref I2S_Audio_Frequency */ 86 87 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 88 This parameter can be a value of @ref I2S_Clock_Polarity */ 89 90 }I2S_InitTypeDef; 91 92 /** 93 * @brief HAL State structures definition 94 */ 95 typedef enum 96 { 97 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ 98 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ 99 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ 100 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ 101 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ 102 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S pause state: used in case of DMA */ 103 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */ 104 }HAL_I2S_StateTypeDef; 105 106 /** 107 * @brief I2S handle Structure definition 108 */ 109 typedef struct 110 { 111 SPI_TypeDef *Instance; /* I2S registers base address */ 112 113 I2S_InitTypeDef Init; /* I2S communication parameters */ 114 115 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ 116 117 __IO uint16_t TxXferSize; /* I2S Tx transfer size */ 118 119 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ 120 121 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ 122 123 __IO uint16_t RxXferSize; /* I2S Rx transfer size */ 124 125 __IO uint16_t RxXferCount; /* I2S Rx transfer counter 126 (This field is initialized at the 127 same value as transfer size at the 128 beginning of the transfer and 129 decremented when a sample is received. 130 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 131 132 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ 133 134 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ 135 136 __IO HAL_LockTypeDef Lock; /* I2S locking object */ 137 138 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ 139 140 __IO uint32_t ErrorCode; /* I2S Error code */ 141 142 }I2S_HandleTypeDef; 143 /** 144 * @} 145 */ 146 147 /* Exported constants --------------------------------------------------------*/ 148 /** @defgroup I2S_Exported_Constants I2S Exported Constants 149 * @{ 150 */ 151 152 /** @defgroup I2S_Error_Codes I2S Error Codes 153 * @{ 154 */ 155 156 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00) /*!< No error */ 157 #define HAL_I2S_ERROR_UDR ((uint32_t)0x01) /*!< I2S Underrun error */ 158 #define HAL_I2S_ERROR_OVR ((uint32_t)0x02) /*!< I2S Overrun error */ 159 #define HAL_I2S_ERROR_FRE ((uint32_t)0x04) /*!< I2S Frame format error */ 160 #define HAL_I2S_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */ 161 162 /** 163 * @} 164 */ 165 166 /** @defgroup I2S_Mode I2S Mode 167 * @{ 168 */ 169 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) 170 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) 171 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) 172 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) 173 174 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ 175 ((MODE) == I2S_MODE_SLAVE_RX) || \ 176 ((MODE) == I2S_MODE_MASTER_TX) || \ 177 ((MODE) == I2S_MODE_MASTER_RX)) 178 /** 179 * @} 180 */ 181 182 /** @defgroup I2S_Standard I2S Standard 183 * @{ 184 */ 185 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) 186 #define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) 187 #define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) 188 #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ 189 SPI_I2SCFGR_I2SSTD_1)) 190 #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ 191 SPI_I2SCFGR_I2SSTD_1 |\ 192 SPI_I2SCFGR_PCMSYNC)) 193 194 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ 195 ((STANDARD) == I2S_STANDARD_MSB) || \ 196 ((STANDARD) == I2S_STANDARD_LSB) || \ 197 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ 198 ((STANDARD) == I2S_STANDARD_PCM_LONG)) 199 200 /** 201 * @} 202 */ 203 204 /** @defgroup I2S_Data_Format I2S Data Format 205 * @{ 206 */ 207 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) 208 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) 209 #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) 210 #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) 211 212 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ 213 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ 214 ((FORMAT) == I2S_DATAFORMAT_24B) || \ 215 ((FORMAT) == I2S_DATAFORMAT_32B)) 216 /** 217 * @} 218 */ 219 220 /** @defgroup I2S_MCLK_Output I2S MCLK Output 221 * @{ 222 */ 223 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) 224 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) 225 226 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ 227 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) 228 /** 229 * @} 230 */ 231 232 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 233 * @{ 234 */ 235 #define I2S_AUDIOFREQ_192K ((uint32_t)192000) 236 #define I2S_AUDIOFREQ_96K ((uint32_t)96000) 237 #define I2S_AUDIOFREQ_48K ((uint32_t)48000) 238 #define I2S_AUDIOFREQ_44K ((uint32_t)44100) 239 #define I2S_AUDIOFREQ_32K ((uint32_t)32000) 240 #define I2S_AUDIOFREQ_22K ((uint32_t)22050) 241 #define I2S_AUDIOFREQ_16K ((uint32_t)16000) 242 #define I2S_AUDIOFREQ_11K ((uint32_t)11025) 243 #define I2S_AUDIOFREQ_8K ((uint32_t)8000) 244 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) 245 246 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ 247 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ 248 ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) 249 /** 250 * @} 251 */ 252 253 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity 254 * @{ 255 */ 256 #define I2S_CPOL_LOW ((uint32_t)0x00000000) 257 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) 258 259 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ 260 ((CPOL) == I2S_CPOL_HIGH)) 261 /** 262 * @} 263 */ 264 265 /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition 266 * @{ 267 */ 268 #define I2S_IT_TXE SPI_CR2_TXEIE 269 #define I2S_IT_RXNE SPI_CR2_RXNEIE 270 #define I2S_IT_ERR SPI_CR2_ERRIE 271 /** 272 * @} 273 */ 274 275 /** @defgroup I2S_Flag_definition I2S Flag definition 276 * @{ 277 */ 278 #define I2S_FLAG_TXE SPI_SR_TXE 279 #define I2S_FLAG_RXNE SPI_SR_RXNE 280 281 #define I2S_FLAG_UDR SPI_SR_UDR 282 #define I2S_FLAG_OVR SPI_SR_OVR 283 #define I2S_FLAG_FRE SPI_SR_FRE 284 285 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE 286 #define I2S_FLAG_BSY SPI_SR_BSY 287 /** 288 * @} 289 */ 290 291 /** 292 * @} 293 */ 294 295 /* Exported macro ------------------------------------------------------------*/ 296 /** @defgroup I2S_Exported_macros I2S Exported Macros 297 * @{ 298 */ 299 300 /** @brief Reset I2S handle state 301 * @param __HANDLE__: specifies the I2S Handle. 302 * @retval None 303 */ 304 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 305 306 /** @brief Enable or disable the specified SPI peripheral (in I2S mode). 307 * @param __HANDLE__: specifies the I2S Handle. 308 * @retval None 309 */ 310 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 311 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 312 313 /** @brief Enable or disable the specified I2S interrupts. 314 * @param __HANDLE__: specifies the I2S Handle. 315 * @param __INTERRUPT__: specifies the interrupt source to enable or disable. 316 * This parameter can be one of the following values: 317 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 318 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 319 * @arg I2S_IT_ERR: Error interrupt enable 320 * @retval None 321 */ 322 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 323 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 324 325 /** @brief Checks if the specified I2S interrupt source is enabled or disabled. 326 * @param __HANDLE__: specifies the I2S Handle. 327 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. 328 * @param __INTERRUPT__: specifies the I2S interrupt source to check. 329 * This parameter can be one of the following values: 330 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 331 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 332 * @arg I2S_IT_ERR: Error interrupt enable 333 * @retval The new state of __IT__ (TRUE or FALSE). 334 */ 335 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 336 337 /** @brief Checks whether the specified I2S flag is set or not. 338 * @param __HANDLE__: specifies the I2S Handle. 339 * @param __FLAG__: specifies the flag to check. 340 * This parameter can be one of the following values: 341 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 342 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 343 * @arg I2S_FLAG_UDR: Underrun flag 344 * @arg I2S_FLAG_OVR: Overrun flag 345 * @arg I2S_FLAG_FRE: Frame error flag 346 * @arg I2S_FLAG_CHSIDE: Channel Side flag 347 * @arg I2S_FLAG_BSY: Busy flag 348 * @retval The new state of __FLAG__ (TRUE or FALSE). 349 */ 350 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 351 352 /** @brief Clears the I2S OVR pending flag. 353 * @param __HANDLE__: specifies the I2S Handle. 354 * @retval None 355 */ 356 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ 357 tmpreg = (__HANDLE__)->Instance->SR;\ 358 UNUSED(tmpreg); \ 359 }while(0) 360 /** @brief Clears the I2S UDR pending flag. 361 * @param __HANDLE__: specifies the I2S Handle. 362 * @retval None 363 */ 364 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) 365 /** 366 * @} 367 */ 368 369 /* Exported functions --------------------------------------------------------*/ 370 /** @addtogroup I2S_Exported_Functions 371 * @{ 372 */ 373 374 /** @addtogroup I2S_Exported_Functions_Group1 375 * @{ 376 */ 377 /* Initialization/de-initialization functions ********************************/ 378 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 379 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); 380 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 381 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 382 /** 383 * @} 384 */ 385 386 /** @addtogroup I2S_Exported_Functions_Group2 387 * @{ 388 */ 389 /* I/O operation functions ***************************************************/ 390 /* Blocking mode: Polling */ 391 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 392 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 393 394 /* Non-Blocking mode: Interrupt */ 395 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 396 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 397 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 398 399 /* Non-Blocking mode: DMA */ 400 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 401 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 402 403 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 404 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 405 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 406 407 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 408 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 409 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 410 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 411 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 412 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 413 /** 414 * @} 415 */ 416 417 /** @addtogroup I2S_Exported_Functions_Group3 418 * @{ 419 */ 420 /* Peripheral Control and State functions ************************************/ 421 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 422 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 423 /** 424 * @} 425 */ 426 427 /** 428 * @} 429 */ 430 431 432 /** 433 * @} 434 */ 435 436 /** 437 * @} 438 */ 439 #endif /* STM32L100xC || 440 STM32L151xC || STM32L151xCA || STM32L151xD || STM32L151xE || STM32L151xDX ||\\ 441 STM32L152xC || STM32L152xCA || STM32L152xD || STM32L152xE || STM32L152xDX || STM32L151xE || STM32L151xDX ||\\ 442 STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */ 443 444 #ifdef __cplusplus 445 } 446 #endif 447 448 #endif /* __STM32L1xx_HAL_I2S_H */ 449 450 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 451