1 /* 2 * Copyright 2021 NXP 3 * SPDX-License-Identifier: BSD-3-Clause 4 * 5 */ 6 7 #ifndef DDR4FW 8 #define DDR4FW 9 10 #define PHY_GEN2_MAX_IMAGE_SIZE 32768 11 #define PHY_GEN2_IMEM_ADDR 0x50000 12 #define PHY_GEN2_DMEM_ADDR 0x54000 13 14 struct ddr4u1d { 15 uint8_t reserved00; 16 uint8_t msg_misc; 17 uint16_t pmu_revision; 18 uint8_t pstate; 19 uint8_t pll_bypass_en; 20 uint16_t dramfreq; 21 uint8_t dfi_freq_ratio; 22 uint8_t bpznres_val; 23 uint8_t phy_odt_impedance; 24 uint8_t phy_drv_impedance; 25 uint8_t phy_vref; 26 uint8_t dram_type; 27 uint8_t disabled_dbyte; 28 uint8_t enabled_dqs; 29 uint8_t cs_present; 30 uint8_t cs_present_d0; 31 uint8_t cs_present_d1; 32 uint8_t addr_mirror; 33 uint8_t cs_test_fail; 34 uint8_t phy_cfg; 35 uint16_t sequence_ctrl; 36 uint8_t hdt_ctrl; 37 uint8_t reserved19[0x1B - 0x19]; 38 uint8_t share2dvref_result; 39 uint8_t reserved1c[0x22 - 0x1c]; 40 uint16_t phy_config_override; 41 uint8_t dfimrlmargin; 42 int8_t cdd_rr_3_2; 43 int8_t cdd_rr_3_1; 44 int8_t cdd_rr_3_0; 45 int8_t cdd_rr_2_3; 46 int8_t cdd_rr_2_1; 47 int8_t cdd_rr_2_0; 48 int8_t cdd_rr_1_3; 49 int8_t cdd_rr_1_2; 50 int8_t cdd_rr_1_0; 51 int8_t cdd_rr_0_3; 52 int8_t cdd_rr_0_2; 53 int8_t cdd_rr_0_1; 54 int8_t cdd_ww_3_2; 55 int8_t cdd_ww_3_1; 56 int8_t cdd_ww_3_0; 57 int8_t cdd_ww_2_3; 58 int8_t cdd_ww_2_1; 59 int8_t cdd_ww_2_0; 60 int8_t cdd_ww_1_3; 61 int8_t cdd_ww_1_2; 62 int8_t cdd_ww_1_0; 63 int8_t cdd_ww_0_3; 64 int8_t cdd_ww_0_2; 65 int8_t cdd_ww_0_1; 66 int8_t cdd_rw_3_3; 67 int8_t cdd_rw_3_2; 68 int8_t cdd_rw_3_1; 69 int8_t cdd_rw_3_0; 70 int8_t cdd_rw_2_3; 71 int8_t cdd_rw_2_2; 72 int8_t cdd_rw_2_1; 73 int8_t cdd_rw_2_0; 74 int8_t cdd_rw_1_3; 75 int8_t cdd_rw_1_2; 76 int8_t cdd_rw_1_1; 77 int8_t cdd_rw_1_0; 78 int8_t cdd_rw_0_3; 79 int8_t cdd_rw_0_2; 80 int8_t cdd_rw_0_1; 81 int8_t cdd_rw_0_0; 82 int8_t cdd_wr_3_3; 83 int8_t cdd_wr_3_2; 84 int8_t cdd_wr_3_1; 85 int8_t cdd_wr_3_0; 86 int8_t cdd_wr_2_3; 87 int8_t cdd_wr_2_2; 88 int8_t cdd_wr_2_1; 89 int8_t cdd_wr_2_0; 90 int8_t cdd_wr_1_3; 91 int8_t cdd_wr_1_2; 92 int8_t cdd_wr_1_1; 93 int8_t cdd_wr_1_0; 94 int8_t cdd_wr_0_3; 95 int8_t cdd_wr_0_2; 96 int8_t cdd_wr_0_1; 97 int8_t cdd_wr_0_0; 98 uint8_t reserved5d; 99 uint16_t mr0; 100 uint16_t mr1; 101 uint16_t mr2; 102 uint16_t mr3; 103 uint16_t mr4; 104 uint16_t mr5; 105 uint16_t mr6; 106 uint8_t x16present; 107 uint8_t cs_setup_gddec; 108 uint16_t rtt_nom_wr_park0; 109 uint16_t rtt_nom_wr_park1; 110 uint16_t rtt_nom_wr_park2; 111 uint16_t rtt_nom_wr_park3; 112 uint16_t rtt_nom_wr_park4; 113 uint16_t rtt_nom_wr_park5; 114 uint16_t rtt_nom_wr_park6; 115 uint16_t rtt_nom_wr_park7; 116 uint8_t acsm_odt_ctrl0; 117 uint8_t acsm_odt_ctrl1; 118 uint8_t acsm_odt_ctrl2; 119 uint8_t acsm_odt_ctrl3; 120 uint8_t acsm_odt_ctrl4; 121 uint8_t acsm_odt_ctrl5; 122 uint8_t acsm_odt_ctrl6; 123 uint8_t acsm_odt_ctrl7; 124 uint8_t vref_dq_r0nib0; 125 uint8_t vref_dq_r0nib1; 126 uint8_t vref_dq_r0nib2; 127 uint8_t vref_dq_r0nib3; 128 uint8_t vref_dq_r0nib4; 129 uint8_t vref_dq_r0nib5; 130 uint8_t vref_dq_r0nib6; 131 uint8_t vref_dq_r0nib7; 132 uint8_t vref_dq_r0nib8; 133 uint8_t vref_dq_r0nib9; 134 uint8_t vref_dq_r0nib10; 135 uint8_t vref_dq_r0nib11; 136 uint8_t vref_dq_r0nib12; 137 uint8_t vref_dq_r0nib13; 138 uint8_t vref_dq_r0nib14; 139 uint8_t vref_dq_r0nib15; 140 uint8_t vref_dq_r0nib16; 141 uint8_t vref_dq_r0nib17; 142 uint8_t vref_dq_r0nib18; 143 uint8_t vref_dq_r0nib19; 144 uint8_t vref_dq_r1nib0; 145 uint8_t vref_dq_r1nib1; 146 uint8_t vref_dq_r1nib2; 147 uint8_t vref_dq_r1nib3; 148 uint8_t vref_dq_r1nib4; 149 uint8_t vref_dq_r1nib5; 150 uint8_t vref_dq_r1nib6; 151 uint8_t vref_dq_r1nib7; 152 uint8_t vref_dq_r1nib8; 153 uint8_t vref_dq_r1nib9; 154 uint8_t vref_dq_r1nib10; 155 uint8_t vref_dq_r1nib11; 156 uint8_t vref_dq_r1nib12; 157 uint8_t vref_dq_r1nib13; 158 uint8_t vref_dq_r1nib14; 159 uint8_t vref_dq_r1nib15; 160 uint8_t vref_dq_r1nib16; 161 uint8_t vref_dq_r1nib17; 162 uint8_t vref_dq_r1nib18; 163 uint8_t vref_dq_r1nib19; 164 uint8_t vref_dq_r2nib0; 165 uint8_t vref_dq_r2nib1; 166 uint8_t vref_dq_r2nib2; 167 uint8_t vref_dq_r2nib3; 168 uint8_t vref_dq_r2nib4; 169 uint8_t vref_dq_r2nib5; 170 uint8_t vref_dq_r2nib6; 171 uint8_t vref_dq_r2nib7; 172 uint8_t vref_dq_r2nib8; 173 uint8_t vref_dq_r2nib9; 174 uint8_t vref_dq_r2nib10; 175 uint8_t vref_dq_r2nib11; 176 uint8_t vref_dq_r2nib12; 177 uint8_t vref_dq_r2nib13; 178 uint8_t vref_dq_r2nib14; 179 uint8_t vref_dq_r2nib15; 180 uint8_t vref_dq_r2nib16; 181 uint8_t vref_dq_r2nib17; 182 uint8_t vref_dq_r2nib18; 183 uint8_t vref_dq_r2nib19; 184 uint8_t vref_dq_r3nib0; 185 uint8_t vref_dq_r3nib1; 186 uint8_t vref_dq_r3nib2; 187 uint8_t vref_dq_r3nib3; 188 uint8_t vref_dq_r3nib4; 189 uint8_t vref_dq_r3nib5; 190 uint8_t vref_dq_r3nib6; 191 uint8_t vref_dq_r3nib7; 192 uint8_t vref_dq_r3nib8; 193 uint8_t vref_dq_r3nib9; 194 uint8_t vref_dq_r3nib10; 195 uint8_t vref_dq_r3nib11; 196 uint8_t vref_dq_r3nib12; 197 uint8_t vref_dq_r3nib13; 198 uint8_t vref_dq_r3nib14; 199 uint8_t vref_dq_r3nib15; 200 uint8_t vref_dq_r3nib16; 201 uint8_t vref_dq_r3nib17; 202 uint8_t vref_dq_r3nib18; 203 uint8_t vref_dq_r3nib19; 204 uint8_t reserved_d6[0x3f6 - 0xd6]; 205 uint16_t alt_cas_l; 206 uint8_t alt_wcas_l; 207 uint8_t d4misc; 208 } __packed; 209 210 struct ddr4u2d { 211 uint8_t reserved00; 212 uint8_t msg_misc; 213 uint16_t pmu_revision; 214 uint8_t pstate; 215 uint8_t pll_bypass_en; 216 uint16_t dramfreq; 217 uint8_t dfi_freq_ratio; 218 uint8_t bpznres_val; 219 uint8_t phy_odt_impedance; 220 uint8_t phy_drv_impedance; 221 uint8_t phy_vref; 222 uint8_t dram_type; 223 uint8_t disabled_dbyte; 224 uint8_t enabled_dqs; 225 uint8_t cs_present; 226 uint8_t cs_present_d0; 227 uint8_t cs_present_d1; 228 uint8_t addr_mirror; 229 uint8_t cs_test_fail; 230 uint8_t phy_cfg; 231 uint16_t sequence_ctrl; 232 uint8_t hdt_ctrl; 233 uint8_t rx2d_train_opt; 234 uint8_t tx2d_train_opt; 235 uint8_t share2dvref_result; 236 uint8_t delay_weight2d; 237 uint8_t voltage_weight2d; 238 uint8_t reserved1e[0x22 - 0x1e]; 239 uint16_t phy_config_override; 240 uint8_t dfimrlmargin; 241 uint8_t r0_rx_clk_dly_margin; 242 uint8_t r0_vref_dac_margin; 243 uint8_t r0_tx_dq_dly_margin; 244 uint8_t r0_device_vref_margin; 245 uint8_t reserved29[0x33 - 0x29]; 246 uint8_t r1_rx_clk_dly_margin; 247 uint8_t r1_vref_dac_margin; 248 uint8_t r1_tx_dq_dly_margin; 249 uint8_t r1_device_vref_margin; 250 uint8_t reserved37[0x41 - 0x37]; 251 uint8_t r2_rx_clk_dly_margin; 252 uint8_t r2_vref_dac_margin; 253 uint8_t r2_tx_dq_dly_margin; 254 uint8_t r2_device_vref_margin; 255 uint8_t reserved45[0x4f - 0x45]; 256 uint8_t r3_rx_clk_dly_margin; 257 uint8_t r3_vref_dac_margin; 258 uint8_t r3_tx_dq_dly_margin; 259 uint8_t r3_device_vref_margin; 260 uint8_t reserved53[0x5e - 0x53]; 261 uint16_t mr0; 262 uint16_t mr1; 263 uint16_t mr2; 264 uint16_t mr3; 265 uint16_t mr4; 266 uint16_t mr5; 267 uint16_t mr6; 268 uint8_t x16present; 269 uint8_t cs_setup_gddec; 270 uint16_t rtt_nom_wr_park0; 271 uint16_t rtt_nom_wr_park1; 272 uint16_t rtt_nom_wr_park2; 273 uint16_t rtt_nom_wr_park3; 274 uint16_t rtt_nom_wr_park4; 275 uint16_t rtt_nom_wr_park5; 276 uint16_t rtt_nom_wr_park6; 277 uint16_t rtt_nom_wr_park7; 278 uint8_t acsm_odt_ctrl0; 279 uint8_t acsm_odt_ctrl1; 280 uint8_t acsm_odt_ctrl2; 281 uint8_t acsm_odt_ctrl3; 282 uint8_t acsm_odt_ctrl4; 283 uint8_t acsm_odt_ctrl5; 284 uint8_t acsm_odt_ctrl6; 285 uint8_t acsm_odt_ctrl7; 286 uint8_t vref_dq_r0nib0; 287 uint8_t vref_dq_r0nib1; 288 uint8_t vref_dq_r0nib2; 289 uint8_t vref_dq_r0nib3; 290 uint8_t vref_dq_r0nib4; 291 uint8_t vref_dq_r0nib5; 292 uint8_t vref_dq_r0nib6; 293 uint8_t vref_dq_r0nib7; 294 uint8_t vref_dq_r0nib8; 295 uint8_t vref_dq_r0nib9; 296 uint8_t vref_dq_r0nib10; 297 uint8_t vref_dq_r0nib11; 298 uint8_t vref_dq_r0nib12; 299 uint8_t vref_dq_r0nib13; 300 uint8_t vref_dq_r0nib14; 301 uint8_t vref_dq_r0nib15; 302 uint8_t vref_dq_r0nib16; 303 uint8_t vref_dq_r0nib17; 304 uint8_t vref_dq_r0nib18; 305 uint8_t vref_dq_r0nib19; 306 uint8_t vref_dq_r1nib0; 307 uint8_t vref_dq_r1nib1; 308 uint8_t vref_dq_r1nib2; 309 uint8_t vref_dq_r1nib3; 310 uint8_t vref_dq_r1nib4; 311 uint8_t vref_dq_r1nib5; 312 uint8_t vref_dq_r1nib6; 313 uint8_t vref_dq_r1nib7; 314 uint8_t vref_dq_r1nib8; 315 uint8_t vref_dq_r1nib9; 316 uint8_t vref_dq_r1nib10; 317 uint8_t vref_dq_r1nib11; 318 uint8_t vref_dq_r1nib12; 319 uint8_t vref_dq_r1nib13; 320 uint8_t vref_dq_r1nib14; 321 uint8_t vref_dq_r1nib15; 322 uint8_t vref_dq_r1nib16; 323 uint8_t vref_dq_r1nib17; 324 uint8_t vref_dq_r1nib18; 325 uint8_t vref_dq_r1nib19; 326 uint8_t vref_dq_r2nib0; 327 uint8_t vref_dq_r2nib1; 328 uint8_t vref_dq_r2nib2; 329 uint8_t vref_dq_r2nib3; 330 uint8_t vref_dq_r2nib4; 331 uint8_t vref_dq_r2nib5; 332 uint8_t vref_dq_r2nib6; 333 uint8_t vref_dq_r2nib7; 334 uint8_t vref_dq_r2nib8; 335 uint8_t vref_dq_r2nib9; 336 uint8_t vref_dq_r2nib10; 337 uint8_t vref_dq_r2nib11; 338 uint8_t vref_dq_r2nib12; 339 uint8_t vref_dq_r2nib13; 340 uint8_t vref_dq_r2nib14; 341 uint8_t vref_dq_r2nib15; 342 uint8_t vref_dq_r2nib16; 343 uint8_t vref_dq_r2nib17; 344 uint8_t vref_dq_r2nib18; 345 uint8_t vref_dq_r2nib19; 346 uint8_t vref_dq_r3nib0; 347 uint8_t vref_dq_r3nib1; 348 uint8_t vref_dq_r3nib2; 349 uint8_t vref_dq_r3nib3; 350 uint8_t vref_dq_r3nib4; 351 uint8_t vref_dq_r3nib5; 352 uint8_t vref_dq_r3nib6; 353 uint8_t vref_dq_r3nib7; 354 uint8_t vref_dq_r3nib8; 355 uint8_t vref_dq_r3nib9; 356 uint8_t vref_dq_r3nib10; 357 uint8_t vref_dq_r3nib11; 358 uint8_t vref_dq_r3nib12; 359 uint8_t vref_dq_r3nib13; 360 uint8_t vref_dq_r3nib14; 361 uint8_t vref_dq_r3nib15; 362 uint8_t vref_dq_r3nib16; 363 uint8_t vref_dq_r3nib17; 364 uint8_t vref_dq_r3nib18; 365 uint8_t vref_dq_r3nib19; 366 uint8_t reserved_d6[0x3f6 - 0xd6]; 367 uint16_t alt_cas_l; 368 uint8_t alt_wcas_l; 369 uint8_t d4misc; 370 } __packed; 371 372 struct ddr4r1d { 373 uint8_t reserved00; 374 uint8_t msg_misc; 375 uint16_t pmu_revision; 376 uint8_t pstate; 377 uint8_t pll_bypass_en; 378 uint16_t dramfreq; 379 uint8_t dfi_freq_ratio; 380 uint8_t bpznres_val; 381 uint8_t phy_odt_impedance; 382 uint8_t phy_drv_impedance; 383 uint8_t phy_vref; 384 uint8_t dram_type; 385 uint8_t disabled_dbyte; 386 uint8_t enabled_dqs; 387 uint8_t cs_present; 388 uint8_t cs_present_d0; 389 uint8_t cs_present_d1; 390 uint8_t addr_mirror; 391 uint8_t cs_test_fail; 392 uint8_t phy_cfg; 393 uint16_t sequence_ctrl; 394 uint8_t hdt_ctrl; 395 uint8_t reserved19[0x22 - 0x19]; 396 uint16_t phy_config_override; 397 uint8_t dfimrlmargin; 398 int8_t cdd_rr_3_2; 399 int8_t cdd_rr_3_1; 400 int8_t cdd_rr_3_0; 401 int8_t cdd_rr_2_3; 402 int8_t cdd_rr_2_1; 403 int8_t cdd_rr_2_0; 404 int8_t cdd_rr_1_3; 405 int8_t cdd_rr_1_2; 406 int8_t cdd_rr_1_0; 407 int8_t cdd_rr_0_3; 408 int8_t cdd_rr_0_2; 409 int8_t cdd_rr_0_1; 410 int8_t cdd_ww_3_2; 411 int8_t cdd_ww_3_1; 412 int8_t cdd_ww_3_0; 413 int8_t cdd_ww_2_3; 414 int8_t cdd_ww_2_1; 415 int8_t cdd_ww_2_0; 416 int8_t cdd_ww_1_3; 417 int8_t cdd_ww_1_2; 418 int8_t cdd_ww_1_0; 419 int8_t cdd_ww_0_3; 420 int8_t cdd_ww_0_2; 421 int8_t cdd_ww_0_1; 422 int8_t cdd_rw_3_3; 423 int8_t cdd_rw_3_2; 424 int8_t cdd_rw_3_1; 425 int8_t cdd_rw_3_0; 426 int8_t cdd_rw_2_3; 427 int8_t cdd_rw_2_2; 428 int8_t cdd_rw_2_1; 429 int8_t cdd_rw_2_0; 430 int8_t cdd_rw_1_3; 431 int8_t cdd_rw_1_2; 432 int8_t cdd_rw_1_1; 433 int8_t cdd_rw_1_0; 434 int8_t cdd_rw_0_3; 435 int8_t cdd_rw_0_2; 436 int8_t cdd_rw_0_1; 437 int8_t cdd_rw_0_0; 438 int8_t cdd_wr_3_3; 439 int8_t cdd_wr_3_2; 440 int8_t cdd_wr_3_1; 441 int8_t cdd_wr_3_0; 442 int8_t cdd_wr_2_3; 443 int8_t cdd_wr_2_2; 444 int8_t cdd_wr_2_1; 445 int8_t cdd_wr_2_0; 446 int8_t cdd_wr_1_3; 447 int8_t cdd_wr_1_2; 448 int8_t cdd_wr_1_1; 449 int8_t cdd_wr_1_0; 450 int8_t cdd_wr_0_3; 451 int8_t cdd_wr_0_2; 452 int8_t cdd_wr_0_1; 453 int8_t cdd_wr_0_0; 454 uint8_t reserved5d; 455 uint16_t mr0; 456 uint16_t mr1; 457 uint16_t mr2; 458 uint16_t mr3; 459 uint16_t mr4; 460 uint16_t mr5; 461 uint16_t mr6; 462 uint8_t x16present; 463 uint8_t cs_setup_gddec; 464 uint16_t rtt_nom_wr_park0; 465 uint16_t rtt_nom_wr_park1; 466 uint16_t rtt_nom_wr_park2; 467 uint16_t rtt_nom_wr_park3; 468 uint16_t rtt_nom_wr_park4; 469 uint16_t rtt_nom_wr_park5; 470 uint16_t rtt_nom_wr_park6; 471 uint16_t rtt_nom_wr_park7; 472 uint8_t acsm_odt_ctrl0; 473 uint8_t acsm_odt_ctrl1; 474 uint8_t acsm_odt_ctrl2; 475 uint8_t acsm_odt_ctrl3; 476 uint8_t acsm_odt_ctrl4; 477 uint8_t acsm_odt_ctrl5; 478 uint8_t acsm_odt_ctrl6; 479 uint8_t acsm_odt_ctrl7; 480 uint8_t vref_dq_r0nib0; 481 uint8_t vref_dq_r0nib1; 482 uint8_t vref_dq_r0nib2; 483 uint8_t vref_dq_r0nib3; 484 uint8_t vref_dq_r0nib4; 485 uint8_t vref_dq_r0nib5; 486 uint8_t vref_dq_r0nib6; 487 uint8_t vref_dq_r0nib7; 488 uint8_t vref_dq_r0nib8; 489 uint8_t vref_dq_r0nib9; 490 uint8_t vref_dq_r0nib10; 491 uint8_t vref_dq_r0nib11; 492 uint8_t vref_dq_r0nib12; 493 uint8_t vref_dq_r0nib13; 494 uint8_t vref_dq_r0nib14; 495 uint8_t vref_dq_r0nib15; 496 uint8_t vref_dq_r0nib16; 497 uint8_t vref_dq_r0nib17; 498 uint8_t vref_dq_r0nib18; 499 uint8_t vref_dq_r0nib19; 500 uint8_t vref_dq_r1nib0; 501 uint8_t vref_dq_r1nib1; 502 uint8_t vref_dq_r1nib2; 503 uint8_t vref_dq_r1nib3; 504 uint8_t vref_dq_r1nib4; 505 uint8_t vref_dq_r1nib5; 506 uint8_t vref_dq_r1nib6; 507 uint8_t vref_dq_r1nib7; 508 uint8_t vref_dq_r1nib8; 509 uint8_t vref_dq_r1nib9; 510 uint8_t vref_dq_r1nib10; 511 uint8_t vref_dq_r1nib11; 512 uint8_t vref_dq_r1nib12; 513 uint8_t vref_dq_r1nib13; 514 uint8_t vref_dq_r1nib14; 515 uint8_t vref_dq_r1nib15; 516 uint8_t vref_dq_r1nib16; 517 uint8_t vref_dq_r1nib17; 518 uint8_t vref_dq_r1nib18; 519 uint8_t vref_dq_r1nib19; 520 uint8_t vref_dq_r2nib0; 521 uint8_t vref_dq_r2nib1; 522 uint8_t vref_dq_r2nib2; 523 uint8_t vref_dq_r2nib3; 524 uint8_t vref_dq_r2nib4; 525 uint8_t vref_dq_r2nib5; 526 uint8_t vref_dq_r2nib6; 527 uint8_t vref_dq_r2nib7; 528 uint8_t vref_dq_r2nib8; 529 uint8_t vref_dq_r2nib9; 530 uint8_t vref_dq_r2nib10; 531 uint8_t vref_dq_r2nib11; 532 uint8_t vref_dq_r2nib12; 533 uint8_t vref_dq_r2nib13; 534 uint8_t vref_dq_r2nib14; 535 uint8_t vref_dq_r2nib15; 536 uint8_t vref_dq_r2nib16; 537 uint8_t vref_dq_r2nib17; 538 uint8_t vref_dq_r2nib18; 539 uint8_t vref_dq_r2nib19; 540 uint8_t vref_dq_r3nib0; 541 uint8_t vref_dq_r3nib1; 542 uint8_t vref_dq_r3nib2; 543 uint8_t vref_dq_r3nib3; 544 uint8_t vref_dq_r3nib4; 545 uint8_t vref_dq_r3nib5; 546 uint8_t vref_dq_r3nib6; 547 uint8_t vref_dq_r3nib7; 548 uint8_t vref_dq_r3nib8; 549 uint8_t vref_dq_r3nib9; 550 uint8_t vref_dq_r3nib10; 551 uint8_t vref_dq_r3nib11; 552 uint8_t vref_dq_r3nib12; 553 uint8_t vref_dq_r3nib13; 554 uint8_t vref_dq_r3nib14; 555 uint8_t vref_dq_r3nib15; 556 uint8_t vref_dq_r3nib16; 557 uint8_t vref_dq_r3nib17; 558 uint8_t vref_dq_r3nib18; 559 uint8_t vref_dq_r3nib19; 560 uint8_t f0rc00_d0; 561 uint8_t f0rc01_d0; 562 uint8_t f0rc02_d0; 563 uint8_t f0rc03_d0; 564 uint8_t f0rc04_d0; 565 uint8_t f0rc05_d0; 566 uint8_t f0rc06_d0; 567 uint8_t f0rc07_d0; 568 uint8_t f0rc08_d0; 569 uint8_t f0rc09_d0; 570 uint8_t f0rc0a_d0; 571 uint8_t f0rc0b_d0; 572 uint8_t f0rc0c_d0; 573 uint8_t f0rc0d_d0; 574 uint8_t f0rc0e_d0; 575 uint8_t f0rc0f_d0; 576 uint8_t f0rc1x_d0; 577 uint8_t f0rc2x_d0; 578 uint8_t f0rc3x_d0; 579 uint8_t f0rc4x_d0; 580 uint8_t f0rc5x_d0; 581 uint8_t f0rc6x_d0; 582 uint8_t f0rc7x_d0; 583 uint8_t f0rc8x_d0; 584 uint8_t f0rc9x_d0; 585 uint8_t f0rcax_d0; 586 uint8_t f0rcbx_d0; 587 uint8_t f1rc00_d0; 588 uint8_t f1rc01_d0; 589 uint8_t f1rc02_d0; 590 uint8_t f1rc03_d0; 591 uint8_t f1rc04_d0; 592 uint8_t f1rc05_d0; 593 uint8_t f1rc06_d0; 594 uint8_t f1rc07_d0; 595 uint8_t f1rc08_d0; 596 uint8_t f1rc09_d0; 597 uint8_t f1rc0a_d0; 598 uint8_t f1rc0b_d0; 599 uint8_t f1rc0c_d0; 600 uint8_t f1rc0d_d0; 601 uint8_t f1rc0e_d0; 602 uint8_t f1rc0f_d0; 603 uint8_t f1rc1x_d0; 604 uint8_t f1rc2x_d0; 605 uint8_t f1rc3x_d0; 606 uint8_t f1rc4x_d0; 607 uint8_t f1rc5x_d0; 608 uint8_t f1rc6x_d0; 609 uint8_t f1rc7x_d0; 610 uint8_t f1rc8x_d0; 611 uint8_t f1rc9x_d0; 612 uint8_t f1rcax_d0; 613 uint8_t f1rcbx_d0; 614 uint8_t f0rc00_d1; 615 uint8_t f0rc01_d1; 616 uint8_t f0rc02_d1; 617 uint8_t f0rc03_d1; 618 uint8_t f0rc04_d1; 619 uint8_t f0rc05_d1; 620 uint8_t f0rc06_d1; 621 uint8_t f0rc07_d1; 622 uint8_t f0rc08_d1; 623 uint8_t f0rc09_d1; 624 uint8_t f0rc0a_d1; 625 uint8_t f0rc0b_d1; 626 uint8_t f0rc0c_d1; 627 uint8_t f0rc0d_d1; 628 uint8_t f0rc0e_d1; 629 uint8_t f0rc0f_d1; 630 uint8_t f0rc1x_d1; 631 uint8_t f0rc2x_d1; 632 uint8_t f0rc3x_d1; 633 uint8_t f0rc4x_d1; 634 uint8_t f0rc5x_d1; 635 uint8_t f0rc6x_d1; 636 uint8_t f0rc7x_d1; 637 uint8_t f0rc8x_d1; 638 uint8_t f0rc9x_d1; 639 uint8_t f0rcax_d1; 640 uint8_t f0rcbx_d1; 641 uint8_t f1rc00_d1; 642 uint8_t f1rc01_d1; 643 uint8_t f1rc02_d1; 644 uint8_t f1rc03_d1; 645 uint8_t f1rc04_d1; 646 uint8_t f1rc05_d1; 647 uint8_t f1rc06_d1; 648 uint8_t f1rc07_d1; 649 uint8_t f1rc08_d1; 650 uint8_t f1rc09_d1; 651 uint8_t f1rc0a_d1; 652 uint8_t f1rc0b_d1; 653 uint8_t f1rc0c_d1; 654 uint8_t f1rc0d_d1; 655 uint8_t f1rc0e_d1; 656 uint8_t f1rc0f_d1; 657 uint8_t f1rc1x_d1; 658 uint8_t f1rc2x_d1; 659 uint8_t f1rc3x_d1; 660 uint8_t f1rc4x_d1; 661 uint8_t f1rc5x_d1; 662 uint8_t f1rc6x_d1; 663 uint8_t f1rc7x_d1; 664 uint8_t f1rc8x_d1; 665 uint8_t f1rc9x_d1; 666 uint8_t f1rcax_d1; 667 uint8_t f1rcbx_d1; 668 uint8_t reserved142[0x3f6 - 0x142]; 669 uint16_t alt_cas_l; 670 uint8_t alt_wcas_l; 671 uint8_t d4misc; 672 } __packed; 673 674 struct ddr4r2d { 675 uint8_t reserved00; 676 uint8_t msg_misc; 677 uint16_t pmu_revision; 678 uint8_t pstate; 679 uint8_t pll_bypass_en; 680 uint16_t dramfreq; 681 uint8_t dfi_freq_ratio; 682 uint8_t bpznres_val; 683 uint8_t phy_odt_impedance; 684 uint8_t phy_drv_impedance; 685 uint8_t phy_vref; 686 uint8_t dram_type; 687 uint8_t disabled_dbyte; 688 uint8_t enabled_dqs; 689 uint8_t cs_present; 690 uint8_t cs_present_d0; 691 uint8_t cs_present_d1; 692 uint8_t addr_mirror; 693 uint8_t cs_test_fail; 694 uint8_t phy_cfg; 695 uint16_t sequence_ctrl; 696 uint8_t hdt_ctrl; 697 uint8_t rx2d_train_opt; 698 uint8_t tx2d_train_opt; 699 uint8_t share2dvref_result; 700 uint8_t delay_weight2d; 701 uint8_t voltage_weight2d; 702 uint8_t reserved1e[0x22-0x1e]; 703 uint16_t phy_config_override; 704 uint8_t dfimrlmargin; 705 uint8_t r0_rx_clk_dly_margin; 706 uint8_t r0_vref_dac_margin; 707 uint8_t r0_tx_dq_dly_margin; 708 uint8_t r0_device_vref_margin; 709 uint8_t reserved29[0x33-0x29]; 710 uint8_t r1_rx_clk_dly_margin; 711 uint8_t r1_vref_dac_margin; 712 uint8_t r1_tx_dq_dly_margin; 713 uint8_t r1_device_vref_margin; 714 uint8_t reserved37[0x41-0x37]; 715 uint8_t r2_rx_clk_dly_margin; 716 uint8_t r2_vref_dac_margin; 717 uint8_t r2_tx_dq_dly_margin; 718 uint8_t r2_device_vref_margin; 719 uint8_t reserved45[0x4f - 0x45]; 720 uint8_t r3_rx_clk_dly_margin; 721 uint8_t r3_vref_dac_margin; 722 uint8_t r3_tx_dq_dly_margin; 723 uint8_t r3_device_vref_margin; 724 uint8_t reserved53[0x5e - 0x53]; 725 uint16_t mr0; 726 uint16_t mr1; 727 uint16_t mr2; 728 uint16_t mr3; 729 uint16_t mr4; 730 uint16_t mr5; 731 uint16_t mr6; 732 uint8_t x16present; 733 uint8_t cs_setup_gddec; 734 uint16_t rtt_nom_wr_park0; 735 uint16_t rtt_nom_wr_park1; 736 uint16_t rtt_nom_wr_park2; 737 uint16_t rtt_nom_wr_park3; 738 uint16_t rtt_nom_wr_park4; 739 uint16_t rtt_nom_wr_park5; 740 uint16_t rtt_nom_wr_park6; 741 uint16_t rtt_nom_wr_park7; 742 uint8_t acsm_odt_ctrl0; 743 uint8_t acsm_odt_ctrl1; 744 uint8_t acsm_odt_ctrl2; 745 uint8_t acsm_odt_ctrl3; 746 uint8_t acsm_odt_ctrl4; 747 uint8_t acsm_odt_ctrl5; 748 uint8_t acsm_odt_ctrl6; 749 uint8_t acsm_odt_ctrl7; 750 uint8_t vref_dq_r0nib0; 751 uint8_t vref_dq_r0nib1; 752 uint8_t vref_dq_r0nib2; 753 uint8_t vref_dq_r0nib3; 754 uint8_t vref_dq_r0nib4; 755 uint8_t vref_dq_r0nib5; 756 uint8_t vref_dq_r0nib6; 757 uint8_t vref_dq_r0nib7; 758 uint8_t vref_dq_r0nib8; 759 uint8_t vref_dq_r0nib9; 760 uint8_t vref_dq_r0nib10; 761 uint8_t vref_dq_r0nib11; 762 uint8_t vref_dq_r0nib12; 763 uint8_t vref_dq_r0nib13; 764 uint8_t vref_dq_r0nib14; 765 uint8_t vref_dq_r0nib15; 766 uint8_t vref_dq_r0nib16; 767 uint8_t vref_dq_r0nib17; 768 uint8_t vref_dq_r0nib18; 769 uint8_t vref_dq_r0nib19; 770 uint8_t vref_dq_r1nib0; 771 uint8_t vref_dq_r1nib1; 772 uint8_t vref_dq_r1nib2; 773 uint8_t vref_dq_r1nib3; 774 uint8_t vref_dq_r1nib4; 775 uint8_t vref_dq_r1nib5; 776 uint8_t vref_dq_r1nib6; 777 uint8_t vref_dq_r1nib7; 778 uint8_t vref_dq_r1nib8; 779 uint8_t vref_dq_r1nib9; 780 uint8_t vref_dq_r1nib10; 781 uint8_t vref_dq_r1nib11; 782 uint8_t vref_dq_r1nib12; 783 uint8_t vref_dq_r1nib13; 784 uint8_t vref_dq_r1nib14; 785 uint8_t vref_dq_r1nib15; 786 uint8_t vref_dq_r1nib16; 787 uint8_t vref_dq_r1nib17; 788 uint8_t vref_dq_r1nib18; 789 uint8_t vref_dq_r1nib19; 790 uint8_t vref_dq_r2nib0; 791 uint8_t vref_dq_r2nib1; 792 uint8_t vref_dq_r2nib2; 793 uint8_t vref_dq_r2nib3; 794 uint8_t vref_dq_r2nib4; 795 uint8_t vref_dq_r2nib5; 796 uint8_t vref_dq_r2nib6; 797 uint8_t vref_dq_r2nib7; 798 uint8_t vref_dq_r2nib8; 799 uint8_t vref_dq_r2nib9; 800 uint8_t vref_dq_r2nib10; 801 uint8_t vref_dq_r2nib11; 802 uint8_t vref_dq_r2nib12; 803 uint8_t vref_dq_r2nib13; 804 uint8_t vref_dq_r2nib14; 805 uint8_t vref_dq_r2nib15; 806 uint8_t vref_dq_r2nib16; 807 uint8_t vref_dq_r2nib17; 808 uint8_t vref_dq_r2nib18; 809 uint8_t vref_dq_r2nib19; 810 uint8_t vref_dq_r3nib0; 811 uint8_t vref_dq_r3nib1; 812 uint8_t vref_dq_r3nib2; 813 uint8_t vref_dq_r3nib3; 814 uint8_t vref_dq_r3nib4; 815 uint8_t vref_dq_r3nib5; 816 uint8_t vref_dq_r3nib6; 817 uint8_t vref_dq_r3nib7; 818 uint8_t vref_dq_r3nib8; 819 uint8_t vref_dq_r3nib9; 820 uint8_t vref_dq_r3nib10; 821 uint8_t vref_dq_r3nib11; 822 uint8_t vref_dq_r3nib12; 823 uint8_t vref_dq_r3nib13; 824 uint8_t vref_dq_r3nib14; 825 uint8_t vref_dq_r3nib15; 826 uint8_t vref_dq_r3nib16; 827 uint8_t vref_dq_r3nib17; 828 uint8_t vref_dq_r3nib18; 829 uint8_t vref_dq_r3nib19; 830 uint8_t f0rc00_d0; 831 uint8_t f0rc01_d0; 832 uint8_t f0rc02_d0; 833 uint8_t f0rc03_d0; 834 uint8_t f0rc04_d0; 835 uint8_t f0rc05_d0; 836 uint8_t f0rc06_d0; 837 uint8_t f0rc07_d0; 838 uint8_t f0rc08_d0; 839 uint8_t f0rc09_d0; 840 uint8_t f0rc0a_d0; 841 uint8_t f0rc0b_d0; 842 uint8_t f0rc0c_d0; 843 uint8_t f0rc0d_d0; 844 uint8_t f0rc0e_d0; 845 uint8_t f0rc0f_d0; 846 uint8_t f0rc1x_d0; 847 uint8_t f0rc2x_d0; 848 uint8_t f0rc3x_d0; 849 uint8_t f0rc4x_d0; 850 uint8_t f0rc5x_d0; 851 uint8_t f0rc6x_d0; 852 uint8_t f0rc7x_d0; 853 uint8_t f0rc8x_d0; 854 uint8_t f0rc9x_d0; 855 uint8_t f0rcax_d0; 856 uint8_t f0rcbx_d0; 857 uint8_t f1rc00_d0; 858 uint8_t f1rc01_d0; 859 uint8_t f1rc02_d0; 860 uint8_t f1rc03_d0; 861 uint8_t f1rc04_d0; 862 uint8_t f1rc05_d0; 863 uint8_t f1rc06_d0; 864 uint8_t f1rc07_d0; 865 uint8_t f1rc08_d0; 866 uint8_t f1rc09_d0; 867 uint8_t f1rc0a_d0; 868 uint8_t f1rc0b_d0; 869 uint8_t f1rc0c_d0; 870 uint8_t f1rc0d_d0; 871 uint8_t f1rc0e_d0; 872 uint8_t f1rc0f_d0; 873 uint8_t f1rc1x_d0; 874 uint8_t f1rc2x_d0; 875 uint8_t f1rc3x_d0; 876 uint8_t f1rc4x_d0; 877 uint8_t f1rc5x_d0; 878 uint8_t f1rc6x_d0; 879 uint8_t f1rc7x_d0; 880 uint8_t f1rc8x_d0; 881 uint8_t f1rc9x_d0; 882 uint8_t f1rcax_d0; 883 uint8_t f1rcbx_d0; 884 uint8_t f0rc00_d1; 885 uint8_t f0rc01_d1; 886 uint8_t f0rc02_d1; 887 uint8_t f0rc03_d1; 888 uint8_t f0rc04_d1; 889 uint8_t f0rc05_d1; 890 uint8_t f0rc06_d1; 891 uint8_t f0rc07_d1; 892 uint8_t f0rc08_d1; 893 uint8_t f0rc09_d1; 894 uint8_t f0rc0a_d1; 895 uint8_t f0rc0b_d1; 896 uint8_t f0rc0c_d1; 897 uint8_t f0rc0d_d1; 898 uint8_t f0rc0e_d1; 899 uint8_t f0rc0f_d1; 900 uint8_t f0rc1x_d1; 901 uint8_t f0rc2x_d1; 902 uint8_t f0rc3x_d1; 903 uint8_t f0rc4x_d1; 904 uint8_t f0rc5x_d1; 905 uint8_t f0rc6x_d1; 906 uint8_t f0rc7x_d1; 907 uint8_t f0rc8x_d1; 908 uint8_t f0rc9x_d1; 909 uint8_t f0rcax_d1; 910 uint8_t f0rcbx_d1; 911 uint8_t f1rc00_d1; 912 uint8_t f1rc01_d1; 913 uint8_t f1rc02_d1; 914 uint8_t f1rc03_d1; 915 uint8_t f1rc04_d1; 916 uint8_t f1rc05_d1; 917 uint8_t f1rc06_d1; 918 uint8_t f1rc07_d1; 919 uint8_t f1rc08_d1; 920 uint8_t f1rc09_d1; 921 uint8_t f1rc0a_d1; 922 uint8_t f1rc0b_d1; 923 uint8_t f1rc0c_d1; 924 uint8_t f1rc0d_d1; 925 uint8_t f1rc0e_d1; 926 uint8_t f1rc0f_d1; 927 uint8_t f1rc1x_d1; 928 uint8_t f1rc2x_d1; 929 uint8_t f1rc3x_d1; 930 uint8_t f1rc4x_d1; 931 uint8_t f1rc5x_d1; 932 uint8_t f1rc6x_d1; 933 uint8_t f1rc7x_d1; 934 uint8_t f1rc8x_d1; 935 uint8_t f1rc9x_d1; 936 uint8_t f1rcax_d1; 937 uint8_t f1rcbx_d1; 938 uint8_t reserved142[0x3f6 - 0x142]; 939 uint16_t alt_cas_l; 940 uint8_t alt_wcas_l; 941 uint8_t d4misc; 942 } __packed; 943 944 struct ddr4lr1d { 945 uint8_t reserved00; 946 uint8_t msg_misc; 947 uint16_t pmu_revision; 948 uint8_t pstate; 949 uint8_t pll_bypass_en; 950 uint16_t dramfreq; 951 uint8_t dfi_freq_ratio; 952 uint8_t bpznres_val; 953 uint8_t phy_odt_impedance; 954 uint8_t phy_drv_impedance; 955 uint8_t phy_vref; 956 uint8_t dram_type; 957 uint8_t disabled_dbyte; 958 uint8_t enabled_dqs; 959 uint8_t cs_present; 960 uint8_t cs_present_d0; 961 uint8_t cs_present_d1; 962 uint8_t addr_mirror; 963 uint8_t cs_test_fail; 964 uint8_t phy_cfg; 965 uint16_t sequence_ctrl; 966 uint8_t hdt_ctrl; 967 uint8_t reserved19[0x22 - 0x19]; 968 uint16_t phy_config_override; 969 uint8_t dfimrlmargin; 970 int8_t cdd_rr_3_2; 971 int8_t cdd_rr_3_1; 972 int8_t cdd_rr_3_0; 973 int8_t cdd_rr_2_3; 974 int8_t cdd_rr_2_1; 975 int8_t cdd_rr_2_0; 976 int8_t cdd_rr_1_3; 977 int8_t cdd_rr_1_2; 978 int8_t cdd_rr_1_0; 979 int8_t cdd_rr_0_3; 980 int8_t cdd_rr_0_2; 981 int8_t cdd_rr_0_1; 982 int8_t cdd_ww_3_2; 983 int8_t cdd_ww_3_1; 984 int8_t cdd_ww_3_0; 985 int8_t cdd_ww_2_3; 986 int8_t cdd_ww_2_1; 987 int8_t cdd_ww_2_0; 988 int8_t cdd_ww_1_3; 989 int8_t cdd_ww_1_2; 990 int8_t cdd_ww_1_0; 991 int8_t cdd_ww_0_3; 992 int8_t cdd_ww_0_2; 993 int8_t cdd_ww_0_1; 994 int8_t cdd_rw_3_3; 995 int8_t cdd_rw_3_2; 996 int8_t cdd_rw_3_1; 997 int8_t cdd_rw_3_0; 998 int8_t cdd_rw_2_3; 999 int8_t cdd_rw_2_2; 1000 int8_t cdd_rw_2_1; 1001 int8_t cdd_rw_2_0; 1002 int8_t cdd_rw_1_3; 1003 int8_t cdd_rw_1_2; 1004 int8_t cdd_rw_1_1; 1005 int8_t cdd_rw_1_0; 1006 int8_t cdd_rw_0_3; 1007 int8_t cdd_rw_0_2; 1008 int8_t cdd_rw_0_1; 1009 int8_t cdd_rw_0_0; 1010 int8_t cdd_wr_3_3; 1011 int8_t cdd_wr_3_2; 1012 int8_t cdd_wr_3_1; 1013 int8_t cdd_wr_3_0; 1014 int8_t cdd_wr_2_3; 1015 int8_t cdd_wr_2_2; 1016 int8_t cdd_wr_2_1; 1017 int8_t cdd_wr_2_0; 1018 int8_t cdd_wr_1_3; 1019 int8_t cdd_wr_1_2; 1020 int8_t cdd_wr_1_1; 1021 int8_t cdd_wr_1_0; 1022 int8_t cdd_wr_0_3; 1023 int8_t cdd_wr_0_2; 1024 int8_t cdd_wr_0_1; 1025 int8_t cdd_wr_0_0; 1026 uint8_t reserved5d; 1027 uint16_t mr0; 1028 uint16_t mr1; 1029 uint16_t mr2; 1030 uint16_t mr3; 1031 uint16_t mr4; 1032 uint16_t mr5; 1033 uint16_t mr6; 1034 uint8_t x16present; 1035 uint8_t cs_setup_gddec; 1036 uint16_t rtt_nom_wr_park0; 1037 uint16_t rtt_nom_wr_park1; 1038 uint16_t rtt_nom_wr_park2; 1039 uint16_t rtt_nom_wr_park3; 1040 uint16_t rtt_nom_wr_park4; 1041 uint16_t rtt_nom_wr_park5; 1042 uint16_t rtt_nom_wr_park6; 1043 uint16_t rtt_nom_wr_park7; 1044 uint8_t acsm_odt_ctrl0; 1045 uint8_t acsm_odt_ctrl1; 1046 uint8_t acsm_odt_ctrl2; 1047 uint8_t acsm_odt_ctrl3; 1048 uint8_t acsm_odt_ctrl4; 1049 uint8_t acsm_odt_ctrl5; 1050 uint8_t acsm_odt_ctrl6; 1051 uint8_t acsm_odt_ctrl7; 1052 uint8_t vref_dq_r0nib0; 1053 uint8_t vref_dq_r0nib1; 1054 uint8_t vref_dq_r0nib2; 1055 uint8_t vref_dq_r0nib3; 1056 uint8_t vref_dq_r0nib4; 1057 uint8_t vref_dq_r0nib5; 1058 uint8_t vref_dq_r0nib6; 1059 uint8_t vref_dq_r0nib7; 1060 uint8_t vref_dq_r0nib8; 1061 uint8_t vref_dq_r0nib9; 1062 uint8_t vref_dq_r0nib10; 1063 uint8_t vref_dq_r0nib11; 1064 uint8_t vref_dq_r0nib12; 1065 uint8_t vref_dq_r0nib13; 1066 uint8_t vref_dq_r0nib14; 1067 uint8_t vref_dq_r0nib15; 1068 uint8_t vref_dq_r0nib16; 1069 uint8_t vref_dq_r0nib17; 1070 uint8_t vref_dq_r0nib18; 1071 uint8_t vref_dq_r0nib19; 1072 uint8_t vref_dq_r1nib0; 1073 uint8_t vref_dq_r1nib1; 1074 uint8_t vref_dq_r1nib2; 1075 uint8_t vref_dq_r1nib3; 1076 uint8_t vref_dq_r1nib4; 1077 uint8_t vref_dq_r1nib5; 1078 uint8_t vref_dq_r1nib6; 1079 uint8_t vref_dq_r1nib7; 1080 uint8_t vref_dq_r1nib8; 1081 uint8_t vref_dq_r1nib9; 1082 uint8_t vref_dq_r1nib10; 1083 uint8_t vref_dq_r1nib11; 1084 uint8_t vref_dq_r1nib12; 1085 uint8_t vref_dq_r1nib13; 1086 uint8_t vref_dq_r1nib14; 1087 uint8_t vref_dq_r1nib15; 1088 uint8_t vref_dq_r1nib16; 1089 uint8_t vref_dq_r1nib17; 1090 uint8_t vref_dq_r1nib18; 1091 uint8_t vref_dq_r1nib19; 1092 uint8_t vref_dq_r2nib0; 1093 uint8_t vref_dq_r2nib1; 1094 uint8_t vref_dq_r2nib2; 1095 uint8_t vref_dq_r2nib3; 1096 uint8_t vref_dq_r2nib4; 1097 uint8_t vref_dq_r2nib5; 1098 uint8_t vref_dq_r2nib6; 1099 uint8_t vref_dq_r2nib7; 1100 uint8_t vref_dq_r2nib8; 1101 uint8_t vref_dq_r2nib9; 1102 uint8_t vref_dq_r2nib10; 1103 uint8_t vref_dq_r2nib11; 1104 uint8_t vref_dq_r2nib12; 1105 uint8_t vref_dq_r2nib13; 1106 uint8_t vref_dq_r2nib14; 1107 uint8_t vref_dq_r2nib15; 1108 uint8_t vref_dq_r2nib16; 1109 uint8_t vref_dq_r2nib17; 1110 uint8_t vref_dq_r2nib18; 1111 uint8_t vref_dq_r2nib19; 1112 uint8_t vref_dq_r3nib0; 1113 uint8_t vref_dq_r3nib1; 1114 uint8_t vref_dq_r3nib2; 1115 uint8_t vref_dq_r3nib3; 1116 uint8_t vref_dq_r3nib4; 1117 uint8_t vref_dq_r3nib5; 1118 uint8_t vref_dq_r3nib6; 1119 uint8_t vref_dq_r3nib7; 1120 uint8_t vref_dq_r3nib8; 1121 uint8_t vref_dq_r3nib9; 1122 uint8_t vref_dq_r3nib10; 1123 uint8_t vref_dq_r3nib11; 1124 uint8_t vref_dq_r3nib12; 1125 uint8_t vref_dq_r3nib13; 1126 uint8_t vref_dq_r3nib14; 1127 uint8_t vref_dq_r3nib15; 1128 uint8_t vref_dq_r3nib16; 1129 uint8_t vref_dq_r3nib17; 1130 uint8_t vref_dq_r3nib18; 1131 uint8_t vref_dq_r3nib19; 1132 uint8_t f0rc00_d0; 1133 uint8_t f0rc01_d0; 1134 uint8_t f0rc02_d0; 1135 uint8_t f0rc03_d0; 1136 uint8_t f0rc04_d0; 1137 uint8_t f0rc05_d0; 1138 uint8_t f0rc06_d0; 1139 uint8_t f0rc07_d0; 1140 uint8_t f0rc08_d0; 1141 uint8_t f0rc09_d0; 1142 uint8_t f0rc0a_d0; 1143 uint8_t f0rc0b_d0; 1144 uint8_t f0rc0c_d0; 1145 uint8_t f0rc0d_d0; 1146 uint8_t f0rc0e_d0; 1147 uint8_t f0rc0f_d0; 1148 uint8_t f0rc1x_d0; 1149 uint8_t f0rc2x_d0; 1150 uint8_t f0rc3x_d0; 1151 uint8_t f0rc4x_d0; 1152 uint8_t f0rc5x_d0; 1153 uint8_t f0rc6x_d0; 1154 uint8_t f0rc7x_d0; 1155 uint8_t f0rc8x_d0; 1156 uint8_t f0rc9x_d0; 1157 uint8_t f0rcax_d0; 1158 uint8_t f0rcbx_d0; 1159 uint8_t f1rc00_d0; 1160 uint8_t f1rc01_d0; 1161 uint8_t f1rc02_d0; 1162 uint8_t f1rc03_d0; 1163 uint8_t f1rc04_d0; 1164 uint8_t f1rc05_d0; 1165 uint8_t f1rc06_d0; 1166 uint8_t f1rc07_d0; 1167 uint8_t f1rc08_d0; 1168 uint8_t f1rc09_d0; 1169 uint8_t f1rc0a_d0; 1170 uint8_t f1rc0b_d0; 1171 uint8_t f1rc0c_d0; 1172 uint8_t f1rc0d_d0; 1173 uint8_t f1rc0e_d0; 1174 uint8_t f1rc0f_d0; 1175 uint8_t f1rc1x_d0; 1176 uint8_t f1rc2x_d0; 1177 uint8_t f1rc3x_d0; 1178 uint8_t f1rc4x_d0; 1179 uint8_t f1rc5x_d0; 1180 uint8_t f1rc6x_d0; 1181 uint8_t f1rc7x_d0; 1182 uint8_t f1rc8x_d0; 1183 uint8_t f1rc9x_d0; 1184 uint8_t f1rcax_d0; 1185 uint8_t f1rcbx_d0; 1186 uint8_t f0rc00_d1; 1187 uint8_t f0rc01_d1; 1188 uint8_t f0rc02_d1; 1189 uint8_t f0rc03_d1; 1190 uint8_t f0rc04_d1; 1191 uint8_t f0rc05_d1; 1192 uint8_t f0rc06_d1; 1193 uint8_t f0rc07_d1; 1194 uint8_t f0rc08_d1; 1195 uint8_t f0rc09_d1; 1196 uint8_t f0rc0a_d1; 1197 uint8_t f0rc0b_d1; 1198 uint8_t f0rc0c_d1; 1199 uint8_t f0rc0d_d1; 1200 uint8_t f0rc0e_d1; 1201 uint8_t f0rc0f_d1; 1202 uint8_t f0rc1x_d1; 1203 uint8_t f0rc2x_d1; 1204 uint8_t f0rc3x_d1; 1205 uint8_t f0rc4x_d1; 1206 uint8_t f0rc5x_d1; 1207 uint8_t f0rc6x_d1; 1208 uint8_t f0rc7x_d1; 1209 uint8_t f0rc8x_d1; 1210 uint8_t f0rc9x_d1; 1211 uint8_t f0rcax_d1; 1212 uint8_t f0rcbx_d1; 1213 uint8_t f1rc00_d1; 1214 uint8_t f1rc01_d1; 1215 uint8_t f1rc02_d1; 1216 uint8_t f1rc03_d1; 1217 uint8_t f1rc04_d1; 1218 uint8_t f1rc05_d1; 1219 uint8_t f1rc06_d1; 1220 uint8_t f1rc07_d1; 1221 uint8_t f1rc08_d1; 1222 uint8_t f1rc09_d1; 1223 uint8_t f1rc0a_d1; 1224 uint8_t f1rc0b_d1; 1225 uint8_t f1rc0c_d1; 1226 uint8_t f1rc0d_d1; 1227 uint8_t f1rc0e_d1; 1228 uint8_t f1rc0f_d1; 1229 uint8_t f1rc1x_d1; 1230 uint8_t f1rc2x_d1; 1231 uint8_t f1rc3x_d1; 1232 uint8_t f1rc4x_d1; 1233 uint8_t f1rc5x_d1; 1234 uint8_t f1rc6x_d1; 1235 uint8_t f1rc7x_d1; 1236 uint8_t f1rc8x_d1; 1237 uint8_t f1rc9x_d1; 1238 uint8_t f1rcax_d1; 1239 uint8_t f1rcbx_d1; 1240 uint8_t bc00_d0; 1241 uint8_t bc01_d0; 1242 uint8_t bc02_d0; 1243 uint8_t bc03_d0; 1244 uint8_t bc04_d0; 1245 uint8_t bc05_d0; 1246 uint8_t bc06_d0; 1247 uint8_t bc07_d0; 1248 uint8_t bc08_d0; 1249 uint8_t bc09_d0; 1250 uint8_t bc0a_d0; 1251 uint8_t bc0b_d0; 1252 uint8_t bc0c_d0; 1253 uint8_t bc0d_d0; 1254 uint8_t bc0e_d0; 1255 uint8_t f0bc6x_d0; 1256 uint8_t f0bccx_d0; 1257 uint8_t f0bcdx_d0; 1258 uint8_t f0bcex_d0; 1259 uint8_t f0bcfx_d0; 1260 uint8_t f1bccx_d0; 1261 uint8_t f1bcdx_d0; 1262 uint8_t f1bcex_d0; 1263 uint8_t f1bcfx_d0; 1264 uint8_t f0bc2x_b0_d0; 1265 uint8_t f0bc3x_b0_d0; 1266 uint8_t f0bc4x_b0_d0; 1267 uint8_t f0bc5x_b0_d0; 1268 uint8_t f0bc8x_b0_d0; 1269 uint8_t f0bc9x_b0_d0; 1270 uint8_t f0bcax_b0_d0; 1271 uint8_t f0bcbx_b0_d0; 1272 uint8_t f1bc2x_b0_d0; 1273 uint8_t f1bc3x_b0_d0; 1274 uint8_t f1bc4x_b0_d0; 1275 uint8_t f1bc5x_b0_d0; 1276 uint8_t f1bc8x_b0_d0; 1277 uint8_t f1bc9x_b0_d0; 1278 uint8_t f1bcax_b0_d0; 1279 uint8_t f1bcbx_b0_d0; 1280 uint8_t f2bc2x_b0_d0; 1281 uint8_t f2bc3x_b0_d0; 1282 uint8_t f2bc4x_b0_d0; 1283 uint8_t f2bc5x_b0_d0; 1284 uint8_t f2bc8x_b0_d0; 1285 uint8_t f2bc9x_b0_d0; 1286 uint8_t f2bcax_b0_d0; 1287 uint8_t f2bcbx_b0_d0; 1288 uint8_t f3bc2x_b0_d0; 1289 uint8_t f3bc3x_b0_d0; 1290 uint8_t f3bc4x_b0_d0; 1291 uint8_t f3bc5x_b0_d0; 1292 uint8_t f3bc8x_b0_d0; 1293 uint8_t f3bc9x_b0_d0; 1294 uint8_t f3bcax_b0_d0; 1295 uint8_t f3bcbx_b0_d0; 1296 uint8_t f0bc2x_b1_d0; 1297 uint8_t f0bc3x_b1_d0; 1298 uint8_t f0bc4x_b1_d0; 1299 uint8_t f0bc5x_b1_d0; 1300 uint8_t f0bc8x_b1_d0; 1301 uint8_t f0bc9x_b1_d0; 1302 uint8_t f0bcax_b1_d0; 1303 uint8_t f0bcbx_b1_d0; 1304 uint8_t f1bc2x_b1_d0; 1305 uint8_t f1bc3x_b1_d0; 1306 uint8_t f1bc4x_b1_d0; 1307 uint8_t f1bc5x_b1_d0; 1308 uint8_t f1bc8x_b1_d0; 1309 uint8_t f1bc9x_b1_d0; 1310 uint8_t f1bcax_b1_d0; 1311 uint8_t f1bcbx_b1_d0; 1312 uint8_t f2bc2x_b1_d0; 1313 uint8_t f2bc3x_b1_d0; 1314 uint8_t f2bc4x_b1_d0; 1315 uint8_t f2bc5x_b1_d0; 1316 uint8_t f2bc8x_b1_d0; 1317 uint8_t f2bc9x_b1_d0; 1318 uint8_t f2bcax_b1_d0; 1319 uint8_t f2bcbx_b1_d0; 1320 uint8_t f3bc2x_b1_d0; 1321 uint8_t f3bc3x_b1_d0; 1322 uint8_t f3bc4x_b1_d0; 1323 uint8_t f3bc5x_b1_d0; 1324 uint8_t f3bc8x_b1_d0; 1325 uint8_t f3bc9x_b1_d0; 1326 uint8_t f3bcax_b1_d0; 1327 uint8_t f3bcbx_b1_d0; 1328 uint8_t f0bc2x_b2_d0; 1329 uint8_t f0bc3x_b2_d0; 1330 uint8_t f0bc4x_b2_d0; 1331 uint8_t f0bc5x_b2_d0; 1332 uint8_t f0bc8x_b2_d0; 1333 uint8_t f0bc9x_b2_d0; 1334 uint8_t f0bcax_b2_d0; 1335 uint8_t f0bcbx_b2_d0; 1336 uint8_t f1bc2x_b2_d0; 1337 uint8_t f1bc3x_b2_d0; 1338 uint8_t f1bc4x_b2_d0; 1339 uint8_t f1bc5x_b2_d0; 1340 uint8_t f1bc8x_b2_d0; 1341 uint8_t f1bc9x_b2_d0; 1342 uint8_t f1bcax_b2_d0; 1343 uint8_t f1bcbx_b2_d0; 1344 uint8_t f2bc2x_b2_d0; 1345 uint8_t f2bc3x_b2_d0; 1346 uint8_t f2bc4x_b2_d0; 1347 uint8_t f2bc5x_b2_d0; 1348 uint8_t f2bc8x_b2_d0; 1349 uint8_t f2bc9x_b2_d0; 1350 uint8_t f2bcax_b2_d0; 1351 uint8_t f2bcbx_b2_d0; 1352 uint8_t f3bc2x_b2_d0; 1353 uint8_t f3bc3x_b2_d0; 1354 uint8_t f3bc4x_b2_d0; 1355 uint8_t f3bc5x_b2_d0; 1356 uint8_t f3bc8x_b2_d0; 1357 uint8_t f3bc9x_b2_d0; 1358 uint8_t f3bcax_b2_d0; 1359 uint8_t f3bcbx_b2_d0; 1360 uint8_t f0bc2x_b3_d0; 1361 uint8_t f0bc3x_b3_d0; 1362 uint8_t f0bc4x_b3_d0; 1363 uint8_t f0bc5x_b3_d0; 1364 uint8_t f0bc8x_b3_d0; 1365 uint8_t f0bc9x_b3_d0; 1366 uint8_t f0bcax_b3_d0; 1367 uint8_t f0bcbx_b3_d0; 1368 uint8_t f1bc2x_b3_d0; 1369 uint8_t f1bc3x_b3_d0; 1370 uint8_t f1bc4x_b3_d0; 1371 uint8_t f1bc5x_b3_d0; 1372 uint8_t f1bc8x_b3_d0; 1373 uint8_t f1bc9x_b3_d0; 1374 uint8_t f1bcax_b3_d0; 1375 uint8_t f1bcbx_b3_d0; 1376 uint8_t f2bc2x_b3_d0; 1377 uint8_t f2bc3x_b3_d0; 1378 uint8_t f2bc4x_b3_d0; 1379 uint8_t f2bc5x_b3_d0; 1380 uint8_t f2bc8x_b3_d0; 1381 uint8_t f2bc9x_b3_d0; 1382 uint8_t f2bcax_b3_d0; 1383 uint8_t f2bcbx_b3_d0; 1384 uint8_t f3bc2x_b3_d0; 1385 uint8_t f3bc3x_b3_d0; 1386 uint8_t f3bc4x_b3_d0; 1387 uint8_t f3bc5x_b3_d0; 1388 uint8_t f3bc8x_b3_d0; 1389 uint8_t f3bc9x_b3_d0; 1390 uint8_t f3bcax_b3_d0; 1391 uint8_t f3bcbx_b3_d0; 1392 uint8_t f0bc2x_b4_d0; 1393 uint8_t f0bc3x_b4_d0; 1394 uint8_t f0bc4x_b4_d0; 1395 uint8_t f0bc5x_b4_d0; 1396 uint8_t f0bc8x_b4_d0; 1397 uint8_t f0bc9x_b4_d0; 1398 uint8_t f0bcax_b4_d0; 1399 uint8_t f0bcbx_b4_d0; 1400 uint8_t f1bc2x_b4_d0; 1401 uint8_t f1bc3x_b4_d0; 1402 uint8_t f1bc4x_b4_d0; 1403 uint8_t f1bc5x_b4_d0; 1404 uint8_t f1bc8x_b4_d0; 1405 uint8_t f1bc9x_b4_d0; 1406 uint8_t f1bcax_b4_d0; 1407 uint8_t f1bcbx_b4_d0; 1408 uint8_t f2bc2x_b4_d0; 1409 uint8_t f2bc3x_b4_d0; 1410 uint8_t f2bc4x_b4_d0; 1411 uint8_t f2bc5x_b4_d0; 1412 uint8_t f2bc8x_b4_d0; 1413 uint8_t f2bc9x_b4_d0; 1414 uint8_t f2bcax_b4_d0; 1415 uint8_t f2bcbx_b4_d0; 1416 uint8_t f3bc2x_b4_d0; 1417 uint8_t f3bc3x_b4_d0; 1418 uint8_t f3bc4x_b4_d0; 1419 uint8_t f3bc5x_b4_d0; 1420 uint8_t f3bc8x_b4_d0; 1421 uint8_t f3bc9x_b4_d0; 1422 uint8_t f3bcax_b4_d0; 1423 uint8_t f3bcbx_b4_d0; 1424 uint8_t f0bc2x_b5_d0; 1425 uint8_t f0bc3x_b5_d0; 1426 uint8_t f0bc4x_b5_d0; 1427 uint8_t f0bc5x_b5_d0; 1428 uint8_t f0bc8x_b5_d0; 1429 uint8_t f0bc9x_b5_d0; 1430 uint8_t f0bcax_b5_d0; 1431 uint8_t f0bcbx_b5_d0; 1432 uint8_t f1bc2x_b5_d0; 1433 uint8_t f1bc3x_b5_d0; 1434 uint8_t f1bc4x_b5_d0; 1435 uint8_t f1bc5x_b5_d0; 1436 uint8_t f1bc8x_b5_d0; 1437 uint8_t f1bc9x_b5_d0; 1438 uint8_t f1bcax_b5_d0; 1439 uint8_t f1bcbx_b5_d0; 1440 uint8_t f2bc2x_b5_d0; 1441 uint8_t f2bc3x_b5_d0; 1442 uint8_t f2bc4x_b5_d0; 1443 uint8_t f2bc5x_b5_d0; 1444 uint8_t f2bc8x_b5_d0; 1445 uint8_t f2bc9x_b5_d0; 1446 uint8_t f2bcax_b5_d0; 1447 uint8_t f2bcbx_b5_d0; 1448 uint8_t f3bc2x_b5_d0; 1449 uint8_t f3bc3x_b5_d0; 1450 uint8_t f3bc4x_b5_d0; 1451 uint8_t f3bc5x_b5_d0; 1452 uint8_t f3bc8x_b5_d0; 1453 uint8_t f3bc9x_b5_d0; 1454 uint8_t f3bcax_b5_d0; 1455 uint8_t f3bcbx_b5_d0; 1456 uint8_t f0bc2x_b6_d0; 1457 uint8_t f0bc3x_b6_d0; 1458 uint8_t f0bc4x_b6_d0; 1459 uint8_t f0bc5x_b6_d0; 1460 uint8_t f0bc8x_b6_d0; 1461 uint8_t f0bc9x_b6_d0; 1462 uint8_t f0bcax_b6_d0; 1463 uint8_t f0bcbx_b6_d0; 1464 uint8_t f1bc2x_b6_d0; 1465 uint8_t f1bc3x_b6_d0; 1466 uint8_t f1bc4x_b6_d0; 1467 uint8_t f1bc5x_b6_d0; 1468 uint8_t f1bc8x_b6_d0; 1469 uint8_t f1bc9x_b6_d0; 1470 uint8_t f1bcax_b6_d0; 1471 uint8_t f1bcbx_b6_d0; 1472 uint8_t f2bc2x_b6_d0; 1473 uint8_t f2bc3x_b6_d0; 1474 uint8_t f2bc4x_b6_d0; 1475 uint8_t f2bc5x_b6_d0; 1476 uint8_t f2bc8x_b6_d0; 1477 uint8_t f2bc9x_b6_d0; 1478 uint8_t f2bcax_b6_d0; 1479 uint8_t f2bcbx_b6_d0; 1480 uint8_t f3bc2x_b6_d0; 1481 uint8_t f3bc3x_b6_d0; 1482 uint8_t f3bc4x_b6_d0; 1483 uint8_t f3bc5x_b6_d0; 1484 uint8_t f3bc8x_b6_d0; 1485 uint8_t f3bc9x_b6_d0; 1486 uint8_t f3bcax_b6_d0; 1487 uint8_t f3bcbx_b6_d0; 1488 uint8_t f0bc2x_b7_d0; 1489 uint8_t f0bc3x_b7_d0; 1490 uint8_t f0bc4x_b7_d0; 1491 uint8_t f0bc5x_b7_d0; 1492 uint8_t f0bc8x_b7_d0; 1493 uint8_t f0bc9x_b7_d0; 1494 uint8_t f0bcax_b7_d0; 1495 uint8_t f0bcbx_b7_d0; 1496 uint8_t f1bc2x_b7_d0; 1497 uint8_t f1bc3x_b7_d0; 1498 uint8_t f1bc4x_b7_d0; 1499 uint8_t f1bc5x_b7_d0; 1500 uint8_t f1bc8x_b7_d0; 1501 uint8_t f1bc9x_b7_d0; 1502 uint8_t f1bcax_b7_d0; 1503 uint8_t f1bcbx_b7_d0; 1504 uint8_t f2bc2x_b7_d0; 1505 uint8_t f2bc3x_b7_d0; 1506 uint8_t f2bc4x_b7_d0; 1507 uint8_t f2bc5x_b7_d0; 1508 uint8_t f2bc8x_b7_d0; 1509 uint8_t f2bc9x_b7_d0; 1510 uint8_t f2bcax_b7_d0; 1511 uint8_t f2bcbx_b7_d0; 1512 uint8_t f3bc2x_b7_d0; 1513 uint8_t f3bc3x_b7_d0; 1514 uint8_t f3bc4x_b7_d0; 1515 uint8_t f3bc5x_b7_d0; 1516 uint8_t f3bc8x_b7_d0; 1517 uint8_t f3bc9x_b7_d0; 1518 uint8_t f3bcax_b7_d0; 1519 uint8_t f3bcbx_b7_d0; 1520 uint8_t f0bc2x_b8_d0; 1521 uint8_t f0bc3x_b8_d0; 1522 uint8_t f0bc4x_b8_d0; 1523 uint8_t f0bc5x_b8_d0; 1524 uint8_t f0bc8x_b8_d0; 1525 uint8_t f0bc9x_b8_d0; 1526 uint8_t f0bcax_b8_d0; 1527 uint8_t f0bcbx_b8_d0; 1528 uint8_t f1bc2x_b8_d0; 1529 uint8_t f1bc3x_b8_d0; 1530 uint8_t f1bc4x_b8_d0; 1531 uint8_t f1bc5x_b8_d0; 1532 uint8_t f1bc8x_b8_d0; 1533 uint8_t f1bc9x_b8_d0; 1534 uint8_t f1bcax_b8_d0; 1535 uint8_t f1bcbx_b8_d0; 1536 uint8_t f2bc2x_b8_d0; 1537 uint8_t f2bc3x_b8_d0; 1538 uint8_t f2bc4x_b8_d0; 1539 uint8_t f2bc5x_b8_d0; 1540 uint8_t f2bc8x_b8_d0; 1541 uint8_t f2bc9x_b8_d0; 1542 uint8_t f2bcax_b8_d0; 1543 uint8_t f2bcbx_b8_d0; 1544 uint8_t f3bc2x_b8_d0; 1545 uint8_t f3bc3x_b8_d0; 1546 uint8_t f3bc4x_b8_d0; 1547 uint8_t f3bc5x_b8_d0; 1548 uint8_t f3bc8x_b8_d0; 1549 uint8_t f3bc9x_b8_d0; 1550 uint8_t f3bcax_b8_d0; 1551 uint8_t f3bcbx_b8_d0; 1552 uint8_t f5bc5x_d0; 1553 uint8_t f5bc6x_d0; 1554 uint8_t f4bc8x_d0; 1555 uint8_t f4bc9x_d0; 1556 uint8_t f4bcax_d0; 1557 uint8_t f4bcbx_d0; 1558 uint8_t f4bccx_d0; 1559 uint8_t f4bcdx_d0; 1560 uint8_t f4bcex_d0; 1561 uint8_t f4bcfx_d0; 1562 uint8_t f5bc8x_d0; 1563 uint8_t f5bc9x_d0; 1564 uint8_t f5bcax_d0; 1565 uint8_t f5bcbx_d0; 1566 uint8_t f5bccx_d0; 1567 uint8_t f5bcdx_d0; 1568 uint8_t f5bcex_d0; 1569 uint8_t f5bcfx_d0; 1570 uint8_t f6bc8x_d0; 1571 uint8_t f6bc9x_d0; 1572 uint8_t f6bcax_d0; 1573 uint8_t f6bcbx_d0; 1574 uint8_t f6bccx_d0; 1575 uint8_t f6bcdx_d0; 1576 uint8_t f6bcex_d0; 1577 uint8_t f6bcfx_d0; 1578 uint8_t f7bc8x_d0; 1579 uint8_t f7bc9x_d0; 1580 uint8_t f7bcax_d0; 1581 uint8_t f7bcbx_d0; 1582 uint8_t f7bccx_d0; 1583 uint8_t f7bcdx_d0; 1584 uint8_t f7bcex_d0; 1585 uint8_t f7bcfx_d0; 1586 uint8_t bc00_d1; 1587 uint8_t bc01_d1; 1588 uint8_t bc02_d1; 1589 uint8_t bc03_d1; 1590 uint8_t bc04_d1; 1591 uint8_t bc05_d1; 1592 uint8_t bc06_d1; 1593 uint8_t bc07_d1; 1594 uint8_t bc08_d1; 1595 uint8_t bc09_d1; 1596 uint8_t bc0a_d1; 1597 uint8_t bc0b_d1; 1598 uint8_t bc0c_d1; 1599 uint8_t bc0d_d1; 1600 uint8_t bc0e_d1; 1601 uint8_t f0bc6x_d1; 1602 uint8_t f0bccx_d1; 1603 uint8_t f0bcdx_d1; 1604 uint8_t f0bcex_d1; 1605 uint8_t f0bcfx_d1; 1606 uint8_t f1bccx_d1; 1607 uint8_t f1bcdx_d1; 1608 uint8_t f1bcex_d1; 1609 uint8_t f1bcfx_d1; 1610 uint8_t f0bc2x_b0_d1; 1611 uint8_t f0bc3x_b0_d1; 1612 uint8_t f0bc4x_b0_d1; 1613 uint8_t f0bc5x_b0_d1; 1614 uint8_t f0bc8x_b0_d1; 1615 uint8_t f0bc9x_b0_d1; 1616 uint8_t f0bcax_b0_d1; 1617 uint8_t f0bcbx_b0_d1; 1618 uint8_t f1bc2x_b0_d1; 1619 uint8_t f1bc3x_b0_d1; 1620 uint8_t f1bc4x_b0_d1; 1621 uint8_t f1bc5x_b0_d1; 1622 uint8_t f1bc8x_b0_d1; 1623 uint8_t f1bc9x_b0_d1; 1624 uint8_t f1bcax_b0_d1; 1625 uint8_t f1bcbx_b0_d1; 1626 uint8_t f2bc2x_b0_d1; 1627 uint8_t f2bc3x_b0_d1; 1628 uint8_t f2bc4x_b0_d1; 1629 uint8_t f2bc5x_b0_d1; 1630 uint8_t f2bc8x_b0_d1; 1631 uint8_t f2bc9x_b0_d1; 1632 uint8_t f2bcax_b0_d1; 1633 uint8_t f2bcbx_b0_d1; 1634 uint8_t f3bc2x_b0_d1; 1635 uint8_t f3bc3x_b0_d1; 1636 uint8_t f3bc4x_b0_d1; 1637 uint8_t f3bc5x_b0_d1; 1638 uint8_t f3bc8x_b0_d1; 1639 uint8_t f3bc9x_b0_d1; 1640 uint8_t f3bcax_b0_d1; 1641 uint8_t f3bcbx_b0_d1; 1642 uint8_t f0bc2x_b1_d1; 1643 uint8_t f0bc3x_b1_d1; 1644 uint8_t f0bc4x_b1_d1; 1645 uint8_t f0bc5x_b1_d1; 1646 uint8_t f0bc8x_b1_d1; 1647 uint8_t f0bc9x_b1_d1; 1648 uint8_t f0bcax_b1_d1; 1649 uint8_t f0bcbx_b1_d1; 1650 uint8_t f1bc2x_b1_d1; 1651 uint8_t f1bc3x_b1_d1; 1652 uint8_t f1bc4x_b1_d1; 1653 uint8_t f1bc5x_b1_d1; 1654 uint8_t f1bc8x_b1_d1; 1655 uint8_t f1bc9x_b1_d1; 1656 uint8_t f1bcax_b1_d1; 1657 uint8_t f1bcbx_b1_d1; 1658 uint8_t f2bc2x_b1_d1; 1659 uint8_t f2bc3x_b1_d1; 1660 uint8_t f2bc4x_b1_d1; 1661 uint8_t f2bc5x_b1_d1; 1662 uint8_t f2bc8x_b1_d1; 1663 uint8_t f2bc9x_b1_d1; 1664 uint8_t f2bcax_b1_d1; 1665 uint8_t f2bcbx_b1_d1; 1666 uint8_t f3bc2x_b1_d1; 1667 uint8_t f3bc3x_b1_d1; 1668 uint8_t f3bc4x_b1_d1; 1669 uint8_t f3bc5x_b1_d1; 1670 uint8_t f3bc8x_b1_d1; 1671 uint8_t f3bc9x_b1_d1; 1672 uint8_t f3bcax_b1_d1; 1673 uint8_t f3bcbx_b1_d1; 1674 uint8_t f0bc2x_b2_d1; 1675 uint8_t f0bc3x_b2_d1; 1676 uint8_t f0bc4x_b2_d1; 1677 uint8_t f0bc5x_b2_d1; 1678 uint8_t f0bc8x_b2_d1; 1679 uint8_t f0bc9x_b2_d1; 1680 uint8_t f0bcax_b2_d1; 1681 uint8_t f0bcbx_b2_d1; 1682 uint8_t f1bc2x_b2_d1; 1683 uint8_t f1bc3x_b2_d1; 1684 uint8_t f1bc4x_b2_d1; 1685 uint8_t f1bc5x_b2_d1; 1686 uint8_t f1bc8x_b2_d1; 1687 uint8_t f1bc9x_b2_d1; 1688 uint8_t f1bcax_b2_d1; 1689 uint8_t f1bcbx_b2_d1; 1690 uint8_t f2bc2x_b2_d1; 1691 uint8_t f2bc3x_b2_d1; 1692 uint8_t f2bc4x_b2_d1; 1693 uint8_t f2bc5x_b2_d1; 1694 uint8_t f2bc8x_b2_d1; 1695 uint8_t f2bc9x_b2_d1; 1696 uint8_t f2bcax_b2_d1; 1697 uint8_t f2bcbx_b2_d1; 1698 uint8_t f3bc2x_b2_d1; 1699 uint8_t f3bc3x_b2_d1; 1700 uint8_t f3bc4x_b2_d1; 1701 uint8_t f3bc5x_b2_d1; 1702 uint8_t f3bc8x_b2_d1; 1703 uint8_t f3bc9x_b2_d1; 1704 uint8_t f3bcax_b2_d1; 1705 uint8_t f3bcbx_b2_d1; 1706 uint8_t f0bc2x_b3_d1; 1707 uint8_t f0bc3x_b3_d1; 1708 uint8_t f0bc4x_b3_d1; 1709 uint8_t f0bc5x_b3_d1; 1710 uint8_t f0bc8x_b3_d1; 1711 uint8_t f0bc9x_b3_d1; 1712 uint8_t f0bcax_b3_d1; 1713 uint8_t f0bcbx_b3_d1; 1714 uint8_t f1bc2x_b3_d1; 1715 uint8_t f1bc3x_b3_d1; 1716 uint8_t f1bc4x_b3_d1; 1717 uint8_t f1bc5x_b3_d1; 1718 uint8_t f1bc8x_b3_d1; 1719 uint8_t f1bc9x_b3_d1; 1720 uint8_t f1bcax_b3_d1; 1721 uint8_t f1bcbx_b3_d1; 1722 uint8_t f2bc2x_b3_d1; 1723 uint8_t f2bc3x_b3_d1; 1724 uint8_t f2bc4x_b3_d1; 1725 uint8_t f2bc5x_b3_d1; 1726 uint8_t f2bc8x_b3_d1; 1727 uint8_t f2bc9x_b3_d1; 1728 uint8_t f2bcax_b3_d1; 1729 uint8_t f2bcbx_b3_d1; 1730 uint8_t f3bc2x_b3_d1; 1731 uint8_t f3bc3x_b3_d1; 1732 uint8_t f3bc4x_b3_d1; 1733 uint8_t f3bc5x_b3_d1; 1734 uint8_t f3bc8x_b3_d1; 1735 uint8_t f3bc9x_b3_d1; 1736 uint8_t f3bcax_b3_d1; 1737 uint8_t f3bcbx_b3_d1; 1738 uint8_t f0bc2x_b4_d1; 1739 uint8_t f0bc3x_b4_d1; 1740 uint8_t f0bc4x_b4_d1; 1741 uint8_t f0bc5x_b4_d1; 1742 uint8_t f0bc8x_b4_d1; 1743 uint8_t f0bc9x_b4_d1; 1744 uint8_t f0bcax_b4_d1; 1745 uint8_t f0bcbx_b4_d1; 1746 uint8_t f1bc2x_b4_d1; 1747 uint8_t f1bc3x_b4_d1; 1748 uint8_t f1bc4x_b4_d1; 1749 uint8_t f1bc5x_b4_d1; 1750 uint8_t f1bc8x_b4_d1; 1751 uint8_t f1bc9x_b4_d1; 1752 uint8_t f1bcax_b4_d1; 1753 uint8_t f1bcbx_b4_d1; 1754 uint8_t f2bc2x_b4_d1; 1755 uint8_t f2bc3x_b4_d1; 1756 uint8_t f2bc4x_b4_d1; 1757 uint8_t f2bc5x_b4_d1; 1758 uint8_t f2bc8x_b4_d1; 1759 uint8_t f2bc9x_b4_d1; 1760 uint8_t f2bcax_b4_d1; 1761 uint8_t f2bcbx_b4_d1; 1762 uint8_t f3bc2x_b4_d1; 1763 uint8_t f3bc3x_b4_d1; 1764 uint8_t f3bc4x_b4_d1; 1765 uint8_t f3bc5x_b4_d1; 1766 uint8_t f3bc8x_b4_d1; 1767 uint8_t f3bc9x_b4_d1; 1768 uint8_t f3bcax_b4_d1; 1769 uint8_t f3bcbx_b4_d1; 1770 uint8_t f0bc2x_b5_d1; 1771 uint8_t f0bc3x_b5_d1; 1772 uint8_t f0bc4x_b5_d1; 1773 uint8_t f0bc5x_b5_d1; 1774 uint8_t f0bc8x_b5_d1; 1775 uint8_t f0bc9x_b5_d1; 1776 uint8_t f0bcax_b5_d1; 1777 uint8_t f0bcbx_b5_d1; 1778 uint8_t f1bc2x_b5_d1; 1779 uint8_t f1bc3x_b5_d1; 1780 uint8_t f1bc4x_b5_d1; 1781 uint8_t f1bc5x_b5_d1; 1782 uint8_t f1bc8x_b5_d1; 1783 uint8_t f1bc9x_b5_d1; 1784 uint8_t f1bcax_b5_d1; 1785 uint8_t f1bcbx_b5_d1; 1786 uint8_t f2bc2x_b5_d1; 1787 uint8_t f2bc3x_b5_d1; 1788 uint8_t f2bc4x_b5_d1; 1789 uint8_t f2bc5x_b5_d1; 1790 uint8_t f2bc8x_b5_d1; 1791 uint8_t f2bc9x_b5_d1; 1792 uint8_t f2bcax_b5_d1; 1793 uint8_t f2bcbx_b5_d1; 1794 uint8_t f3bc2x_b5_d1; 1795 uint8_t f3bc3x_b5_d1; 1796 uint8_t f3bc4x_b5_d1; 1797 uint8_t f3bc5x_b5_d1; 1798 uint8_t f3bc8x_b5_d1; 1799 uint8_t f3bc9x_b5_d1; 1800 uint8_t f3bcax_b5_d1; 1801 uint8_t f3bcbx_b5_d1; 1802 uint8_t f0bc2x_b6_d1; 1803 uint8_t f0bc3x_b6_d1; 1804 uint8_t f0bc4x_b6_d1; 1805 uint8_t f0bc5x_b6_d1; 1806 uint8_t f0bc8x_b6_d1; 1807 uint8_t f0bc9x_b6_d1; 1808 uint8_t f0bcax_b6_d1; 1809 uint8_t f0bcbx_b6_d1; 1810 uint8_t f1bc2x_b6_d1; 1811 uint8_t f1bc3x_b6_d1; 1812 uint8_t f1bc4x_b6_d1; 1813 uint8_t f1bc5x_b6_d1; 1814 uint8_t f1bc8x_b6_d1; 1815 uint8_t f1bc9x_b6_d1; 1816 uint8_t f1bcax_b6_d1; 1817 uint8_t f1bcbx_b6_d1; 1818 uint8_t f2bc2x_b6_d1; 1819 uint8_t f2bc3x_b6_d1; 1820 uint8_t f2bc4x_b6_d1; 1821 uint8_t f2bc5x_b6_d1; 1822 uint8_t f2bc8x_b6_d1; 1823 uint8_t f2bc9x_b6_d1; 1824 uint8_t f2bcax_b6_d1; 1825 uint8_t f2bcbx_b6_d1; 1826 uint8_t f3bc2x_b6_d1; 1827 uint8_t f3bc3x_b6_d1; 1828 uint8_t f3bc4x_b6_d1; 1829 uint8_t f3bc5x_b6_d1; 1830 uint8_t f3bc8x_b6_d1; 1831 uint8_t f3bc9x_b6_d1; 1832 uint8_t f3bcax_b6_d1; 1833 uint8_t f3bcbx_b6_d1; 1834 uint8_t f0bc2x_b7_d1; 1835 uint8_t f0bc3x_b7_d1; 1836 uint8_t f0bc4x_b7_d1; 1837 uint8_t f0bc5x_b7_d1; 1838 uint8_t f0bc8x_b7_d1; 1839 uint8_t f0bc9x_b7_d1; 1840 uint8_t f0bcax_b7_d1; 1841 uint8_t f0bcbx_b7_d1; 1842 uint8_t f1bc2x_b7_d1; 1843 uint8_t f1bc3x_b7_d1; 1844 uint8_t f1bc4x_b7_d1; 1845 uint8_t f1bc5x_b7_d1; 1846 uint8_t f1bc8x_b7_d1; 1847 uint8_t f1bc9x_b7_d1; 1848 uint8_t f1bcax_b7_d1; 1849 uint8_t f1bcbx_b7_d1; 1850 uint8_t f2bc2x_b7_d1; 1851 uint8_t f2bc3x_b7_d1; 1852 uint8_t f2bc4x_b7_d1; 1853 uint8_t f2bc5x_b7_d1; 1854 uint8_t f2bc8x_b7_d1; 1855 uint8_t f2bc9x_b7_d1; 1856 uint8_t f2bcax_b7_d1; 1857 uint8_t f2bcbx_b7_d1; 1858 uint8_t f3bc2x_b7_d1; 1859 uint8_t f3bc3x_b7_d1; 1860 uint8_t f3bc4x_b7_d1; 1861 uint8_t f3bc5x_b7_d1; 1862 uint8_t f3bc8x_b7_d1; 1863 uint8_t f3bc9x_b7_d1; 1864 uint8_t f3bcax_b7_d1; 1865 uint8_t f3bcbx_b7_d1; 1866 uint8_t f0bc2x_b8_d1; 1867 uint8_t f0bc3x_b8_d1; 1868 uint8_t f0bc4x_b8_d1; 1869 uint8_t f0bc5x_b8_d1; 1870 uint8_t f0bc8x_b8_d1; 1871 uint8_t f0bc9x_b8_d1; 1872 uint8_t f0bcax_b8_d1; 1873 uint8_t f0bcbx_b8_d1; 1874 uint8_t f1bc2x_b8_d1; 1875 uint8_t f1bc3x_b8_d1; 1876 uint8_t f1bc4x_b8_d1; 1877 uint8_t f1bc5x_b8_d1; 1878 uint8_t f1bc8x_b8_d1; 1879 uint8_t f1bc9x_b8_d1; 1880 uint8_t f1bcax_b8_d1; 1881 uint8_t f1bcbx_b8_d1; 1882 uint8_t f2bc2x_b8_d1; 1883 uint8_t f2bc3x_b8_d1; 1884 uint8_t f2bc4x_b8_d1; 1885 uint8_t f2bc5x_b8_d1; 1886 uint8_t f2bc8x_b8_d1; 1887 uint8_t f2bc9x_b8_d1; 1888 uint8_t f2bcax_b8_d1; 1889 uint8_t f2bcbx_b8_d1; 1890 uint8_t f3bc2x_b8_d1; 1891 uint8_t f3bc3x_b8_d1; 1892 uint8_t f3bc4x_b8_d1; 1893 uint8_t f3bc5x_b8_d1; 1894 uint8_t f3bc8x_b8_d1; 1895 uint8_t f3bc9x_b8_d1; 1896 uint8_t f3bcax_b8_d1; 1897 uint8_t f3bcbx_b8_d1; 1898 uint8_t f5bc5x_d1; 1899 uint8_t f5bc6x_d1; 1900 uint8_t f4bc8x_d1; 1901 uint8_t f4bc9x_d1; 1902 uint8_t f4bcax_d1; 1903 uint8_t f4bcbx_d1; 1904 uint8_t f4bccx_d1; 1905 uint8_t f4bcdx_d1; 1906 uint8_t f4bcex_d1; 1907 uint8_t f4bcfx_d1; 1908 uint8_t f5bc8x_d1; 1909 uint8_t f5bc9x_d1; 1910 uint8_t f5bcax_d1; 1911 uint8_t f5bcbx_d1; 1912 uint8_t f5bccx_d1; 1913 uint8_t f5bcdx_d1; 1914 uint8_t f5bcex_d1; 1915 uint8_t f5bcfx_d1; 1916 uint8_t f6bc8x_d1; 1917 uint8_t f6bc9x_d1; 1918 uint8_t f6bcax_d1; 1919 uint8_t f6bcbx_d1; 1920 uint8_t f6bccx_d1; 1921 uint8_t f6bcdx_d1; 1922 uint8_t f6bcex_d1; 1923 uint8_t f6bcfx_d1; 1924 uint8_t f7bc8x_d1; 1925 uint8_t f7bc9x_d1; 1926 uint8_t f7bcax_d1; 1927 uint8_t f7bcbx_d1; 1928 uint8_t f7bccx_d1; 1929 uint8_t f7bcdx_d1; 1930 uint8_t f7bcex_d1; 1931 uint8_t f7bcfx_d1; 1932 uint16_t alt_cas_l; 1933 uint8_t alt_wcas_l; 1934 uint8_t d4misc; 1935 } __packed; 1936 1937 struct ddr4lr2d { 1938 uint8_t reserved00; 1939 uint8_t msg_misc; 1940 uint16_t pmu_revision; 1941 uint8_t pstate; 1942 uint8_t pll_bypass_en; 1943 uint16_t dramfreq; 1944 uint8_t dfi_freq_ratio; 1945 uint8_t bpznres_val; 1946 uint8_t phy_odt_impedance; 1947 uint8_t phy_drv_impedance; 1948 uint8_t phy_vref; 1949 uint8_t dram_type; 1950 uint8_t disabled_dbyte; 1951 uint8_t enabled_dqs; 1952 uint8_t cs_present; 1953 uint8_t cs_present_d0; 1954 uint8_t cs_present_d1; 1955 uint8_t addr_mirror; 1956 uint8_t cs_test_fail; 1957 uint8_t phy_cfg; 1958 uint16_t sequence_ctrl; 1959 uint8_t hdt_ctrl; 1960 uint8_t rx2d_train_opt; 1961 uint8_t tx2d_train_opt; 1962 uint8_t share2dvref_result; 1963 uint8_t delay_weight2d; 1964 uint8_t voltage_weight2d; 1965 uint8_t reserved1e[0x22 - 0x1e]; 1966 uint16_t phy_config_override; 1967 uint8_t dfimrlmargin; 1968 uint8_t r0_rx_clk_dly_margin; 1969 uint8_t r0_vref_dac_margin; 1970 uint8_t r0_tx_dq_dly_margin; 1971 uint8_t r0_device_vref_margin; 1972 uint8_t reserved29[0x33 - 0x29]; 1973 uint8_t r1_rx_clk_dly_margin; 1974 uint8_t r1_vref_dac_margin; 1975 uint8_t r1_tx_dq_dly_margin; 1976 uint8_t r1_device_vref_margin; 1977 uint8_t reserved37[0x41 - 0x37]; 1978 uint8_t r2_rx_clk_dly_margin; 1979 uint8_t r2_vref_dac_margin; 1980 uint8_t r2_tx_dq_dly_margin; 1981 uint8_t r2_device_vref_margin; 1982 uint8_t reserved45[0x4f - 0x45]; 1983 uint8_t r3_rx_clk_dly_margin; 1984 uint8_t r3_vref_dac_margin; 1985 uint8_t r3_tx_dq_dly_margin; 1986 uint8_t r3_device_vref_margin; 1987 uint8_t reserved53[0x5e - 0x53]; 1988 uint16_t mr0; 1989 uint16_t mr1; 1990 uint16_t mr2; 1991 uint16_t mr3; 1992 uint16_t mr4; 1993 uint16_t mr5; 1994 uint16_t mr6; 1995 uint8_t x16present; 1996 uint8_t cs_setup_gddec; 1997 uint16_t rtt_nom_wr_park0; 1998 uint16_t rtt_nom_wr_park1; 1999 uint16_t rtt_nom_wr_park2; 2000 uint16_t rtt_nom_wr_park3; 2001 uint16_t rtt_nom_wr_park4; 2002 uint16_t rtt_nom_wr_park5; 2003 uint16_t rtt_nom_wr_park6; 2004 uint16_t rtt_nom_wr_park7; 2005 uint8_t acsm_odt_ctrl0; 2006 uint8_t acsm_odt_ctrl1; 2007 uint8_t acsm_odt_ctrl2; 2008 uint8_t acsm_odt_ctrl3; 2009 uint8_t acsm_odt_ctrl4; 2010 uint8_t acsm_odt_ctrl5; 2011 uint8_t acsm_odt_ctrl6; 2012 uint8_t acsm_odt_ctrl7; 2013 uint8_t vref_dq_r0nib0; 2014 uint8_t vref_dq_r0nib1; 2015 uint8_t vref_dq_r0nib2; 2016 uint8_t vref_dq_r0nib3; 2017 uint8_t vref_dq_r0nib4; 2018 uint8_t vref_dq_r0nib5; 2019 uint8_t vref_dq_r0nib6; 2020 uint8_t vref_dq_r0nib7; 2021 uint8_t vref_dq_r0nib8; 2022 uint8_t vref_dq_r0nib9; 2023 uint8_t vref_dq_r0nib10; 2024 uint8_t vref_dq_r0nib11; 2025 uint8_t vref_dq_r0nib12; 2026 uint8_t vref_dq_r0nib13; 2027 uint8_t vref_dq_r0nib14; 2028 uint8_t vref_dq_r0nib15; 2029 uint8_t vref_dq_r0nib16; 2030 uint8_t vref_dq_r0nib17; 2031 uint8_t vref_dq_r0nib18; 2032 uint8_t vref_dq_r0nib19; 2033 uint8_t vref_dq_r1nib0; 2034 uint8_t vref_dq_r1nib1; 2035 uint8_t vref_dq_r1nib2; 2036 uint8_t vref_dq_r1nib3; 2037 uint8_t vref_dq_r1nib4; 2038 uint8_t vref_dq_r1nib5; 2039 uint8_t vref_dq_r1nib6; 2040 uint8_t vref_dq_r1nib7; 2041 uint8_t vref_dq_r1nib8; 2042 uint8_t vref_dq_r1nib9; 2043 uint8_t vref_dq_r1nib10; 2044 uint8_t vref_dq_r1nib11; 2045 uint8_t vref_dq_r1nib12; 2046 uint8_t vref_dq_r1nib13; 2047 uint8_t vref_dq_r1nib14; 2048 uint8_t vref_dq_r1nib15; 2049 uint8_t vref_dq_r1nib16; 2050 uint8_t vref_dq_r1nib17; 2051 uint8_t vref_dq_r1nib18; 2052 uint8_t vref_dq_r1nib19; 2053 uint8_t vref_dq_r2nib0; 2054 uint8_t vref_dq_r2nib1; 2055 uint8_t vref_dq_r2nib2; 2056 uint8_t vref_dq_r2nib3; 2057 uint8_t vref_dq_r2nib4; 2058 uint8_t vref_dq_r2nib5; 2059 uint8_t vref_dq_r2nib6; 2060 uint8_t vref_dq_r2nib7; 2061 uint8_t vref_dq_r2nib8; 2062 uint8_t vref_dq_r2nib9; 2063 uint8_t vref_dq_r2nib10; 2064 uint8_t vref_dq_r2nib11; 2065 uint8_t vref_dq_r2nib12; 2066 uint8_t vref_dq_r2nib13; 2067 uint8_t vref_dq_r2nib14; 2068 uint8_t vref_dq_r2nib15; 2069 uint8_t vref_dq_r2nib16; 2070 uint8_t vref_dq_r2nib17; 2071 uint8_t vref_dq_r2nib18; 2072 uint8_t vref_dq_r2nib19; 2073 uint8_t vref_dq_r3nib0; 2074 uint8_t vref_dq_r3nib1; 2075 uint8_t vref_dq_r3nib2; 2076 uint8_t vref_dq_r3nib3; 2077 uint8_t vref_dq_r3nib4; 2078 uint8_t vref_dq_r3nib5; 2079 uint8_t vref_dq_r3nib6; 2080 uint8_t vref_dq_r3nib7; 2081 uint8_t vref_dq_r3nib8; 2082 uint8_t vref_dq_r3nib9; 2083 uint8_t vref_dq_r3nib10; 2084 uint8_t vref_dq_r3nib11; 2085 uint8_t vref_dq_r3nib12; 2086 uint8_t vref_dq_r3nib13; 2087 uint8_t vref_dq_r3nib14; 2088 uint8_t vref_dq_r3nib15; 2089 uint8_t vref_dq_r3nib16; 2090 uint8_t vref_dq_r3nib17; 2091 uint8_t vref_dq_r3nib18; 2092 uint8_t vref_dq_r3nib19; 2093 uint8_t f0rc00_d0; 2094 uint8_t f0rc01_d0; 2095 uint8_t f0rc02_d0; 2096 uint8_t f0rc03_d0; 2097 uint8_t f0rc04_d0; 2098 uint8_t f0rc05_d0; 2099 uint8_t f0rc06_d0; 2100 uint8_t f0rc07_d0; 2101 uint8_t f0rc08_d0; 2102 uint8_t f0rc09_d0; 2103 uint8_t f0rc0a_d0; 2104 uint8_t f0rc0b_d0; 2105 uint8_t f0rc0c_d0; 2106 uint8_t f0rc0d_d0; 2107 uint8_t f0rc0e_d0; 2108 uint8_t f0rc0f_d0; 2109 uint8_t f0rc1x_d0; 2110 uint8_t f0rc2x_d0; 2111 uint8_t f0rc3x_d0; 2112 uint8_t f0rc4x_d0; 2113 uint8_t f0rc5x_d0; 2114 uint8_t f0rc6x_d0; 2115 uint8_t f0rc7x_d0; 2116 uint8_t f0rc8x_d0; 2117 uint8_t f0rc9x_d0; 2118 uint8_t f0rcax_d0; 2119 uint8_t f0rcbx_d0; 2120 uint8_t f1rc00_d0; 2121 uint8_t f1rc01_d0; 2122 uint8_t f1rc02_d0; 2123 uint8_t f1rc03_d0; 2124 uint8_t f1rc04_d0; 2125 uint8_t f1rc05_d0; 2126 uint8_t f1rc06_d0; 2127 uint8_t f1rc07_d0; 2128 uint8_t f1rc08_d0; 2129 uint8_t f1rc09_d0; 2130 uint8_t f1rc0a_d0; 2131 uint8_t f1rc0b_d0; 2132 uint8_t f1rc0c_d0; 2133 uint8_t f1rc0d_d0; 2134 uint8_t f1rc0e_d0; 2135 uint8_t f1rc0f_d0; 2136 uint8_t f1rc1x_d0; 2137 uint8_t f1rc2x_d0; 2138 uint8_t f1rc3x_d0; 2139 uint8_t f1rc4x_d0; 2140 uint8_t f1rc5x_d0; 2141 uint8_t f1rc6x_d0; 2142 uint8_t f1rc7x_d0; 2143 uint8_t f1rc8x_d0; 2144 uint8_t f1rc9x_d0; 2145 uint8_t f1rcax_d0; 2146 uint8_t f1rcbx_d0; 2147 uint8_t f0rc00_d1; 2148 uint8_t f0rc01_d1; 2149 uint8_t f0rc02_d1; 2150 uint8_t f0rc03_d1; 2151 uint8_t f0rc04_d1; 2152 uint8_t f0rc05_d1; 2153 uint8_t f0rc06_d1; 2154 uint8_t f0rc07_d1; 2155 uint8_t f0rc08_d1; 2156 uint8_t f0rc09_d1; 2157 uint8_t f0rc0a_d1; 2158 uint8_t f0rc0b_d1; 2159 uint8_t f0rc0c_d1; 2160 uint8_t f0rc0d_d1; 2161 uint8_t f0rc0e_d1; 2162 uint8_t f0rc0f_d1; 2163 uint8_t f0rc1x_d1; 2164 uint8_t f0rc2x_d1; 2165 uint8_t f0rc3x_d1; 2166 uint8_t f0rc4x_d1; 2167 uint8_t f0rc5x_d1; 2168 uint8_t f0rc6x_d1; 2169 uint8_t f0rc7x_d1; 2170 uint8_t f0rc8x_d1; 2171 uint8_t f0rc9x_d1; 2172 uint8_t f0rcax_d1; 2173 uint8_t f0rcbx_d1; 2174 uint8_t f1rc00_d1; 2175 uint8_t f1rc01_d1; 2176 uint8_t f1rc02_d1; 2177 uint8_t f1rc03_d1; 2178 uint8_t f1rc04_d1; 2179 uint8_t f1rc05_d1; 2180 uint8_t f1rc06_d1; 2181 uint8_t f1rc07_d1; 2182 uint8_t f1rc08_d1; 2183 uint8_t f1rc09_d1; 2184 uint8_t f1rc0a_d1; 2185 uint8_t f1rc0b_d1; 2186 uint8_t f1rc0c_d1; 2187 uint8_t f1rc0d_d1; 2188 uint8_t f1rc0e_d1; 2189 uint8_t f1rc0f_d1; 2190 uint8_t f1rc1x_d1; 2191 uint8_t f1rc2x_d1; 2192 uint8_t f1rc3x_d1; 2193 uint8_t f1rc4x_d1; 2194 uint8_t f1rc5x_d1; 2195 uint8_t f1rc6x_d1; 2196 uint8_t f1rc7x_d1; 2197 uint8_t f1rc8x_d1; 2198 uint8_t f1rc9x_d1; 2199 uint8_t f1rcax_d1; 2200 uint8_t f1rcbx_d1; 2201 uint8_t bc00_d0; 2202 uint8_t bc01_d0; 2203 uint8_t bc02_d0; 2204 uint8_t bc03_d0; 2205 uint8_t bc04_d0; 2206 uint8_t bc05_d0; 2207 uint8_t bc06_d0; 2208 uint8_t bc07_d0; 2209 uint8_t bc08_d0; 2210 uint8_t bc09_d0; 2211 uint8_t bc0a_d0; 2212 uint8_t bc0b_d0; 2213 uint8_t bc0c_d0; 2214 uint8_t bc0d_d0; 2215 uint8_t bc0e_d0; 2216 uint8_t f0bc6x_d0; 2217 uint8_t f0bccx_d0; 2218 uint8_t f0bcdx_d0; 2219 uint8_t f0bcex_d0; 2220 uint8_t f0bcfx_d0; 2221 uint8_t f1bccx_d0; 2222 uint8_t f1bcdx_d0; 2223 uint8_t f1bcex_d0; 2224 uint8_t f1bcfx_d0; 2225 uint8_t f0bc2x_b0_d0; 2226 uint8_t f0bc3x_b0_d0; 2227 uint8_t f0bc4x_b0_d0; 2228 uint8_t f0bc5x_b0_d0; 2229 uint8_t f0bc8x_b0_d0; 2230 uint8_t f0bc9x_b0_d0; 2231 uint8_t f0bcax_b0_d0; 2232 uint8_t f0bcbx_b0_d0; 2233 uint8_t f1bc2x_b0_d0; 2234 uint8_t f1bc3x_b0_d0; 2235 uint8_t f1bc4x_b0_d0; 2236 uint8_t f1bc5x_b0_d0; 2237 uint8_t f1bc8x_b0_d0; 2238 uint8_t f1bc9x_b0_d0; 2239 uint8_t f1bcax_b0_d0; 2240 uint8_t f1bcbx_b0_d0; 2241 uint8_t f2bc2x_b0_d0; 2242 uint8_t f2bc3x_b0_d0; 2243 uint8_t f2bc4x_b0_d0; 2244 uint8_t f2bc5x_b0_d0; 2245 uint8_t f2bc8x_b0_d0; 2246 uint8_t f2bc9x_b0_d0; 2247 uint8_t f2bcax_b0_d0; 2248 uint8_t f2bcbx_b0_d0; 2249 uint8_t f3bc2x_b0_d0; 2250 uint8_t f3bc3x_b0_d0; 2251 uint8_t f3bc4x_b0_d0; 2252 uint8_t f3bc5x_b0_d0; 2253 uint8_t f3bc8x_b0_d0; 2254 uint8_t f3bc9x_b0_d0; 2255 uint8_t f3bcax_b0_d0; 2256 uint8_t f3bcbx_b0_d0; 2257 uint8_t f0bc2x_b1_d0; 2258 uint8_t f0bc3x_b1_d0; 2259 uint8_t f0bc4x_b1_d0; 2260 uint8_t f0bc5x_b1_d0; 2261 uint8_t f0bc8x_b1_d0; 2262 uint8_t f0bc9x_b1_d0; 2263 uint8_t f0bcax_b1_d0; 2264 uint8_t f0bcbx_b1_d0; 2265 uint8_t f1bc2x_b1_d0; 2266 uint8_t f1bc3x_b1_d0; 2267 uint8_t f1bc4x_b1_d0; 2268 uint8_t f1bc5x_b1_d0; 2269 uint8_t f1bc8x_b1_d0; 2270 uint8_t f1bc9x_b1_d0; 2271 uint8_t f1bcax_b1_d0; 2272 uint8_t f1bcbx_b1_d0; 2273 uint8_t f2bc2x_b1_d0; 2274 uint8_t f2bc3x_b1_d0; 2275 uint8_t f2bc4x_b1_d0; 2276 uint8_t f2bc5x_b1_d0; 2277 uint8_t f2bc8x_b1_d0; 2278 uint8_t f2bc9x_b1_d0; 2279 uint8_t f2bcax_b1_d0; 2280 uint8_t f2bcbx_b1_d0; 2281 uint8_t f3bc2x_b1_d0; 2282 uint8_t f3bc3x_b1_d0; 2283 uint8_t f3bc4x_b1_d0; 2284 uint8_t f3bc5x_b1_d0; 2285 uint8_t f3bc8x_b1_d0; 2286 uint8_t f3bc9x_b1_d0; 2287 uint8_t f3bcax_b1_d0; 2288 uint8_t f3bcbx_b1_d0; 2289 uint8_t f0bc2x_b2_d0; 2290 uint8_t f0bc3x_b2_d0; 2291 uint8_t f0bc4x_b2_d0; 2292 uint8_t f0bc5x_b2_d0; 2293 uint8_t f0bc8x_b2_d0; 2294 uint8_t f0bc9x_b2_d0; 2295 uint8_t f0bcax_b2_d0; 2296 uint8_t f0bcbx_b2_d0; 2297 uint8_t f1bc2x_b2_d0; 2298 uint8_t f1bc3x_b2_d0; 2299 uint8_t f1bc4x_b2_d0; 2300 uint8_t f1bc5x_b2_d0; 2301 uint8_t f1bc8x_b2_d0; 2302 uint8_t f1bc9x_b2_d0; 2303 uint8_t f1bcax_b2_d0; 2304 uint8_t f1bcbx_b2_d0; 2305 uint8_t f2bc2x_b2_d0; 2306 uint8_t f2bc3x_b2_d0; 2307 uint8_t f2bc4x_b2_d0; 2308 uint8_t f2bc5x_b2_d0; 2309 uint8_t f2bc8x_b2_d0; 2310 uint8_t f2bc9x_b2_d0; 2311 uint8_t f2bcax_b2_d0; 2312 uint8_t f2bcbx_b2_d0; 2313 uint8_t f3bc2x_b2_d0; 2314 uint8_t f3bc3x_b2_d0; 2315 uint8_t f3bc4x_b2_d0; 2316 uint8_t f3bc5x_b2_d0; 2317 uint8_t f3bc8x_b2_d0; 2318 uint8_t f3bc9x_b2_d0; 2319 uint8_t f3bcax_b2_d0; 2320 uint8_t f3bcbx_b2_d0; 2321 uint8_t f0bc2x_b3_d0; 2322 uint8_t f0bc3x_b3_d0; 2323 uint8_t f0bc4x_b3_d0; 2324 uint8_t f0bc5x_b3_d0; 2325 uint8_t f0bc8x_b3_d0; 2326 uint8_t f0bc9x_b3_d0; 2327 uint8_t f0bcax_b3_d0; 2328 uint8_t f0bcbx_b3_d0; 2329 uint8_t f1bc2x_b3_d0; 2330 uint8_t f1bc3x_b3_d0; 2331 uint8_t f1bc4x_b3_d0; 2332 uint8_t f1bc5x_b3_d0; 2333 uint8_t f1bc8x_b3_d0; 2334 uint8_t f1bc9x_b3_d0; 2335 uint8_t f1bcax_b3_d0; 2336 uint8_t f1bcbx_b3_d0; 2337 uint8_t f2bc2x_b3_d0; 2338 uint8_t f2bc3x_b3_d0; 2339 uint8_t f2bc4x_b3_d0; 2340 uint8_t f2bc5x_b3_d0; 2341 uint8_t f2bc8x_b3_d0; 2342 uint8_t f2bc9x_b3_d0; 2343 uint8_t f2bcax_b3_d0; 2344 uint8_t f2bcbx_b3_d0; 2345 uint8_t f3bc2x_b3_d0; 2346 uint8_t f3bc3x_b3_d0; 2347 uint8_t f3bc4x_b3_d0; 2348 uint8_t f3bc5x_b3_d0; 2349 uint8_t f3bc8x_b3_d0; 2350 uint8_t f3bc9x_b3_d0; 2351 uint8_t f3bcax_b3_d0; 2352 uint8_t f3bcbx_b3_d0; 2353 uint8_t f0bc2x_b4_d0; 2354 uint8_t f0bc3x_b4_d0; 2355 uint8_t f0bc4x_b4_d0; 2356 uint8_t f0bc5x_b4_d0; 2357 uint8_t f0bc8x_b4_d0; 2358 uint8_t f0bc9x_b4_d0; 2359 uint8_t f0bcax_b4_d0; 2360 uint8_t f0bcbx_b4_d0; 2361 uint8_t f1bc2x_b4_d0; 2362 uint8_t f1bc3x_b4_d0; 2363 uint8_t f1bc4x_b4_d0; 2364 uint8_t f1bc5x_b4_d0; 2365 uint8_t f1bc8x_b4_d0; 2366 uint8_t f1bc9x_b4_d0; 2367 uint8_t f1bcax_b4_d0; 2368 uint8_t f1bcbx_b4_d0; 2369 uint8_t f2bc2x_b4_d0; 2370 uint8_t f2bc3x_b4_d0; 2371 uint8_t f2bc4x_b4_d0; 2372 uint8_t f2bc5x_b4_d0; 2373 uint8_t f2bc8x_b4_d0; 2374 uint8_t f2bc9x_b4_d0; 2375 uint8_t f2bcax_b4_d0; 2376 uint8_t f2bcbx_b4_d0; 2377 uint8_t f3bc2x_b4_d0; 2378 uint8_t f3bc3x_b4_d0; 2379 uint8_t f3bc4x_b4_d0; 2380 uint8_t f3bc5x_b4_d0; 2381 uint8_t f3bc8x_b4_d0; 2382 uint8_t f3bc9x_b4_d0; 2383 uint8_t f3bcax_b4_d0; 2384 uint8_t f3bcbx_b4_d0; 2385 uint8_t f0bc2x_b5_d0; 2386 uint8_t f0bc3x_b5_d0; 2387 uint8_t f0bc4x_b5_d0; 2388 uint8_t f0bc5x_b5_d0; 2389 uint8_t f0bc8x_b5_d0; 2390 uint8_t f0bc9x_b5_d0; 2391 uint8_t f0bcax_b5_d0; 2392 uint8_t f0bcbx_b5_d0; 2393 uint8_t f1bc2x_b5_d0; 2394 uint8_t f1bc3x_b5_d0; 2395 uint8_t f1bc4x_b5_d0; 2396 uint8_t f1bc5x_b5_d0; 2397 uint8_t f1bc8x_b5_d0; 2398 uint8_t f1bc9x_b5_d0; 2399 uint8_t f1bcax_b5_d0; 2400 uint8_t f1bcbx_b5_d0; 2401 uint8_t f2bc2x_b5_d0; 2402 uint8_t f2bc3x_b5_d0; 2403 uint8_t f2bc4x_b5_d0; 2404 uint8_t f2bc5x_b5_d0; 2405 uint8_t f2bc8x_b5_d0; 2406 uint8_t f2bc9x_b5_d0; 2407 uint8_t f2bcax_b5_d0; 2408 uint8_t f2bcbx_b5_d0; 2409 uint8_t f3bc2x_b5_d0; 2410 uint8_t f3bc3x_b5_d0; 2411 uint8_t f3bc4x_b5_d0; 2412 uint8_t f3bc5x_b5_d0; 2413 uint8_t f3bc8x_b5_d0; 2414 uint8_t f3bc9x_b5_d0; 2415 uint8_t f3bcax_b5_d0; 2416 uint8_t f3bcbx_b5_d0; 2417 uint8_t f0bc2x_b6_d0; 2418 uint8_t f0bc3x_b6_d0; 2419 uint8_t f0bc4x_b6_d0; 2420 uint8_t f0bc5x_b6_d0; 2421 uint8_t f0bc8x_b6_d0; 2422 uint8_t f0bc9x_b6_d0; 2423 uint8_t f0bcax_b6_d0; 2424 uint8_t f0bcbx_b6_d0; 2425 uint8_t f1bc2x_b6_d0; 2426 uint8_t f1bc3x_b6_d0; 2427 uint8_t f1bc4x_b6_d0; 2428 uint8_t f1bc5x_b6_d0; 2429 uint8_t f1bc8x_b6_d0; 2430 uint8_t f1bc9x_b6_d0; 2431 uint8_t f1bcax_b6_d0; 2432 uint8_t f1bcbx_b6_d0; 2433 uint8_t f2bc2x_b6_d0; 2434 uint8_t f2bc3x_b6_d0; 2435 uint8_t f2bc4x_b6_d0; 2436 uint8_t f2bc5x_b6_d0; 2437 uint8_t f2bc8x_b6_d0; 2438 uint8_t f2bc9x_b6_d0; 2439 uint8_t f2bcax_b6_d0; 2440 uint8_t f2bcbx_b6_d0; 2441 uint8_t f3bc2x_b6_d0; 2442 uint8_t f3bc3x_b6_d0; 2443 uint8_t f3bc4x_b6_d0; 2444 uint8_t f3bc5x_b6_d0; 2445 uint8_t f3bc8x_b6_d0; 2446 uint8_t f3bc9x_b6_d0; 2447 uint8_t f3bcax_b6_d0; 2448 uint8_t f3bcbx_b6_d0; 2449 uint8_t f0bc2x_b7_d0; 2450 uint8_t f0bc3x_b7_d0; 2451 uint8_t f0bc4x_b7_d0; 2452 uint8_t f0bc5x_b7_d0; 2453 uint8_t f0bc8x_b7_d0; 2454 uint8_t f0bc9x_b7_d0; 2455 uint8_t f0bcax_b7_d0; 2456 uint8_t f0bcbx_b7_d0; 2457 uint8_t f1bc2x_b7_d0; 2458 uint8_t f1bc3x_b7_d0; 2459 uint8_t f1bc4x_b7_d0; 2460 uint8_t f1bc5x_b7_d0; 2461 uint8_t f1bc8x_b7_d0; 2462 uint8_t f1bc9x_b7_d0; 2463 uint8_t f1bcax_b7_d0; 2464 uint8_t f1bcbx_b7_d0; 2465 uint8_t f2bc2x_b7_d0; 2466 uint8_t f2bc3x_b7_d0; 2467 uint8_t f2bc4x_b7_d0; 2468 uint8_t f2bc5x_b7_d0; 2469 uint8_t f2bc8x_b7_d0; 2470 uint8_t f2bc9x_b7_d0; 2471 uint8_t f2bcax_b7_d0; 2472 uint8_t f2bcbx_b7_d0; 2473 uint8_t f3bc2x_b7_d0; 2474 uint8_t f3bc3x_b7_d0; 2475 uint8_t f3bc4x_b7_d0; 2476 uint8_t f3bc5x_b7_d0; 2477 uint8_t f3bc8x_b7_d0; 2478 uint8_t f3bc9x_b7_d0; 2479 uint8_t f3bcax_b7_d0; 2480 uint8_t f3bcbx_b7_d0; 2481 uint8_t f0bc2x_b8_d0; 2482 uint8_t f0bc3x_b8_d0; 2483 uint8_t f0bc4x_b8_d0; 2484 uint8_t f0bc5x_b8_d0; 2485 uint8_t f0bc8x_b8_d0; 2486 uint8_t f0bc9x_b8_d0; 2487 uint8_t f0bcax_b8_d0; 2488 uint8_t f0bcbx_b8_d0; 2489 uint8_t f1bc2x_b8_d0; 2490 uint8_t f1bc3x_b8_d0; 2491 uint8_t f1bc4x_b8_d0; 2492 uint8_t f1bc5x_b8_d0; 2493 uint8_t f1bc8x_b8_d0; 2494 uint8_t f1bc9x_b8_d0; 2495 uint8_t f1bcax_b8_d0; 2496 uint8_t f1bcbx_b8_d0; 2497 uint8_t f2bc2x_b8_d0; 2498 uint8_t f2bc3x_b8_d0; 2499 uint8_t f2bc4x_b8_d0; 2500 uint8_t f2bc5x_b8_d0; 2501 uint8_t f2bc8x_b8_d0; 2502 uint8_t f2bc9x_b8_d0; 2503 uint8_t f2bcax_b8_d0; 2504 uint8_t f2bcbx_b8_d0; 2505 uint8_t f3bc2x_b8_d0; 2506 uint8_t f3bc3x_b8_d0; 2507 uint8_t f3bc4x_b8_d0; 2508 uint8_t f3bc5x_b8_d0; 2509 uint8_t f3bc8x_b8_d0; 2510 uint8_t f3bc9x_b8_d0; 2511 uint8_t f3bcax_b8_d0; 2512 uint8_t f3bcbx_b8_d0; 2513 uint8_t f5bc5x_d0; 2514 uint8_t f5bc6x_d0; 2515 uint8_t f4bc8x_d0; 2516 uint8_t f4bc9x_d0; 2517 uint8_t f4bcax_d0; 2518 uint8_t f4bcbx_d0; 2519 uint8_t f4bccx_d0; 2520 uint8_t f4bcdx_d0; 2521 uint8_t f4bcex_d0; 2522 uint8_t f4bcfx_d0; 2523 uint8_t f5bc8x_d0; 2524 uint8_t f5bc9x_d0; 2525 uint8_t f5bcax_d0; 2526 uint8_t f5bcbx_d0; 2527 uint8_t f5bccx_d0; 2528 uint8_t f5bcdx_d0; 2529 uint8_t f5bcex_d0; 2530 uint8_t f5bcfx_d0; 2531 uint8_t f6bc8x_d0; 2532 uint8_t f6bc9x_d0; 2533 uint8_t f6bcax_d0; 2534 uint8_t f6bcbx_d0; 2535 uint8_t f6bccx_d0; 2536 uint8_t f6bcdx_d0; 2537 uint8_t f6bcex_d0; 2538 uint8_t f6bcfx_d0; 2539 uint8_t f7bc8x_d0; 2540 uint8_t f7bc9x_d0; 2541 uint8_t f7bcax_d0; 2542 uint8_t f7bcbx_d0; 2543 uint8_t f7bccx_d0; 2544 uint8_t f7bcdx_d0; 2545 uint8_t f7bcex_d0; 2546 uint8_t f7bcfx_d0; 2547 uint8_t bc00_d1; 2548 uint8_t bc01_d1; 2549 uint8_t bc02_d1; 2550 uint8_t bc03_d1; 2551 uint8_t bc04_d1; 2552 uint8_t bc05_d1; 2553 uint8_t bc06_d1; 2554 uint8_t bc07_d1; 2555 uint8_t bc08_d1; 2556 uint8_t bc09_d1; 2557 uint8_t bc0a_d1; 2558 uint8_t bc0b_d1; 2559 uint8_t bc0c_d1; 2560 uint8_t bc0d_d1; 2561 uint8_t bc0e_d1; 2562 uint8_t f0bc6x_d1; 2563 uint8_t f0bccx_d1; 2564 uint8_t f0bcdx_d1; 2565 uint8_t f0bcex_d1; 2566 uint8_t f0bcfx_d1; 2567 uint8_t f1bccx_d1; 2568 uint8_t f1bcdx_d1; 2569 uint8_t f1bcex_d1; 2570 uint8_t f1bcfx_d1; 2571 uint8_t f0bc2x_b0_d1; 2572 uint8_t f0bc3x_b0_d1; 2573 uint8_t f0bc4x_b0_d1; 2574 uint8_t f0bc5x_b0_d1; 2575 uint8_t f0bc8x_b0_d1; 2576 uint8_t f0bc9x_b0_d1; 2577 uint8_t f0bcax_b0_d1; 2578 uint8_t f0bcbx_b0_d1; 2579 uint8_t f1bc2x_b0_d1; 2580 uint8_t f1bc3x_b0_d1; 2581 uint8_t f1bc4x_b0_d1; 2582 uint8_t f1bc5x_b0_d1; 2583 uint8_t f1bc8x_b0_d1; 2584 uint8_t f1bc9x_b0_d1; 2585 uint8_t f1bcax_b0_d1; 2586 uint8_t f1bcbx_b0_d1; 2587 uint8_t f2bc2x_b0_d1; 2588 uint8_t f2bc3x_b0_d1; 2589 uint8_t f2bc4x_b0_d1; 2590 uint8_t f2bc5x_b0_d1; 2591 uint8_t f2bc8x_b0_d1; 2592 uint8_t f2bc9x_b0_d1; 2593 uint8_t f2bcax_b0_d1; 2594 uint8_t f2bcbx_b0_d1; 2595 uint8_t f3bc2x_b0_d1; 2596 uint8_t f3bc3x_b0_d1; 2597 uint8_t f3bc4x_b0_d1; 2598 uint8_t f3bc5x_b0_d1; 2599 uint8_t f3bc8x_b0_d1; 2600 uint8_t f3bc9x_b0_d1; 2601 uint8_t f3bcax_b0_d1; 2602 uint8_t f3bcbx_b0_d1; 2603 uint8_t f0bc2x_b1_d1; 2604 uint8_t f0bc3x_b1_d1; 2605 uint8_t f0bc4x_b1_d1; 2606 uint8_t f0bc5x_b1_d1; 2607 uint8_t f0bc8x_b1_d1; 2608 uint8_t f0bc9x_b1_d1; 2609 uint8_t f0bcax_b1_d1; 2610 uint8_t f0bcbx_b1_d1; 2611 uint8_t f1bc2x_b1_d1; 2612 uint8_t f1bc3x_b1_d1; 2613 uint8_t f1bc4x_b1_d1; 2614 uint8_t f1bc5x_b1_d1; 2615 uint8_t f1bc8x_b1_d1; 2616 uint8_t f1bc9x_b1_d1; 2617 uint8_t f1bcax_b1_d1; 2618 uint8_t f1bcbx_b1_d1; 2619 uint8_t f2bc2x_b1_d1; 2620 uint8_t f2bc3x_b1_d1; 2621 uint8_t f2bc4x_b1_d1; 2622 uint8_t f2bc5x_b1_d1; 2623 uint8_t f2bc8x_b1_d1; 2624 uint8_t f2bc9x_b1_d1; 2625 uint8_t f2bcax_b1_d1; 2626 uint8_t f2bcbx_b1_d1; 2627 uint8_t f3bc2x_b1_d1; 2628 uint8_t f3bc3x_b1_d1; 2629 uint8_t f3bc4x_b1_d1; 2630 uint8_t f3bc5x_b1_d1; 2631 uint8_t f3bc8x_b1_d1; 2632 uint8_t f3bc9x_b1_d1; 2633 uint8_t f3bcax_b1_d1; 2634 uint8_t f3bcbx_b1_d1; 2635 uint8_t f0bc2x_b2_d1; 2636 uint8_t f0bc3x_b2_d1; 2637 uint8_t f0bc4x_b2_d1; 2638 uint8_t f0bc5x_b2_d1; 2639 uint8_t f0bc8x_b2_d1; 2640 uint8_t f0bc9x_b2_d1; 2641 uint8_t f0bcax_b2_d1; 2642 uint8_t f0bcbx_b2_d1; 2643 uint8_t f1bc2x_b2_d1; 2644 uint8_t f1bc3x_b2_d1; 2645 uint8_t f1bc4x_b2_d1; 2646 uint8_t f1bc5x_b2_d1; 2647 uint8_t f1bc8x_b2_d1; 2648 uint8_t f1bc9x_b2_d1; 2649 uint8_t f1bcax_b2_d1; 2650 uint8_t f1bcbx_b2_d1; 2651 uint8_t f2bc2x_b2_d1; 2652 uint8_t f2bc3x_b2_d1; 2653 uint8_t f2bc4x_b2_d1; 2654 uint8_t f2bc5x_b2_d1; 2655 uint8_t f2bc8x_b2_d1; 2656 uint8_t f2bc9x_b2_d1; 2657 uint8_t f2bcax_b2_d1; 2658 uint8_t f2bcbx_b2_d1; 2659 uint8_t f3bc2x_b2_d1; 2660 uint8_t f3bc3x_b2_d1; 2661 uint8_t f3bc4x_b2_d1; 2662 uint8_t f3bc5x_b2_d1; 2663 uint8_t f3bc8x_b2_d1; 2664 uint8_t f3bc9x_b2_d1; 2665 uint8_t f3bcax_b2_d1; 2666 uint8_t f3bcbx_b2_d1; 2667 uint8_t f0bc2x_b3_d1; 2668 uint8_t f0bc3x_b3_d1; 2669 uint8_t f0bc4x_b3_d1; 2670 uint8_t f0bc5x_b3_d1; 2671 uint8_t f0bc8x_b3_d1; 2672 uint8_t f0bc9x_b3_d1; 2673 uint8_t f0bcax_b3_d1; 2674 uint8_t f0bcbx_b3_d1; 2675 uint8_t f1bc2x_b3_d1; 2676 uint8_t f1bc3x_b3_d1; 2677 uint8_t f1bc4x_b3_d1; 2678 uint8_t f1bc5x_b3_d1; 2679 uint8_t f1bc8x_b3_d1; 2680 uint8_t f1bc9x_b3_d1; 2681 uint8_t f1bcax_b3_d1; 2682 uint8_t f1bcbx_b3_d1; 2683 uint8_t f2bc2x_b3_d1; 2684 uint8_t f2bc3x_b3_d1; 2685 uint8_t f2bc4x_b3_d1; 2686 uint8_t f2bc5x_b3_d1; 2687 uint8_t f2bc8x_b3_d1; 2688 uint8_t f2bc9x_b3_d1; 2689 uint8_t f2bcax_b3_d1; 2690 uint8_t f2bcbx_b3_d1; 2691 uint8_t f3bc2x_b3_d1; 2692 uint8_t f3bc3x_b3_d1; 2693 uint8_t f3bc4x_b3_d1; 2694 uint8_t f3bc5x_b3_d1; 2695 uint8_t f3bc8x_b3_d1; 2696 uint8_t f3bc9x_b3_d1; 2697 uint8_t f3bcax_b3_d1; 2698 uint8_t f3bcbx_b3_d1; 2699 uint8_t f0bc2x_b4_d1; 2700 uint8_t f0bc3x_b4_d1; 2701 uint8_t f0bc4x_b4_d1; 2702 uint8_t f0bc5x_b4_d1; 2703 uint8_t f0bc8x_b4_d1; 2704 uint8_t f0bc9x_b4_d1; 2705 uint8_t f0bcax_b4_d1; 2706 uint8_t f0bcbx_b4_d1; 2707 uint8_t f1bc2x_b4_d1; 2708 uint8_t f1bc3x_b4_d1; 2709 uint8_t f1bc4x_b4_d1; 2710 uint8_t f1bc5x_b4_d1; 2711 uint8_t f1bc8x_b4_d1; 2712 uint8_t f1bc9x_b4_d1; 2713 uint8_t f1bcax_b4_d1; 2714 uint8_t f1bcbx_b4_d1; 2715 uint8_t f2bc2x_b4_d1; 2716 uint8_t f2bc3x_b4_d1; 2717 uint8_t f2bc4x_b4_d1; 2718 uint8_t f2bc5x_b4_d1; 2719 uint8_t f2bc8x_b4_d1; 2720 uint8_t f2bc9x_b4_d1; 2721 uint8_t f2bcax_b4_d1; 2722 uint8_t f2bcbx_b4_d1; 2723 uint8_t f3bc2x_b4_d1; 2724 uint8_t f3bc3x_b4_d1; 2725 uint8_t f3bc4x_b4_d1; 2726 uint8_t f3bc5x_b4_d1; 2727 uint8_t f3bc8x_b4_d1; 2728 uint8_t f3bc9x_b4_d1; 2729 uint8_t f3bcax_b4_d1; 2730 uint8_t f3bcbx_b4_d1; 2731 uint8_t f0bc2x_b5_d1; 2732 uint8_t f0bc3x_b5_d1; 2733 uint8_t f0bc4x_b5_d1; 2734 uint8_t f0bc5x_b5_d1; 2735 uint8_t f0bc8x_b5_d1; 2736 uint8_t f0bc9x_b5_d1; 2737 uint8_t f0bcax_b5_d1; 2738 uint8_t f0bcbx_b5_d1; 2739 uint8_t f1bc2x_b5_d1; 2740 uint8_t f1bc3x_b5_d1; 2741 uint8_t f1bc4x_b5_d1; 2742 uint8_t f1bc5x_b5_d1; 2743 uint8_t f1bc8x_b5_d1; 2744 uint8_t f1bc9x_b5_d1; 2745 uint8_t f1bcax_b5_d1; 2746 uint8_t f1bcbx_b5_d1; 2747 uint8_t f2bc2x_b5_d1; 2748 uint8_t f2bc3x_b5_d1; 2749 uint8_t f2bc4x_b5_d1; 2750 uint8_t f2bc5x_b5_d1; 2751 uint8_t f2bc8x_b5_d1; 2752 uint8_t f2bc9x_b5_d1; 2753 uint8_t f2bcax_b5_d1; 2754 uint8_t f2bcbx_b5_d1; 2755 uint8_t f3bc2x_b5_d1; 2756 uint8_t f3bc3x_b5_d1; 2757 uint8_t f3bc4x_b5_d1; 2758 uint8_t f3bc5x_b5_d1; 2759 uint8_t f3bc8x_b5_d1; 2760 uint8_t f3bc9x_b5_d1; 2761 uint8_t f3bcax_b5_d1; 2762 uint8_t f3bcbx_b5_d1; 2763 uint8_t f0bc2x_b6_d1; 2764 uint8_t f0bc3x_b6_d1; 2765 uint8_t f0bc4x_b6_d1; 2766 uint8_t f0bc5x_b6_d1; 2767 uint8_t f0bc8x_b6_d1; 2768 uint8_t f0bc9x_b6_d1; 2769 uint8_t f0bcax_b6_d1; 2770 uint8_t f0bcbx_b6_d1; 2771 uint8_t f1bc2x_b6_d1; 2772 uint8_t f1bc3x_b6_d1; 2773 uint8_t f1bc4x_b6_d1; 2774 uint8_t f1bc5x_b6_d1; 2775 uint8_t f1bc8x_b6_d1; 2776 uint8_t f1bc9x_b6_d1; 2777 uint8_t f1bcax_b6_d1; 2778 uint8_t f1bcbx_b6_d1; 2779 uint8_t f2bc2x_b6_d1; 2780 uint8_t f2bc3x_b6_d1; 2781 uint8_t f2bc4x_b6_d1; 2782 uint8_t f2bc5x_b6_d1; 2783 uint8_t f2bc8x_b6_d1; 2784 uint8_t f2bc9x_b6_d1; 2785 uint8_t f2bcax_b6_d1; 2786 uint8_t f2bcbx_b6_d1; 2787 uint8_t f3bc2x_b6_d1; 2788 uint8_t f3bc3x_b6_d1; 2789 uint8_t f3bc4x_b6_d1; 2790 uint8_t f3bc5x_b6_d1; 2791 uint8_t f3bc8x_b6_d1; 2792 uint8_t f3bc9x_b6_d1; 2793 uint8_t f3bcax_b6_d1; 2794 uint8_t f3bcbx_b6_d1; 2795 uint8_t f0bc2x_b7_d1; 2796 uint8_t f0bc3x_b7_d1; 2797 uint8_t f0bc4x_b7_d1; 2798 uint8_t f0bc5x_b7_d1; 2799 uint8_t f0bc8x_b7_d1; 2800 uint8_t f0bc9x_b7_d1; 2801 uint8_t f0bcax_b7_d1; 2802 uint8_t f0bcbx_b7_d1; 2803 uint8_t f1bc2x_b7_d1; 2804 uint8_t f1bc3x_b7_d1; 2805 uint8_t f1bc4x_b7_d1; 2806 uint8_t f1bc5x_b7_d1; 2807 uint8_t f1bc8x_b7_d1; 2808 uint8_t f1bc9x_b7_d1; 2809 uint8_t f1bcax_b7_d1; 2810 uint8_t f1bcbx_b7_d1; 2811 uint8_t f2bc2x_b7_d1; 2812 uint8_t f2bc3x_b7_d1; 2813 uint8_t f2bc4x_b7_d1; 2814 uint8_t f2bc5x_b7_d1; 2815 uint8_t f2bc8x_b7_d1; 2816 uint8_t f2bc9x_b7_d1; 2817 uint8_t f2bcax_b7_d1; 2818 uint8_t f2bcbx_b7_d1; 2819 uint8_t f3bc2x_b7_d1; 2820 uint8_t f3bc3x_b7_d1; 2821 uint8_t f3bc4x_b7_d1; 2822 uint8_t f3bc5x_b7_d1; 2823 uint8_t f3bc8x_b7_d1; 2824 uint8_t f3bc9x_b7_d1; 2825 uint8_t f3bcax_b7_d1; 2826 uint8_t f3bcbx_b7_d1; 2827 uint8_t f0bc2x_b8_d1; 2828 uint8_t f0bc3x_b8_d1; 2829 uint8_t f0bc4x_b8_d1; 2830 uint8_t f0bc5x_b8_d1; 2831 uint8_t f0bc8x_b8_d1; 2832 uint8_t f0bc9x_b8_d1; 2833 uint8_t f0bcax_b8_d1; 2834 uint8_t f0bcbx_b8_d1; 2835 uint8_t f1bc2x_b8_d1; 2836 uint8_t f1bc3x_b8_d1; 2837 uint8_t f1bc4x_b8_d1; 2838 uint8_t f1bc5x_b8_d1; 2839 uint8_t f1bc8x_b8_d1; 2840 uint8_t f1bc9x_b8_d1; 2841 uint8_t f1bcax_b8_d1; 2842 uint8_t f1bcbx_b8_d1; 2843 uint8_t f2bc2x_b8_d1; 2844 uint8_t f2bc3x_b8_d1; 2845 uint8_t f2bc4x_b8_d1; 2846 uint8_t f2bc5x_b8_d1; 2847 uint8_t f2bc8x_b8_d1; 2848 uint8_t f2bc9x_b8_d1; 2849 uint8_t f2bcax_b8_d1; 2850 uint8_t f2bcbx_b8_d1; 2851 uint8_t f3bc2x_b8_d1; 2852 uint8_t f3bc3x_b8_d1; 2853 uint8_t f3bc4x_b8_d1; 2854 uint8_t f3bc5x_b8_d1; 2855 uint8_t f3bc8x_b8_d1; 2856 uint8_t f3bc9x_b8_d1; 2857 uint8_t f3bcax_b8_d1; 2858 uint8_t f3bcbx_b8_d1; 2859 uint8_t f5bc5x_d1; 2860 uint8_t f5bc6x_d1; 2861 uint8_t f4bc8x_d1; 2862 uint8_t f4bc9x_d1; 2863 uint8_t f4bcax_d1; 2864 uint8_t f4bcbx_d1; 2865 uint8_t f4bccx_d1; 2866 uint8_t f4bcdx_d1; 2867 uint8_t f4bcex_d1; 2868 uint8_t f4bcfx_d1; 2869 uint8_t f5bc8x_d1; 2870 uint8_t f5bc9x_d1; 2871 uint8_t f5bcax_d1; 2872 uint8_t f5bcbx_d1; 2873 uint8_t f5bccx_d1; 2874 uint8_t f5bcdx_d1; 2875 uint8_t f5bcex_d1; 2876 uint8_t f5bcfx_d1; 2877 uint8_t f6bc8x_d1; 2878 uint8_t f6bc9x_d1; 2879 uint8_t f6bcax_d1; 2880 uint8_t f6bcbx_d1; 2881 uint8_t f6bccx_d1; 2882 uint8_t f6bcdx_d1; 2883 uint8_t f6bcex_d1; 2884 uint8_t f6bcfx_d1; 2885 uint8_t f7bc8x_d1; 2886 uint8_t f7bc9x_d1; 2887 uint8_t f7bcax_d1; 2888 uint8_t f7bcbx_d1; 2889 uint8_t f7bccx_d1; 2890 uint8_t f7bcdx_d1; 2891 uint8_t f7bcex_d1; 2892 uint8_t f7bcfx_d1; 2893 uint16_t alt_cas_l; 2894 uint8_t alt_wcas_l; 2895 uint8_t d4misc; 2896 } __packed; 2897 #endif 2898