1 /*
2 * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <lib/smccc.h>
8 #include <platform_def.h>
9 #include <services/arm_arch_svc.h>
10
11 #include <plat/arm/common/plat_arm.h>
12
13 /*
14 * Table of memory regions for different BL stages to map using the MMU.
15 * This doesn't include Trusted SRAM as setup_page_tables() already takes care
16 * of mapping it.
17 */
18 #ifdef IMAGE_BL1
19 const mmap_region_t plat_arm_mmap[] = {
20 ARM_MAP_SHARED_RAM,
21 V2M_MAP_FLASH0_RW,
22 V2M_MAP_IOFPGA,
23 CSS_MAP_DEVICE,
24 SOC_CSS_MAP_DEVICE,
25 #if TRUSTED_BOARD_BOOT
26 /* Map DRAM to authenticate NS_BL2U image. */
27 ARM_MAP_NS_DRAM1,
28 #endif
29 {0}
30 };
31 #endif
32 #ifdef IMAGE_BL2
33 const mmap_region_t plat_arm_mmap[] = {
34 ARM_MAP_SHARED_RAM,
35 V2M_MAP_FLASH0_RW,
36 #ifdef PLAT_ARM_MEM_PROT_ADDR
37 ARM_V2M_MAP_MEM_PROTECT,
38 #endif
39 V2M_MAP_IOFPGA,
40 CSS_MAP_DEVICE,
41 SOC_CSS_MAP_DEVICE,
42 ARM_MAP_NS_DRAM1,
43 #ifdef __aarch64__
44 ARM_MAP_DRAM2,
45 #endif
46 #ifdef SPD_tspd
47 ARM_MAP_TSP_SEC_MEM,
48 #endif
49 #ifdef SPD_opteed
50 ARM_MAP_OPTEE_CORE_MEM,
51 ARM_OPTEE_PAGEABLE_LOAD_MEM,
52 #endif
53 #if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
54 ARM_MAP_BL1_RW,
55 #endif
56 {0}
57 };
58 #endif
59 #ifdef IMAGE_BL2U
60 const mmap_region_t plat_arm_mmap[] = {
61 ARM_MAP_SHARED_RAM,
62 CSS_MAP_DEVICE,
63 CSS_MAP_SCP_BL2U,
64 V2M_MAP_IOFPGA,
65 SOC_CSS_MAP_DEVICE,
66 {0}
67 };
68 #endif
69 #ifdef IMAGE_BL31
70 const mmap_region_t plat_arm_mmap[] = {
71 ARM_MAP_SHARED_RAM,
72 V2M_MAP_IOFPGA,
73 CSS_MAP_DEVICE,
74 #ifdef PLAT_ARM_MEM_PROT_ADDR
75 ARM_V2M_MAP_MEM_PROTECT,
76 #endif
77 SOC_CSS_MAP_DEVICE,
78 ARM_DTB_DRAM_NS,
79 {0}
80 };
81 #endif
82 #ifdef IMAGE_BL32
83 const mmap_region_t plat_arm_mmap[] = {
84 #ifndef __aarch64__
85 ARM_MAP_SHARED_RAM,
86 #ifdef PLAT_ARM_MEM_PROT_ADDR
87 ARM_V2M_MAP_MEM_PROTECT,
88 #endif
89 #endif
90 V2M_MAP_IOFPGA,
91 CSS_MAP_DEVICE,
92 SOC_CSS_MAP_DEVICE,
93 {0}
94 };
95 #endif
96
97 ARM_CASSERT_MMAP
98
99 /*****************************************************************************
100 * plat_is_smccc_feature_available() - This function checks whether SMCCC
101 * feature is availabile for platform.
102 * @fid: SMCCC function id
103 *
104 * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
105 * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
106 *****************************************************************************/
plat_is_smccc_feature_available(u_register_t fid)107 int32_t plat_is_smccc_feature_available(u_register_t fid)
108 {
109 switch (fid) {
110 case SMCCC_ARCH_SOC_ID:
111 return SMC_ARCH_CALL_SUCCESS;
112 default:
113 return SMC_ARCH_CALL_NOT_SUPPORTED;
114 }
115 }
116
117 /* Get SOC version */
plat_get_soc_version(void)118 int32_t plat_get_soc_version(void)
119 {
120 return (int32_t)
121 ((ARM_SOC_IDENTIFICATION_CODE << ARM_SOC_IDENTIFICATION_SHIFT)
122 | (ARM_SOC_CONTINUATION_CODE << ARM_SOC_CONTINUATION_SHIFT)
123 | JUNO_SOC_ID);
124 }
125
126 /* Get SOC revision */
plat_get_soc_revision(void)127 int32_t plat_get_soc_revision(void)
128 {
129 unsigned int sys_id;
130
131 sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID);
132 return (int32_t)((sys_id >> V2M_SYS_ID_REV_SHIFT) &
133 V2M_SYS_ID_REV_MASK);
134 }
135