1 /*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <endian.h>
8
9 #include <platform_def.h>
10
11 #include <common/debug.h>
12 #include <lib/mmio.h>
13
14 #include "soc_tzasc.h"
15
tzc380_set_region(unsigned int tzasc_base,unsigned int region_id,unsigned int enabled,unsigned int low_addr,unsigned int high_addr,unsigned int size,unsigned int security,unsigned int subreg_disable_mask)16 int tzc380_set_region(unsigned int tzasc_base, unsigned int region_id,
17 unsigned int enabled, unsigned int low_addr,
18 unsigned int high_addr, unsigned int size,
19 unsigned int security, unsigned int subreg_disable_mask)
20 {
21 unsigned int reg;
22 unsigned int reg_base;
23 unsigned int attr_value;
24
25 reg_base = (tzasc_base + TZASC_REGIONS_REG + (region_id << 4));
26
27 if (region_id == 0) {
28 reg = (reg_base + TZASC_REGION_ATTR_OFFSET);
29 mmio_write_32((uintptr_t)reg, ((security & 0xF) << 28));
30 } else {
31 reg = reg_base + TZASC_REGION_LOWADDR_OFFSET;
32 mmio_write_32((uintptr_t)reg,
33 (low_addr & TZASC_REGION_LOWADDR_MASK));
34
35 reg = reg_base + TZASC_REGION_HIGHADDR_OFFSET;
36 mmio_write_32((uintptr_t)reg, high_addr);
37
38 reg = reg_base + TZASC_REGION_ATTR_OFFSET;
39 attr_value = ((security & 0xF) << 28) |
40 ((subreg_disable_mask & 0xFF) << 8) |
41 ((size & 0x3F) << 1) | (enabled & 0x1);
42 mmio_write_32((uintptr_t)reg, attr_value);
43
44 }
45 return 0;
46 }
47
tzc380_setup(void)48 int tzc380_setup(void)
49 {
50 int reg_id = 0;
51
52 INFO("Configuring TZASC-380\n");
53
54 /*
55 * Configure CCI control override register to terminate all barrier
56 * transactions
57 */
58 mmio_write_32(PLAT_LS1043_CCI_BASE, CCI_TERMINATE_BARRIER_TX);
59
60 /* Configure CSU secure access register to disable TZASC bypass mux */
61 mmio_write_32((uintptr_t)(CONFIG_SYS_FSL_CSU_ADDR +
62 CSU_SEC_ACCESS_REG_OFFSET),
63 bswap32(TZASC_BYPASS_MUX_DISABLE));
64
65 for (reg_id = 0; reg_id < MAX_NUM_TZC_REGION; reg_id++) {
66 tzc380_set_region(CONFIG_SYS_FSL_TZASC_ADDR,
67 reg_id,
68 tzc380_reg_list[reg_id].enabled,
69 tzc380_reg_list[reg_id].low_addr,
70 tzc380_reg_list[reg_id].high_addr,
71 tzc380_reg_list[reg_id].size,
72 tzc380_reg_list[reg_id].secure,
73 tzc380_reg_list[reg_id].sub_mask);
74 }
75
76 return 0;
77 }
78