1 use crate::common::Register;
2 
3 macro_rules! registers {
4     ($struct_name:ident, { $($name:ident = ($val:expr, $disp:expr)),+ $(,)? }) => {
5         #[allow(missing_docs)]
6         impl $struct_name {
7             $(
8                 pub const $name: Register = Register($val);
9             )+
10         }
11 
12         impl $struct_name {
13             /// The name of a register, or `None` if the register number is unknown.
14             pub fn register_name(register: Register) -> Option<&'static str> {
15                 match register {
16                     $(
17                         Self::$name => Some($disp),
18                     )+
19                     _ => return None,
20                 }
21             }
22         }
23     };
24 }
25 
26 /// ARM architecture specific definitions.
27 ///
28 /// See [DWARF for the ARM Architecture](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040b/IHI0040B_aadwarf.pdf).
29 #[derive(Debug, Clone, Copy)]
30 pub struct Arm;
31 
32 // TODO: add more registers.
33 registers!(Arm, {
34     R0 = (0, "R0"),
35     R1 = (1, "R1"),
36     R2 = (2, "R2"),
37     R3 = (3, "R3"),
38     R4 = (4, "R4"),
39     R5 = (5, "R5"),
40     R6 = (6, "R6"),
41     R7 = (7, "R7"),
42     R8 = (8, "R8"),
43     R9 = (9, "R9"),
44     R10 = (10, "R10"),
45     R11 = (11, "R11"),
46     R12 = (12, "R12"),
47     R13 = (13, "R13"),
48     R14 = (14, "R14"),
49     R15 = (15, "R15"),
50 });
51 
52 /// Intel i386 architecture specific definitions.
53 ///
54 /// See Intel386 psABi version 1.1 at the [X86 psABI wiki](https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI).
55 #[derive(Debug, Clone, Copy)]
56 pub struct X86;
57 
58 registers!(X86, {
59     EAX = (0, "eax"),
60     ECX = (1, "ecx"),
61     EDX = (2, "edx"),
62     EBX = (3, "ebx"),
63     ESP = (4, "esp"),
64     EBP = (5, "ebp"),
65     ESI = (6, "esi"),
66     EDI = (7, "edi"),
67 
68     // Return Address register. This is stored in `0(%esp, "")` and is not a physical register.
69     RA = (8, "RA"),
70 
71     ST0 = (11, "st0"),
72     ST1 = (12, "st1"),
73     ST2 = (13, "st2"),
74     ST3 = (14, "st3"),
75     ST4 = (15, "st4"),
76     ST5 = (16, "st5"),
77     ST6 = (17, "st6"),
78     ST7 = (18, "st7"),
79 
80     XMM0 = (21, "xmm0"),
81     XMM1 = (22, "xmm1"),
82     XMM2 = (23, "xmm2"),
83     XMM3 = (24, "xmm3"),
84     XMM4 = (25, "xmm4"),
85     XMM5 = (26, "xmm5"),
86     XMM6 = (27, "xmm6"),
87     XMM7 = (28, "xmm7"),
88 
89     MM0 = (29, "mm0"),
90     MM1 = (30, "mm1"),
91     MM2 = (31, "mm2"),
92     MM3 = (32, "mm3"),
93     MM4 = (33, "mm4"),
94     MM5 = (34, "mm5"),
95     MM6 = (35, "mm6"),
96     MM7 = (36, "mm7"),
97 
98     MXCSR = (39, "mxcsr"),
99 
100     ES = (40, "es"),
101     CS = (41, "cs"),
102     SS = (42, "ss"),
103     DS = (43, "ds"),
104     FS = (44, "fs"),
105     GS = (45, "gs"),
106 
107     TR = (48, "tr"),
108     LDTR = (49, "ldtr"),
109 
110     FS_BASE = (93, "fs.base"),
111     GS_BASE = (94, "gs.base"),
112 });
113 
114 /// AMD64 architecture specific definitions.
115 ///
116 /// See x86-64 psABI version 1.0 at the [X86 psABI wiki](https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI).
117 #[derive(Debug, Clone, Copy)]
118 pub struct X86_64;
119 
120 registers!(X86_64, {
121     RAX = (0, "rax"),
122     RDX = (1, "rdx"),
123     RCX = (2, "rcx"),
124     RBX = (3, "rbx"),
125     RSI = (4, "rsi"),
126     RDI = (5, "rdi"),
127     RBP = (6, "rbp"),
128     RSP = (7, "rsp"),
129 
130     R8 = (8, "r8"),
131     R9 = (9, "r9"),
132     R10 = (10, "r10"),
133     R11 = (11, "r11"),
134     R12 = (12, "r12"),
135     R13 = (13, "r13"),
136     R14 = (14, "r14"),
137     R15 = (15, "r15"),
138 
139     // Return Address register. This is stored in `0(%rsp, "")` and is not a physical register.
140     RA = (16, "RA"),
141 
142     XMM0 = (17, "xmm0"),
143     XMM1 = (18, "xmm1"),
144     XMM2 = (19, "xmm2"),
145     XMM3 = (20, "xmm3"),
146     XMM4 = (21, "xmm4"),
147     XMM5 = (22, "xmm5"),
148     XMM6 = (23, "xmm6"),
149     XMM7 = (24, "xmm7"),
150 
151     XMM8 = (25, "xmm8"),
152     XMM9 = (26, "xmm9"),
153     XMM10 = (27, "xmm10"),
154     XMM11 = (28, "xmm11"),
155     XMM12 = (29, "xmm12"),
156     XMM13 = (30, "xmm13"),
157     XMM14 = (31, "xmm14"),
158     XMM15 = (32, "xmm15"),
159 
160     ST0 = (33, "st0"),
161     ST1 = (34, "st1"),
162     ST2 = (35, "st2"),
163     ST3 = (36, "st3"),
164     ST4 = (37, "st4"),
165     ST5 = (38, "st5"),
166     ST6 = (39, "st6"),
167     ST7 = (40, "st7"),
168 
169     MM0 = (41, "mm0"),
170     MM1 = (42, "mm1"),
171     MM2 = (43, "mm2"),
172     MM3 = (44, "mm3"),
173     MM4 = (45, "mm4"),
174     MM5 = (46, "mm5"),
175     MM6 = (47, "mm6"),
176     MM7 = (48, "mm7"),
177 
178     RFLAGS = (49, "rFLAGS"),
179     ES = (50, "es"),
180     CS = (51, "cs"),
181     SS = (52, "ss"),
182     DS = (53, "ds"),
183     FS = (54, "fs"),
184     GS = (55, "gs"),
185 
186     FS_BASE = (58, "fs.base"),
187     GS_BASE = (59, "gs.base"),
188 
189     TR = (62, "tr"),
190     LDTR = (63, "ldtr"),
191     MXCSR = (64, "mxcsr"),
192     FCW = (65, "fcw"),
193     FSW = (66, "fsw"),
194 
195     XMM16 = (67, "xmm16"),
196     XMM17 = (68, "xmm17"),
197     XMM18 = (69, "xmm18"),
198     XMM19 = (70, "xmm19"),
199     XMM20 = (71, "xmm20"),
200     XMM21 = (72, "xmm21"),
201     XMM22 = (73, "xmm22"),
202     XMM23 = (74, "xmm23"),
203     XMM24 = (75, "xmm24"),
204     XMM25 = (76, "xmm25"),
205     XMM26 = (77, "xmm26"),
206     XMM27 = (78, "xmm27"),
207     XMM28 = (79, "xmm28"),
208     XMM29 = (80, "xmm29"),
209     XMM30 = (81, "xmm30"),
210     XMM31 = (82, "xmm31"),
211 
212     K0 = (118, "k0"),
213     K1 = (119, "k1"),
214     K2 = (120, "k2"),
215     K3 = (121, "k3"),
216     K4 = (122, "k4"),
217     K5 = (123, "k5"),
218     K6 = (124, "k6"),
219     K7 = (125, "k7"),
220 });
221