1#
2#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3#
4#  SPDX-License-Identifier: BSD-2-Clause-Patent
5#
6#
7
8#include <AsmMacroIoLib.h>
9#include <Library/ArmLib.h>
10
11#include <Chipset/ArmCortexA9.h>
12
13ASM_FUNC(ArmPlatformPeiBootAction)
14  bx    lr
15
16# IN None
17# OUT r0 = SCU Base Address
18ASM_FUNC(ArmGetScuBaseAddress)
19  # Read Configuration Base Address Register. ArmCBar cannot be called to get
20  # the Configuration BAR as a stack is not necessary setup. The SCU is at the
21  # offset 0x0000 from the Private Memory Region.
22  mrc   p15, 4, r0, c15, c0, 0
23  bx    lr
24
25//UINTN
26//ArmPlatformGetPrimaryCoreMpId (
27//  VOID
28//  );
29ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
30  MOV32  (r0, FixedPcdGet32 (PcdArmPrimaryCore))
31  bx    lr
32
33# IN None
34# OUT r0 = number of cores present in the system
35ASM_FUNC(ArmGetCpuCountPerCluster)
36  stmfd SP!, {r1-r2}
37
38  # Read CP15 MIDR
39  mrc   p15, 0, r1, c0, c0, 0
40
41  # Check if the CPU is A15
42  mov   r1, r1, LSR #4
43  MOV32 (r0, ARM_CPU_TYPE_MASK)
44  and   r1, r1, r0
45
46  MOV32 (r0, ARM_CPU_TYPE_A15)
47  cmp   r1, r0
48  beq   _Read_cp15_reg
49
50_CPU_is_not_A15:
51  mov   r2, lr                           @ Save link register
52  bl    ArmGetScuBaseAddress             @ Read SCU Base Address
53  mov   lr, r2                           @ Restore link register val
54  ldr   r0, [r0, #A9_SCU_CONFIG_OFFSET]     @ Read SCU Config reg to get CPU count
55  b     _Return
56
57_Read_cp15_reg:
58  mrc   p15, 1, r0, c9, c0, 2            @ Read C9 register of CP15 to get CPU count
59  lsr   r0, #24
60
61_Return:
62  and   r0, r0, #3
63  # Add '1' to the number of CPU on the Cluster
64  add   r0, r0, #1
65  ldmfd SP!, {r1-r2}
66  bx lr
67
68//UINTN
69//ArmPlatformIsPrimaryCore (
70//  IN UINTN MpId
71//  );
72ASM_FUNC(ArmPlatformIsPrimaryCore)
73  MOV32  (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
74  and   r0, r0, r1
75  MOV32  (r1, FixedPcdGet32 (PcdArmPrimaryCore))
76  cmp   r0, r1
77  moveq r0, #1
78  movne r0, #0
79  bx    lr
80
81//UINTN
82//ArmPlatformGetCorePosition (
83//  IN UINTN MpId
84//  );
85ASM_FUNC(ArmPlatformGetCorePosition)
86  and   r1, r0, #ARM_CORE_MASK
87  and   r0, r0, #ARM_CLUSTER_MASK
88  add   r0, r1, r0, LSR #7
89  bx    lr
90
91ASM_FUNCTION_REMOVE_IF_UNREFERENCED
92