1 /** @file 2 Platform Pcie Helper Lib. 3 4 Copyright (c) 2013 Intel Corporation. 5 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 **/ 9 10 #include "CommonHeader.h" 11 12 // 13 // Routines local to this source module. 14 // 15 VOID 16 LegacyGpioSetLevel ( 17 IN CONST UINT32 LevelRegOffset, 18 IN CONST UINT32 GpioNum, 19 IN CONST BOOLEAN HighLevel 20 ) 21 { 22 UINT32 RegValue; 23 UINT32 GpioBaseAddress; 24 UINT32 GpioNumMask; 25 26 GpioBaseAddress = LpcPciCfg32 (R_QNC_LPC_GBA_BASE) & B_QNC_LPC_GPA_BASE_MASK; 27 ASSERT (GpioBaseAddress > 0); 28 29 RegValue = IoRead32 (GpioBaseAddress + LevelRegOffset); 30 GpioNumMask = (1 << GpioNum); 31 if (HighLevel) { 32 RegValue |= (GpioNumMask); 33 } else { 34 RegValue &= ~(GpioNumMask); 35 } 36 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_RGLVL_RESUME_WELL, RegValue); 37 } 38 39 // 40 // Routines exported by this component. 41 // 42 43 /** 44 Platform assert PCI express PERST# signal. 45 46 @param PlatformType See EFI_PLATFORM_TYPE enum definitions. 47 48 **/ 49 VOID 50 EFIAPI 51 PlatformPERSTAssert ( 52 IN CONST EFI_PLATFORM_TYPE PlatformType 53 ) 54 { 55 if (PlatformType == GalileoGen2) { 56 LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, GALILEO_GEN2_PCIEXP_PERST_RESUMEWELL_GPIO, FALSE); 57 } else { 58 LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, PCIEXP_PERST_RESUMEWELL_GPIO, FALSE); 59 } 60 } 61 62 /** 63 Platform de assert PCI express PERST# signal. 64 65 @param PlatformType See EFI_PLATFORM_TYPE enum definitions. 66 67 **/ 68 VOID 69 EFIAPI 70 PlatformPERSTDeAssert ( 71 IN CONST EFI_PLATFORM_TYPE PlatformType 72 ) 73 { 74 if (PlatformType == GalileoGen2) { 75 LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, GALILEO_GEN2_PCIEXP_PERST_RESUMEWELL_GPIO, TRUE); 76 } else { 77 LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, PCIEXP_PERST_RESUMEWELL_GPIO, TRUE); 78 } 79 } 80 81 /** Early initialisation of the PCIe controller. 82 83 @param PlatformType See EFI_PLATFORM_TYPE enum definitions. 84 85 @retval EFI_SUCCESS Operation success. 86 87 **/ 88 EFI_STATUS 89 EFIAPI 90 PlatformPciExpressEarlyInit ( 91 IN CONST EFI_PLATFORM_TYPE PlatformType 92 ) 93 { 94 95 // 96 // Release and wait for PCI controller to come out of reset. 97 // 98 SocUnitReleasePcieControllerPreWaitPllLock (PlatformType); 99 MicroSecondDelay (PCIEXP_DELAY_US_WAIT_PLL_LOCK); 100 SocUnitReleasePcieControllerPostPllLock (PlatformType); 101 102 // 103 // Early PCIe initialisation 104 // 105 SocUnitEarlyInitialisation (); 106 107 // 108 // Do North cluster early PCIe init. 109 // 110 PciExpressEarlyInit (); 111 112 return EFI_SUCCESS; 113 } 114 115