1/** @file
2
3  ACPI Memory mapped configuration space base address Description Table (MCFG).
4  Implementation based on PCI Firmware Specification Revision 3.0 final draft,
5  downloadable at http://www.pcisig.com/home
6
7  Copyright (c) 2014 - 2016, AMD Inc. All rights reserved.
8
9  SPDX-License-Identifier: BSD-2-Clause-Patent
10
11**/
12
13#include "AcpiPlatform.h"
14
15//
16// CSRT for ARM_CCN504 (L3 CACHE)
17//
18#define AMD_ACPI_ARM_CCN504_CSRT_REVISION 0
19#define AMD_ACPI_ARM_CCN504_VENDOR_ID     SIGNATURE_32('A','R','M','H')
20#define AMD_ACPI_ARM_CCN504_DEVICE_ID     0x510
21#define AMD_ACPI_ARM_CCN504_RESOURCE_TYPE 0x04
22#define AMD_ACPI_ARM_CCN504_DESC_VERSION  1
23#define AMD_ACPI_ARM_CCN504_HNF_COUNT     8
24#define AMD_ACPI_ARM_CCN504_BASE_ADDR     0xE8000000ULL
25#define AMD_ACPI_ARM_CCN504_CACHE_SIZE    0x00800000ULL
26
27//
28// Ensure proper (byte-packed) structure formats
29//
30#pragma pack(push, 1)
31
32typedef struct {
33  UINT32  Version;
34  UINT8   HnfRegionCount;
35  UINT8   Reserved[3];
36  UINT64  BaseAddress;
37  UINT64  CacheSize;
38} AMD_ACPI_ARM_CCN504_CSRT_DEVICE_DESCRIPTOR;
39
40typedef struct {
41  UINT32  Length;
42  UINT16  ResourceType;
43  UINT16  ResourceSubtype;
44  UINT32  UID;
45  AMD_ACPI_ARM_CCN504_CSRT_DEVICE_DESCRIPTOR Ccn504Desc;
46} AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_DESCRIPTOR;
47
48typedef struct {
49  UINT32  Length;
50  UINT32  VendorId;
51  UINT32  SubvendorId;
52  UINT16  DeviceId;
53  UINT16  SubdeviceId;
54  UINT16  Revision;
55  UINT8   Reserved[2];
56  UINT32  SharedInfoLength;
57  AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_DESCRIPTOR RsrcDesc;
58} AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_GROUP;
59
60typedef struct {
61  EFI_ACPI_DESCRIPTION_HEADER             Header;
62  AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_GROUP RsrcGroup;
63} AMD_ACPI_ARM_CCN504_CORE_SYSTEM_RESOURCE_TABLE;
64
65
66STATIC AMD_ACPI_ARM_CCN504_CORE_SYSTEM_RESOURCE_TABLE AcpiCsrt = {
67   AMD_ACPI_HEADER (EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE,
68                    AMD_ACPI_ARM_CCN504_CORE_SYSTEM_RESOURCE_TABLE,
69                    AMD_ACPI_ARM_CCN504_CSRT_REVISION),
70  { sizeof (AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_GROUP), // UINT32  RsrcGroup.Length
71    AMD_ACPI_ARM_CCN504_VENDOR_ID,                    // UINT32  RsrcGroup.VendorId
72    0,                                                // UINT32  RsrcGroup.SubvendorId
73    AMD_ACPI_ARM_CCN504_DEVICE_ID,                    // UINT16  RsrcGroup.DeviceId
74    0,                                                // UINT16  RsrcGroup.SubdeviceId
75    0,                                                // UINT16  RsrcGroup.Revision
76    { 0 },                                            // UINT8   RsrcGroup.Reserved[]
77    0,                                                // UINT32  RsrcGroup.SharedInfoLength
78    { sizeof (AMD_ACPI_ARM_CCN504_CSRT_RESOURCE_DESCRIPTOR),  // UINT32  RsrcDesc.Length
79      AMD_ACPI_ARM_CCN504_RESOURCE_TYPE,                      // UINT16  RsrcDesc.ResourceType
80      0,                                                      // UINT16  RsrcDesc.ResourceSubtype
81      0,                                                      // UINT32  RsrcDesc.UID
82      { AMD_ACPI_ARM_CCN504_DESC_VERSION,                     // UINT32  Ccn504Desc.Version
83        AMD_ACPI_ARM_CCN504_HNF_COUNT,                        // UINT8   Ccn504Desc.HnfRegionCount
84        { 0 },                                                // UINT8   Ccn504Desc.Reserved[]
85        AMD_ACPI_ARM_CCN504_BASE_ADDR,                        // UINT64  Ccn504Desc.BaseAddress
86        AMD_ACPI_ARM_CCN504_CACHE_SIZE,                       // UINT64  Ccn504Desc.CacheSize
87      },
88    },
89  },
90};
91
92#pragma pack(pop)
93
94VOID* CONST ReferenceAcpiTable = &AcpiCsrt;
95