1 /** @file 2 Common definitions and compilation switches for MRC 3 4 Copyright (c) 2013-2015 Intel Corporation. 5 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 **/ 9 #ifndef __MEMORY_OPTIONS_H 10 #define __MEMORY_OPTIONS_H 11 12 #include "core_types.h" 13 14 // MRC COMPILE TIME SWITCHES: 15 // ========================== 16 17 18 19 //#define MRC_SV // enable some validation opitons 20 21 #if defined (SIM) || defined(EMU) 22 #define QUICKSIM // reduce execution time using shorter rd/wr sequences 23 #endif 24 25 #define CLT // required for Quark project 26 27 28 29 //#define BACKUP_RCVN // enable STATIC timing settings for RCVN (BACKUP_MODE) 30 //#define BACKUP_WDQS // enable STATIC timing settings for WDQS (BACKUP_MODE) 31 //#define BACKUP_RDQS // enable STATIC timing settings for RDQS (BACKUP_MODE) 32 //#define BACKUP_WDQ // enable STATIC timing settings for WDQ (BACKUP_MODE) 33 34 35 36 //#define BACKUP_COMPS // enable *COMP overrides (BACKUP_MODE) 37 //#define RX_EYE_CHECK // enable the RD_TRAIN eye check 38 #define HMC_TEST // enable Host to Memory Clock Alignment 39 #define R2R_SHARING // enable multi-rank support via rank2rank sharing 40 41 #define FORCE_16BIT_DDRIO // disable signals not used in 16bit mode of DDRIO 42 43 44 45 // 46 // Debug support 47 // 48 49 #ifdef NDEBUG 50 #define DPF if(0) dpf 51 #else 52 #define DPF dpf 53 #endif 54 55 void dpf( uint32_t mask, char_t *bla, ...); 56 57 58 uint8_t mgetc(void); 59 uint8_t mgetch(void); 60 61 62 // Debug print type 63 #define D_ERROR 0x0001 64 #define D_INFO 0x0002 65 #define D_REGRD 0x0004 66 #define D_REGWR 0x0008 67 #define D_FCALL 0x0010 68 #define D_TRN 0x0020 69 #define D_TIME 0x0040 70 71 #define ENTERFN() DPF(D_FCALL, "<%s>\n", __FUNCTION__) 72 #define LEAVEFN() DPF(D_FCALL, "</%s>\n", __FUNCTION__) 73 #define REPORTFN() DPF(D_FCALL, "<%s/>\n", __FUNCTION__) 74 75 extern uint32_t DpfPrintMask; 76 77 #endif 78