1 //! \file 2 /* 3 ** Copyright (C) - Triton 4 ** 5 ** This program is under the terms of the Apache License 2.0. 6 */ 7 8 #ifndef TRITON_ARM32CPU_HPP 9 #define TRITON_ARM32CPU_HPP 10 11 #include <set> 12 #include <unordered_map> 13 #include <vector> 14 15 #include <triton/archEnums.hpp> 16 #include <triton/callbacks.hpp> 17 #include <triton/cpuInterface.hpp> 18 #include <triton/dllexport.hpp> 19 #include <triton/externalLibs.hpp> 20 #include <triton/instruction.hpp> 21 #include <triton/memoryAccess.hpp> 22 #include <triton/register.hpp> 23 #include <triton/tritonTypes.hpp> 24 #include <triton/arm32Specifications.hpp> 25 26 27 28 //! The Triton namespace 29 namespace triton { 30 /*! 31 * \addtogroup triton 32 * @{ 33 */ 34 35 //! The Architecture namespace 36 namespace arch { 37 /*! 38 * \ingroup triton 39 * \addtogroup arch 40 * @{ 41 */ 42 43 //! The ARM namespace 44 namespace arm { 45 /*! 46 * \ingroup arch 47 * \addtogroup arm 48 * @{ 49 */ 50 51 //! The arm32 namespace 52 namespace arm32 { 53 /*! 54 * \ingroup arm 55 * \addtogroup arm32 56 * @{ 57 */ 58 59 //! \class Arm32Cpu 60 /*! \brief This class is used to describe the ARM (32-bits) spec. */ 61 class Arm32Cpu : public CpuInterface, public Arm32Specifications { 62 63 static const triton::arch::register_e pcId = triton::arch::ID_REG_ARM32_PC; 64 static const triton::arch::register_e spId = triton::arch::ID_REG_ARM32_SP; 65 66 private: 67 //! Callbacks API 68 triton::callbacks::Callbacks* callbacks; 69 70 //! Capstone context for ARM mode. 71 triton::extlibs::capstone::csh handle_arm; 72 73 //! Capstone context for Thumb mode. 74 triton::extlibs::capstone::csh handle_thumb; 75 76 //! Copies a Arm32Cpu class. 77 void copy(const Arm32Cpu& other); 78 79 //! Initializes the disassembler. 80 inline void disassInit(void); 81 82 //! Post process instructions to provide a uniformity among ARM and Thumb modes. 83 void postDisassembly(triton::arch::Instruction& inst) const; 84 85 protected: 86 /*! \brief map of address -> concrete value 87 * 88 * \details 89 * **item1**: memory address<br> 90 * **item2**: concrete value 91 */ 92 std::unordered_map<triton::uint64, triton::uint8> memory; 93 94 //! Concrete value of r0 95 triton::uint8 r0[triton::size::dword]; 96 //! Concrete value of r1 97 triton::uint8 r1[triton::size::dword]; 98 //! Concrete value of r2 99 triton::uint8 r2[triton::size::dword]; 100 //! Concrete value of r3 101 triton::uint8 r3[triton::size::dword]; 102 //! Concrete value of r4 103 triton::uint8 r4[triton::size::dword]; 104 //! Concrete value of r5 105 triton::uint8 r5[triton::size::dword]; 106 //! Concrete value of r6 107 triton::uint8 r6[triton::size::dword]; 108 //! Concrete value of r7 109 triton::uint8 r7[triton::size::dword]; 110 //! Concrete value of r8 111 triton::uint8 r8[triton::size::dword]; 112 //! Concrete value of r9 113 triton::uint8 r9[triton::size::dword]; 114 //! Concrete value of r10 115 triton::uint8 r10[triton::size::dword]; 116 //! Concrete value of r11 117 triton::uint8 r11[triton::size::dword]; 118 //! Concrete value of r12 119 triton::uint8 r12[triton::size::dword]; 120 //! Concrete value of sp 121 triton::uint8 sp[triton::size::dword]; 122 //! Concrete value of r14 123 triton::uint8 r14[triton::size::dword]; 124 //! Concrete value of pc 125 triton::uint8 pc[triton::size::dword]; 126 // //! Concrete value of apsr 127 triton::uint8 apsr[triton::size::dword]; 128 129 //! Thumb mode flag 130 bool thumb; 131 132 public: 133 //! Constructor. 134 TRITON_EXPORT Arm32Cpu(triton::callbacks::Callbacks* callbacks=nullptr); 135 136 //! Constructor 137 TRITON_EXPORT Arm32Cpu(const Arm32Cpu& other); 138 139 //! Destructor. 140 TRITON_EXPORT virtual ~Arm32Cpu(); 141 142 //! Copies a Arm32Cpu class. 143 TRITON_EXPORT Arm32Cpu& operator=(const Arm32Cpu& other); 144 145 //! Returns true if regId is a GRP. 146 TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const; 147 148 /* Virtual pure inheritance ================================================= */ 149 TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const; 150 TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const; 151 TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const; 152 TRITON_EXPORT bool isThumb(void) const; 153 TRITON_EXPORT const std::unordered_map<triton::arch::register_e, const triton::arch::Register>& getAllRegisters(void) const; 154 TRITON_EXPORT const triton::arch::Register& getParentRegister(const triton::arch::Register& reg) const; 155 TRITON_EXPORT const triton::arch::Register& getParentRegister(triton::arch::register_e id) const; 156 TRITON_EXPORT const triton::arch::Register& getProgramCounter(void) const; 157 TRITON_EXPORT const triton::arch::Register& getRegister(triton::arch::register_e id) const; 158 TRITON_EXPORT const triton::arch::Register& getStackPointer(void) const; 159 TRITON_EXPORT std::set<const triton::arch::Register*> getParentRegisters(void) const; 160 TRITON_EXPORT std::vector<triton::uint8> getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const; 161 TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const; 162 TRITON_EXPORT triton::uint32 gprBitSize(void) const; 163 TRITON_EXPORT triton::uint32 gprSize(void) const; 164 TRITON_EXPORT triton::uint32 numberOfRegisters(void) const; 165 TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess& mem, bool execCallbacks=true) const; 166 TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register& reg, bool execCallbacks=true) const; 167 TRITON_EXPORT triton::uint8 getConcreteMemoryValue(triton::uint64 addr, bool execCallbacks=true) const; 168 TRITON_EXPORT void clear(void); 169 TRITON_EXPORT void disassembly(triton::arch::Instruction& inst) const; 170 TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector<triton::uint8>& values); 171 TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const triton::uint8* area, triton::usize size); 172 TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess& mem, const triton::uint512& value); 173 TRITON_EXPORT void setConcreteMemoryValue(triton::uint64 addr, triton::uint8 value); 174 TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register& reg, const triton::uint512& value); 175 TRITON_EXPORT void setThumb(bool state); 176 TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess& mem) const; 177 TRITON_EXPORT bool isConcreteMemoryValueDefined(triton::uint64 baseAddr, triton::usize size=1) const; 178 TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess& mem); 179 TRITON_EXPORT void clearConcreteMemoryValue(triton::uint64 baseAddr, triton::usize size=1); 180 /* End of virtual pure inheritance ========================================== */ 181 }; 182 183 /*! @} End of arm32 namespace */ 184 }; 185 /*! @} End of arm namespace */ 186 }; 187 /*! @} End of arch namespace */ 188 }; 189 /*! @} End of triton namespace */ 190 }; 191 192 #endif /* TRITON_ARM32CPU_HPP */ 193