1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle 4 * Copyright (C) 1999 by Silicon Graphics, Inc. 5 * Copyright (C) 2001 MIPS Technologies, Inc. 6 * Copyright (C) 2002 Maciej W. Rozycki 7 * 8 * Some useful macros for MIPS assembler code 9 * 10 * Some of the routines below contain useless nops that will be optimized 11 * away by gas in -O mode. These nops are however required to fill delay 12 * slots in noreorder mode. 13 */ 14 #ifndef __ASM_ASM_H 15 #define __ASM_ASM_H 16 17 #include <asm/sgidefs.h> 18 19 #define ENTRY(symbol) \ 20 .globl symbol; \ 21 .type symbol, @function; \ 22 .ent symbol, 0; \ 23 symbol: .cfi_startproc; \ 24 .insn 25 26 /* 27 * LEAF - declare leaf routine 28 */ 29 #define LEAF(symbol) \ 30 .globl symbol; \ 31 .align 2; \ 32 .type symbol, @function; \ 33 .ent symbol, 0; \ 34 .section .text.symbol, "x"; \ 35 symbol: .frame sp, 0, ra; \ 36 .cfi_startproc; \ 37 .insn 38 39 /* 40 * NESTED - declare nested routine entry point 41 */ 42 #define NESTED(symbol, framesize, rpc) \ 43 .globl symbol; \ 44 .align 2; \ 45 .type symbol, @function; \ 46 .ent symbol, 0; \ 47 .section .text.symbol, "x"; \ 48 symbol: .frame sp, framesize, rpc; \ 49 .cfi_startproc; \ 50 .insn 51 52 /* 53 * END - mark end of function 54 */ 55 #define END(function) \ 56 .cfi_endproc; \ 57 .end function; \ 58 .size function, .-function 59 60 /* 61 * EXPORT - export definition of symbol 62 */ 63 #define EXPORT(symbol) \ 64 .globl symbol; \ 65 symbol: 66 67 /* 68 * FEXPORT - export definition of a function symbol 69 */ 70 #define FEXPORT(symbol) \ 71 .globl symbol; \ 72 .type symbol, @function; \ 73 symbol: .insn 74 75 /* 76 * ABS - export absolute symbol 77 */ 78 #define ABS(symbol,value) \ 79 .globl symbol; \ 80 symbol = value 81 82 #define PANIC(msg) \ 83 .set push; \ 84 .set reorder; \ 85 PTR_LA a0, 8f; \ 86 jal panic; \ 87 9: b 9b; \ 88 .set pop; \ 89 TEXT(msg) 90 91 /* 92 * Print formatted string 93 */ 94 #ifdef CONFIG_PRINTK 95 #define PRINT(string) \ 96 .set push; \ 97 .set reorder; \ 98 PTR_LA a0, 8f; \ 99 jal printk; \ 100 .set pop; \ 101 TEXT(string) 102 #else 103 #define PRINT(string) 104 #endif 105 106 #define TEXT(msg) \ 107 .pushsection .data; \ 108 8: .asciiz msg; \ 109 .popsection; 110 111 /* 112 * Stack alignment 113 */ 114 #if (_MIPS_SIM == _MIPS_SIM_ABI32) 115 #define ALSZ 7 116 #define ALMASK ~7 117 #endif 118 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) 119 #define ALSZ 15 120 #define ALMASK ~15 121 #endif 122 123 /* 124 * Macros to handle different pointer/register sizes for 32/64-bit code 125 */ 126 127 /* 128 * Size of a register 129 */ 130 #ifdef __mips64 131 #define SZREG 8 132 #else 133 #define SZREG 4 134 #endif 135 136 /* 137 * Use the following macros in assemblercode to load/store registers, 138 * pointers etc. 139 */ 140 #if (_MIPS_SIM == _MIPS_SIM_ABI32) 141 #define REG_S sw 142 #define REG_L lw 143 #define REG_SUBU subu 144 #define REG_ADDU addu 145 #endif 146 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) 147 #define REG_S sd 148 #define REG_L ld 149 #define REG_SUBU dsubu 150 #define REG_ADDU daddu 151 #endif 152 153 /* 154 * How to add/sub/load/store/shift C int variables. 155 */ 156 #if (_MIPS_SZINT == 32) 157 #define INT_ADD add 158 #define INT_ADDU addu 159 #define INT_ADDI addi 160 #define INT_ADDIU addiu 161 #define INT_SUB sub 162 #define INT_SUBU subu 163 #define INT_L lw 164 #define INT_S sw 165 #define INT_SLL sll 166 #define INT_SLLV sllv 167 #define INT_SRL srl 168 #define INT_SRLV srlv 169 #define INT_SRA sra 170 #define INT_SRAV srav 171 #endif 172 173 #if (_MIPS_SZINT == 64) 174 #define INT_ADD dadd 175 #define INT_ADDU daddu 176 #define INT_ADDI daddi 177 #define INT_ADDIU daddiu 178 #define INT_SUB dsub 179 #define INT_SUBU dsubu 180 #define INT_L ld 181 #define INT_S sd 182 #define INT_SLL dsll 183 #define INT_SLLV dsllv 184 #define INT_SRL dsrl 185 #define INT_SRLV dsrlv 186 #define INT_SRA dsra 187 #define INT_SRAV dsrav 188 #endif 189 190 /* 191 * How to add/sub/load/store/shift C long variables. 192 */ 193 #if (_MIPS_SZLONG == 32) 194 #define LONG_ADD add 195 #define LONG_ADDU addu 196 #define LONG_ADDI addi 197 #define LONG_ADDIU addiu 198 #define LONG_SUB sub 199 #define LONG_SUBU subu 200 #define LONG_L lw 201 #define LONG_S sw 202 #define LONG_SP swp 203 #define LONG_SLL sll 204 #define LONG_SLLV sllv 205 #define LONG_SRL srl 206 #define LONG_SRLV srlv 207 #define LONG_SRA sra 208 #define LONG_SRAV srav 209 210 #define LONG .word 211 #define LONGSIZE 4 212 #define LONGMASK 3 213 #define LONGLOG 2 214 #endif 215 216 #if (_MIPS_SZLONG == 64) 217 #define LONG_ADD dadd 218 #define LONG_ADDU daddu 219 #define LONG_ADDI daddi 220 #define LONG_ADDIU daddiu 221 #define LONG_SUB dsub 222 #define LONG_SUBU dsubu 223 #define LONG_L ld 224 #define LONG_S sd 225 #define LONG_SP sdp 226 #define LONG_SLL dsll 227 #define LONG_SLLV dsllv 228 #define LONG_SRL dsrl 229 #define LONG_SRLV dsrlv 230 #define LONG_SRA dsra 231 #define LONG_SRAV dsrav 232 233 #define LONG .dword 234 #define LONGSIZE 8 235 #define LONGMASK 7 236 #define LONGLOG 3 237 #endif 238 239 /* 240 * How to add/sub/load/store/shift pointers. 241 */ 242 #if (_MIPS_SZPTR == 32) 243 #define PTR_ADD add 244 #define PTR_ADDU addu 245 #define PTR_ADDI addi 246 #define PTR_ADDIU addiu 247 #define PTR_SUB sub 248 #define PTR_SUBU subu 249 #define PTR_L lw 250 #define PTR_S sw 251 #define PTR_LA la 252 #define PTR_LI li 253 #define PTR_SLL sll 254 #define PTR_SLLV sllv 255 #define PTR_SRL srl 256 #define PTR_SRLV srlv 257 #define PTR_SRA sra 258 #define PTR_SRAV srav 259 260 #define PTR_SCALESHIFT 2 261 262 #define PTR .word 263 #define PTRSIZE 4 264 #define PTRLOG 2 265 #endif 266 267 #if (_MIPS_SZPTR == 64) 268 #define PTR_ADD dadd 269 #define PTR_ADDU daddu 270 #define PTR_ADDI daddi 271 #define PTR_ADDIU daddiu 272 #define PTR_SUB dsub 273 #define PTR_SUBU dsubu 274 #define PTR_L ld 275 #define PTR_S sd 276 #define PTR_LA dla 277 #define PTR_LI dli 278 #define PTR_SLL dsll 279 #define PTR_SLLV dsllv 280 #define PTR_SRL dsrl 281 #define PTR_SRLV dsrlv 282 #define PTR_SRA dsra 283 #define PTR_SRAV dsrav 284 285 #define PTR_SCALESHIFT 3 286 287 #define PTR .dword 288 #define PTRSIZE 8 289 #define PTRLOG 3 290 #endif 291 292 /* 293 * Some cp0 registers were extended to 64bit for MIPS III. 294 */ 295 #if (_MIPS_SIM == _MIPS_SIM_ABI32) 296 #define MFC0 mfc0 297 #define MTC0 mtc0 298 #endif 299 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) 300 #define MFC0 dmfc0 301 #define MTC0 dmtc0 302 #endif 303 304 #define SSNOP sll zero, zero, 1 305 306 #ifdef CONFIG_SGI_IP28 307 /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */ 308 #include <asm/cacheops.h> 309 #define R10KCBARRIER(addr) cache CACHE_BARRIER, addr; 310 #else 311 #define R10KCBARRIER(addr) 312 #endif 313 314 #endif /* __ASM_ASM_H */ 315