1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 4 * Vikas Manocha, <vikas.manocha@st.com> 5 */ 6 7 #ifndef _STM32_GPIO_H_ 8 #define _STM32_GPIO_H_ 9 #include <asm/gpio.h> 10 11 enum stm32_gpio_mode { 12 STM32_GPIO_MODE_IN = 0, 13 STM32_GPIO_MODE_OUT, 14 STM32_GPIO_MODE_AF, 15 STM32_GPIO_MODE_AN 16 }; 17 18 enum stm32_gpio_otype { 19 STM32_GPIO_OTYPE_PP = 0, 20 STM32_GPIO_OTYPE_OD 21 }; 22 23 enum stm32_gpio_speed { 24 STM32_GPIO_SPEED_2M = 0, 25 STM32_GPIO_SPEED_25M, 26 STM32_GPIO_SPEED_50M, 27 STM32_GPIO_SPEED_100M 28 }; 29 30 enum stm32_gpio_pupd { 31 STM32_GPIO_PUPD_NO = 0, 32 STM32_GPIO_PUPD_UP, 33 STM32_GPIO_PUPD_DOWN 34 }; 35 36 enum stm32_gpio_af { 37 STM32_GPIO_AF0 = 0, 38 STM32_GPIO_AF1, 39 STM32_GPIO_AF2, 40 STM32_GPIO_AF3, 41 STM32_GPIO_AF4, 42 STM32_GPIO_AF5, 43 STM32_GPIO_AF6, 44 STM32_GPIO_AF7, 45 STM32_GPIO_AF8, 46 STM32_GPIO_AF9, 47 STM32_GPIO_AF10, 48 STM32_GPIO_AF11, 49 STM32_GPIO_AF12, 50 STM32_GPIO_AF13, 51 STM32_GPIO_AF14, 52 STM32_GPIO_AF15 53 }; 54 55 struct stm32_gpio_dsc { 56 u8 port; 57 u8 pin; 58 }; 59 60 struct stm32_gpio_ctl { 61 enum stm32_gpio_mode mode; 62 enum stm32_gpio_otype otype; 63 enum stm32_gpio_speed speed; 64 enum stm32_gpio_pupd pupd; 65 enum stm32_gpio_af af; 66 }; 67 68 struct stm32_gpio_regs { 69 u32 moder; /* GPIO port mode */ 70 u32 otyper; /* GPIO port output type */ 71 u32 ospeedr; /* GPIO port output speed */ 72 u32 pupdr; /* GPIO port pull-up/pull-down */ 73 u32 idr; /* GPIO port input data */ 74 u32 odr; /* GPIO port output data */ 75 u32 bsrr; /* GPIO port bit set/reset */ 76 u32 lckr; /* GPIO port configuration lock */ 77 u32 afr[2]; /* GPIO alternate function */ 78 }; 79 80 struct stm32_gpio_priv { 81 struct stm32_gpio_regs *regs; 82 unsigned int gpio_range; 83 }; 84 85 int stm32_offset_to_index(struct udevice *dev, unsigned int offset); 86 87 #endif /* _STM32_GPIO_H_ */ 88