1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * Author: Roy Zang <tie-fei.zang@freescale.com>
5 */
6
7 #include <config.h>
8 #include <common.h>
9 #include <log.h>
10 #include <asm/io.h>
11 #include <asm/immap_85xx.h>
12 #include <asm/fsl_serdes.h>
13
14 #define SRDS1_MAX_LANES 4
15
16 static u32 serdes1_prtcl_map;
17
18 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
19 [0x00] = {PCIE1, PCIE2, NONE, NONE},
20 [0x01] = {PCIE1, PCIE2, PCIE3, NONE},
21 [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2},
22 [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2},
23 };
24
is_serdes_configured(enum srds_prtcl device)25 int is_serdes_configured(enum srds_prtcl device)
26 {
27 int ret;
28
29 if (!(serdes1_prtcl_map & (1 << NONE)))
30 fsl_serdes_init();
31
32 ret = (1 << device) & serdes1_prtcl_map;
33 return ret;
34 }
35
fsl_serdes_init(void)36 void fsl_serdes_init(void)
37 {
38 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
39 u32 pordevsr = in_be32(&gur->pordevsr);
40 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
41 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
42 int lane;
43
44 if (serdes1_prtcl_map & (1 << NONE))
45 return;
46
47 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
48
49 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
50 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
51 return;
52 }
53 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
54 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
55 serdes1_prtcl_map |= (1 << lane_prtcl);
56 }
57
58 /* Set the first bit to indicate serdes has been initialized */
59 serdes1_prtcl_map |= (1 << NONE);
60 }
61