1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2008
4 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
5 *
6 * Copyright 2004 Freescale Semiconductor.
7 * (C) Copyright 2002,2003, Motorola Inc.
8 * Xianghua Xiao, (X.Xiao@motorola.com)
9 *
10 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
11 */
12
13 #include <common.h>
14 #include <clock_legacy.h>
15 #include <env.h>
16 #include <init.h>
17 #include <pci.h>
18 #include <uuid.h>
19 #include <asm/global_data.h>
20 #include <asm/processor.h>
21 #include <asm/immap_85xx.h>
22 #include <ioports.h>
23 #include <flash.h>
24 #include <linux/delay.h>
25 #include <linux/libfdt.h>
26 #include <fdt_support.h>
27 #include <asm/io.h>
28 #include <i2c.h>
29 #include <video_fb.h>
30 #include "upm_table.h"
31
32 DECLARE_GLOBAL_DATA_PTR;
33
34 extern flash_info_t flash_info[]; /* FLASH chips info */
35
36 void local_bus_init (void);
37 ulong flash_get_size (ulong base, int banknum);
38
checkboard(void)39 int checkboard (void)
40 {
41 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
42 char buf[64];
43 int f;
44 int i = env_get_f("serial#", buf, sizeof(buf));
45 #ifdef CONFIG_PCI
46 char *src;
47 #endif
48
49 puts("Board: Socrates");
50 if (i > 0) {
51 puts(", serial# ");
52 puts(buf);
53 }
54 putc('\n');
55
56 #if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
57 /* Check the PCI_clk sel bit */
58 if (in_be32(&gur->porpllsr) & (1<<15)) {
59 src = "SYSCLK";
60 f = CONFIG_SYS_CLK_FREQ;
61 } else {
62 src = "PCI_CLK";
63 f = CONFIG_PCI_CLK_FREQ;
64 }
65 printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
66 #else
67 printf ("PCI1: disabled\n");
68 #endif
69
70 /*
71 * Initialize local bus.
72 */
73 local_bus_init ();
74 return 0;
75 }
76
misc_init_r(void)77 int misc_init_r (void)
78 {
79 /*
80 * Adjust flash start and offset to detected values
81 */
82 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
83 gd->bd->bi_flashoffset = 0;
84
85 /*
86 * Check if boot FLASH isn't max size
87 */
88 if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
89 set_lbc_or(0, gd->bd->bi_flashstart |
90 (CONFIG_SYS_OR0_PRELIM & 0x00007fff));
91 set_lbc_br(0, gd->bd->bi_flashstart |
92 (CONFIG_SYS_BR0_PRELIM & 0x00007fff));
93
94 /*
95 * Re-check to get correct base address
96 */
97 flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
98 }
99
100 /*
101 * Check if only one FLASH bank is available
102 */
103 if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
104 set_lbc_or(1, 0);
105 set_lbc_br(1, 0);
106
107 /*
108 * Re-do flash protection upon new addresses
109 */
110 flash_protect(FLAG_PROTECT_CLEAR,
111 gd->bd->bi_flashstart, 0xffffffff,
112 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
113
114 /* Monitor protection ON by default */
115 flash_protect(FLAG_PROTECT_SET,
116 CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE +
117 monitor_flash_len - 1,
118 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
119
120 /* Environment protection ON by default */
121 flash_protect(FLAG_PROTECT_SET,
122 CONFIG_ENV_ADDR,
123 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
124 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
125
126 /* Redundant environment protection ON by default */
127 flash_protect(FLAG_PROTECT_SET,
128 CONFIG_ENV_ADDR_REDUND,
129 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
130 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
131 }
132
133 #if defined(CONFIG_DM_PCI)
134 pci_init();
135 #endif
136
137 return 0;
138 }
139
140 /*
141 * Initialize Local Bus
142 */
local_bus_init(void)143 void local_bus_init (void)
144 {
145 volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
146 volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
147 sys_info_t sysinfo;
148 uint clkdiv;
149 uint lbc_mhz;
150 uint lcrr = CONFIG_SYS_LBC_LCRR;
151
152 get_sys_info (&sysinfo);
153 clkdiv = lbc->lcrr & LCRR_CLKDIV;
154 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
155
156 /* Disable PLL bypass for Local Bus Clock >= 66 MHz */
157 if (lbc_mhz >= 66)
158 lcrr &= ~LCRR_DBYP; /* DLL Enabled */
159 else
160 lcrr |= LCRR_DBYP; /* DLL Bypass */
161
162 out_be32 (&lbc->lcrr, lcrr);
163 asm ("sync;isync;msync");
164
165 out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
166 out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
167 out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
168 out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
169
170 /* Init UPMA for FPGA access */
171 out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
172 upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA) / sizeof(int));
173
174 /* Init UPMB for Lime controller access */
175 out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
176 upmconfig(UPMB, (uint *)UPMTableB, sizeof(UPMTableB) / sizeof(int));
177 }
178
179 #ifdef CONFIG_BOARD_EARLY_INIT_R
board_early_init_r(void)180 int board_early_init_r (void)
181 {
182 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
183
184 /* set and reset the GPIO pin 2 which will reset the W83782G chip */
185 out_8((unsigned char*)&gur->gpoutdr, 0x3F );
186 out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
187 udelay(200);
188 out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
189
190 return (0);
191 }
192 #endif /* CONFIG_BOARD_EARLY_INIT_R */
193
194 #ifdef CONFIG_OF_BOARD_SETUP
ft_board_setup(void * blob,struct bd_info * bd)195 int ft_board_setup(void *blob, struct bd_info *bd)
196 {
197 u32 val[12];
198 int rc, i = 0;
199
200 ft_cpu_setup(blob, bd);
201
202 /* Fixup NOR FLASH mapping */
203 val[i++] = 0; /* chip select number */
204 val[i++] = 0; /* always 0 */
205 val[i++] = gd->bd->bi_flashstart;
206 val[i++] = gd->bd->bi_flashsize;
207
208 /* Fixup FPGA mapping */
209 val[i++] = 3; /* chip select number */
210 val[i++] = 0; /* always 0 */
211 val[i++] = CONFIG_SYS_FPGA_BASE;
212 val[i++] = CONFIG_SYS_FPGA_SIZE;
213
214 rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
215 val, i * sizeof(u32), 1);
216 if (rc)
217 printf("Unable to update localbus ranges, err=%s\n",
218 fdt_strerror(rc));
219
220 return 0;
221 }
222 #endif /* CONFIG_OF_BOARD_SETUP */
223
224 #if defined(CONFIG_OF_SEPARATE)
board_fdt_blob_setup(void)225 void *board_fdt_blob_setup(void)
226 {
227 void *fw_dtb;
228
229 fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
230 if (fdt_magic(fw_dtb) != FDT_MAGIC) {
231 printf("DTB is not passed via %x\n", (u32)fw_dtb);
232 return NULL;
233 }
234
235 return fw_dtb;
236 }
237 #endif
238
get_serial_clock(void)239 int get_serial_clock(void)
240 {
241 return 333333330;
242 }
243