1 /* Copyright (c) 2015 The Linux Foundation. All rights reserved. 2 * 3 * Permission to use, copy, modify, and/or distribute this software for any 4 * purpose with or without fee is hereby granted, provided that the above 5 * copyright notice and this permission notice appear in all copies. 6 * 7 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 8 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 10 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 11 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 12 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 13 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * 15 */ 16 #ifndef __QCOM_CLK_IPQ4019_H__ 17 #define __QCOM_CLK_IPQ4019_H__ 18 19 #define GCC_DUMMY_CLK 0 20 #define AUDIO_CLK_SRC 1 21 #define BLSP1_QUP1_I2C_APPS_CLK_SRC 2 22 #define BLSP1_QUP1_SPI_APPS_CLK_SRC 3 23 #define BLSP1_QUP2_I2C_APPS_CLK_SRC 4 24 #define BLSP1_QUP2_SPI_APPS_CLK_SRC 5 25 #define BLSP1_UART1_APPS_CLK_SRC 6 26 #define BLSP1_UART2_APPS_CLK_SRC 7 27 #define GCC_USB3_MOCK_UTMI_CLK_SRC 8 28 #define GCC_APPS_CLK_SRC 9 29 #define GCC_APPS_AHB_CLK_SRC 10 30 #define GP1_CLK_SRC 11 31 #define GP2_CLK_SRC 12 32 #define GP3_CLK_SRC 13 33 #define SDCC1_APPS_CLK_SRC 14 34 #define FEPHY_125M_DLY_CLK_SRC 15 35 #define WCSS2G_CLK_SRC 16 36 #define WCSS5G_CLK_SRC 17 37 #define GCC_APSS_AHB_CLK 18 38 #define GCC_AUDIO_AHB_CLK 19 39 #define GCC_AUDIO_PWM_CLK 20 40 #define GCC_BLSP1_AHB_CLK 21 41 #define GCC_BLSP1_QUP1_I2C_APPS_CLK 22 42 #define GCC_BLSP1_QUP1_SPI_APPS_CLK 23 43 #define GCC_BLSP1_QUP2_I2C_APPS_CLK 24 44 #define GCC_BLSP1_QUP2_SPI_APPS_CLK 25 45 #define GCC_BLSP1_UART1_APPS_CLK 26 46 #define GCC_BLSP1_UART2_APPS_CLK 27 47 #define GCC_DCD_XO_CLK 28 48 #define GCC_GP1_CLK 29 49 #define GCC_GP2_CLK 30 50 #define GCC_GP3_CLK 31 51 #define GCC_BOOT_ROM_AHB_CLK 32 52 #define GCC_CRYPTO_AHB_CLK 33 53 #define GCC_CRYPTO_AXI_CLK 34 54 #define GCC_CRYPTO_CLK 35 55 #define GCC_ESS_CLK 36 56 #define GCC_IMEM_AXI_CLK 37 57 #define GCC_IMEM_CFG_AHB_CLK 38 58 #define GCC_PCIE_AHB_CLK 39 59 #define GCC_PCIE_AXI_M_CLK 40 60 #define GCC_PCIE_AXI_S_CLK 41 61 #define GCC_PCNOC_AHB_CLK 42 62 #define GCC_PRNG_AHB_CLK 43 63 #define GCC_QPIC_AHB_CLK 44 64 #define GCC_QPIC_CLK 45 65 #define GCC_SDCC1_AHB_CLK 46 66 #define GCC_SDCC1_APPS_CLK 47 67 #define GCC_SNOC_PCNOC_AHB_CLK 48 68 #define GCC_SYS_NOC_125M_CLK 49 69 #define GCC_SYS_NOC_AXI_CLK 50 70 #define GCC_TCSR_AHB_CLK 51 71 #define GCC_TLMM_AHB_CLK 52 72 #define GCC_USB2_MASTER_CLK 53 73 #define GCC_USB2_SLEEP_CLK 54 74 #define GCC_USB2_MOCK_UTMI_CLK 55 75 #define GCC_USB3_MASTER_CLK 56 76 #define GCC_USB3_SLEEP_CLK 57 77 #define GCC_USB3_MOCK_UTMI_CLK 58 78 #define GCC_WCSS2G_CLK 59 79 #define GCC_WCSS2G_REF_CLK 60 80 #define GCC_WCSS2G_RTC_CLK 61 81 #define GCC_WCSS5G_CLK 62 82 #define GCC_WCSS5G_REF_CLK 63 83 #define GCC_WCSS5G_RTC_CLK 64 84 #define GCC_APSS_DDRPLL_VCO 65 85 #define GCC_SDCC_PLLDIV_CLK 66 86 #define GCC_FEPLL_VCO 67 87 #define GCC_FEPLL125_CLK 68 88 #define GCC_FEPLL125DLY_CLK 69 89 #define GCC_FEPLL200_CLK 70 90 #define GCC_FEPLL500_CLK 71 91 #define GCC_FEPLL_WCSS2G_CLK 72 92 #define GCC_FEPLL_WCSS5G_CLK 73 93 #define GCC_APSS_CPU_PLLDIV_CLK 74 94 #define GCC_PCNOC_AHB_CLK_SRC 75 95 96 #endif 97