1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <image.h>
11 #include <init.h>
12 #include <log.h>
13 #include <ram.h>
14 #include <spl.h>
15 #include <asm/arch-rockchip/bootrom.h>
16 #include <asm/global_data.h>
17 #include <asm/io.h>
18 #include <linux/bitops.h>
19
20 DECLARE_GLOBAL_DATA_PTR;
21
board_return_to_bootrom(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)22 int board_return_to_bootrom(struct spl_image_info *spl_image,
23 struct spl_boot_device *bootdev)
24 {
25 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
26
27 return 0;
28 }
29
30 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
31 };
32
board_spl_was_booted_from(void)33 const char *board_spl_was_booted_from(void)
34 {
35 u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
36 const char *bootdevice_ofpath = NULL;
37
38 if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
39 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
40
41 if (bootdevice_ofpath)
42 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
43 __func__, bootdevice_brom_id, bootdevice_ofpath);
44 else
45 debug("%s: failed to resolve brom_bootdevice_id %x\n",
46 __func__, bootdevice_brom_id);
47
48 return bootdevice_ofpath;
49 }
50
spl_boot_device(void)51 u32 spl_boot_device(void)
52 {
53 u32 boot_device = BOOT_DEVICE_MMC1;
54
55 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
56 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
57 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
58 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \
59 defined(CONFIG_TARGET_CHROMEBOOK_BOB)
60 return BOOT_DEVICE_SPI;
61 #endif
62 if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
63 return BOOT_DEVICE_BOOTROM;
64
65 return boot_device;
66 }
67
spl_mmc_boot_mode(const u32 boot_device)68 u32 spl_mmc_boot_mode(const u32 boot_device)
69 {
70 return MMCSD_MODE_RAW;
71 }
72
73 #if !defined(CONFIG_ROCKCHIP_RK3188)
74 #define TIMER_LOAD_COUNT_L 0x00
75 #define TIMER_LOAD_COUNT_H 0x04
76 #define TIMER_CONTROL_REG 0x10
77 #define TIMER_EN 0x1
78 #define TIMER_FMODE BIT(0)
79 #define TIMER_RMODE BIT(1)
80
rockchip_stimer_init(void)81 __weak void rockchip_stimer_init(void)
82 {
83 /* If Timer already enabled, don't re-init it */
84 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
85
86 if (reg & TIMER_EN)
87 return;
88 #ifndef CONFIG_ARM64
89 asm volatile("mcr p15, 0, %0, c14, c0, 0"
90 : : "r"(COUNTER_FREQUENCY));
91 #endif
92 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
93 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
94 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
95 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
96 TIMER_CONTROL_REG);
97 }
98 #endif
99
board_early_init_f(void)100 __weak int board_early_init_f(void)
101 {
102 return 0;
103 }
104
arch_cpu_init(void)105 __weak int arch_cpu_init(void)
106 {
107 return 0;
108 }
109
board_init_f(ulong dummy)110 void board_init_f(ulong dummy)
111 {
112 int ret;
113
114 #ifdef CONFIG_DEBUG_UART
115 /*
116 * Debug UART can be used from here if required:
117 *
118 * debug_uart_init();
119 * printch('a');
120 * printhex8(0x1234);
121 * printascii("string");
122 */
123 debug_uart_init();
124 debug("\nspl:debug uart enabled in %s\n", __func__);
125 #endif
126
127 board_early_init_f();
128
129 ret = spl_early_init();
130 if (ret) {
131 printf("spl_early_init() failed: %d\n", ret);
132 hang();
133 }
134 arch_cpu_init();
135 #if !defined(CONFIG_ROCKCHIP_RK3188)
136 rockchip_stimer_init();
137 #endif
138 #ifdef CONFIG_SYS_ARCH_TIMER
139 /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
140 timer_init();
141 #endif
142 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM)
143 debug("\nspl:init dram\n");
144 ret = dram_init();
145 if (ret) {
146 printf("DRAM init failed: %d\n", ret);
147 return;
148 }
149 gd->ram_top = gd->ram_base + get_effective_memsize();
150 gd->ram_top = board_get_usable_ram_top(gd->ram_size);
151 #endif
152 preloader_console_init();
153 }
154