1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 5 */ 6 7 #ifndef _GPIO_H_ 8 #define _GPIO_H_ 9 10 enum stm32_gpio_mode { 11 STM32_GPIO_MODE_IN = 0, 12 STM32_GPIO_MODE_OUT, 13 STM32_GPIO_MODE_AF, 14 STM32_GPIO_MODE_AN 15 }; 16 17 enum stm32_gpio_otype { 18 STM32_GPIO_OTYPE_PP = 0, 19 STM32_GPIO_OTYPE_OD 20 }; 21 22 enum stm32_gpio_speed { 23 STM32_GPIO_SPEED_2M = 0, 24 STM32_GPIO_SPEED_25M, 25 STM32_GPIO_SPEED_50M, 26 STM32_GPIO_SPEED_100M 27 }; 28 29 enum stm32_gpio_pupd { 30 STM32_GPIO_PUPD_NO = 0, 31 STM32_GPIO_PUPD_UP, 32 STM32_GPIO_PUPD_DOWN 33 }; 34 35 enum stm32_gpio_af { 36 STM32_GPIO_AF0 = 0, 37 STM32_GPIO_AF1, 38 STM32_GPIO_AF2, 39 STM32_GPIO_AF3, 40 STM32_GPIO_AF4, 41 STM32_GPIO_AF5, 42 STM32_GPIO_AF6, 43 STM32_GPIO_AF7, 44 STM32_GPIO_AF8, 45 STM32_GPIO_AF9, 46 STM32_GPIO_AF10, 47 STM32_GPIO_AF11, 48 STM32_GPIO_AF12, 49 STM32_GPIO_AF13, 50 STM32_GPIO_AF14, 51 STM32_GPIO_AF15 52 }; 53 54 struct stm32_gpio_dsc { 55 u8 port; 56 u8 pin; 57 }; 58 59 struct stm32_gpio_ctl { 60 enum stm32_gpio_mode mode; 61 enum stm32_gpio_otype otype; 62 enum stm32_gpio_speed speed; 63 enum stm32_gpio_pupd pupd; 64 enum stm32_gpio_af af; 65 }; 66 67 struct stm32_gpio_regs { 68 u32 moder; /* GPIO port mode */ 69 u32 otyper; /* GPIO port output type */ 70 u32 ospeedr; /* GPIO port output speed */ 71 u32 pupdr; /* GPIO port pull-up/pull-down */ 72 u32 idr; /* GPIO port input data */ 73 u32 odr; /* GPIO port output data */ 74 u32 bsrr; /* GPIO port bit set/reset */ 75 u32 lckr; /* GPIO port configuration lock */ 76 u32 afr[2]; /* GPIO alternate function */ 77 }; 78 79 struct stm32_gpio_priv { 80 struct stm32_gpio_regs *regs; 81 unsigned int gpio_range; 82 }; 83 84 int stm32_offset_to_index(struct udevice *dev, unsigned int offset); 85 86 #endif /* _GPIO_H_ */ 87