1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * Cavium Thunder DTS file - Thunder SoC description
4 *
5 * Copyright (C) 2014, Cavium Inc.
6 *
7 */
8
9/ {
10	compatible = "cavium,thunder-88xx";
11	interrupt-parent = <&gic0>;
12	#address-cells = <2>;
13	#size-cells = <2>;
14
15	psci {
16		compatible = "arm,psci-0.2";
17		method = "smc";
18	};
19
20	cpus {
21		#address-cells = <2>;
22		#size-cells = <0>;
23
24		cpu@000 {
25			device_type = "cpu";
26			compatible = "cavium,thunder", "arm,armv8";
27			reg = <0x0 0x000>;
28			enable-method = "psci";
29		};
30		cpu@001 {
31			device_type = "cpu";
32			compatible = "cavium,thunder", "arm,armv8";
33			reg = <0x0 0x001>;
34			enable-method = "psci";
35		};
36		cpu@002 {
37			device_type = "cpu";
38			compatible = "cavium,thunder", "arm,armv8";
39			reg = <0x0 0x002>;
40			enable-method = "psci";
41		};
42		cpu@003 {
43			device_type = "cpu";
44			compatible = "cavium,thunder", "arm,armv8";
45			reg = <0x0 0x003>;
46			enable-method = "psci";
47		};
48		cpu@004 {
49			device_type = "cpu";
50			compatible = "cavium,thunder", "arm,armv8";
51			reg = <0x0 0x004>;
52			enable-method = "psci";
53		};
54		cpu@005 {
55			device_type = "cpu";
56			compatible = "cavium,thunder", "arm,armv8";
57			reg = <0x0 0x005>;
58			enable-method = "psci";
59		};
60		cpu@006 {
61			device_type = "cpu";
62			compatible = "cavium,thunder", "arm,armv8";
63			reg = <0x0 0x006>;
64			enable-method = "psci";
65		};
66		cpu@007 {
67			device_type = "cpu";
68			compatible = "cavium,thunder", "arm,armv8";
69			reg = <0x0 0x007>;
70			enable-method = "psci";
71		};
72		cpu@008 {
73			device_type = "cpu";
74			compatible = "cavium,thunder", "arm,armv8";
75			reg = <0x0 0x008>;
76			enable-method = "psci";
77		};
78		cpu@009 {
79			device_type = "cpu";
80			compatible = "cavium,thunder", "arm,armv8";
81			reg = <0x0 0x009>;
82			enable-method = "psci";
83		};
84		cpu@00a {
85			device_type = "cpu";
86			compatible = "cavium,thunder", "arm,armv8";
87			reg = <0x0 0x00a>;
88			enable-method = "psci";
89		};
90		cpu@00b {
91			device_type = "cpu";
92			compatible = "cavium,thunder", "arm,armv8";
93			reg = <0x0 0x00b>;
94			enable-method = "psci";
95		};
96		cpu@00c {
97			device_type = "cpu";
98			compatible = "cavium,thunder", "arm,armv8";
99			reg = <0x0 0x00c>;
100			enable-method = "psci";
101		};
102		cpu@00d {
103			device_type = "cpu";
104			compatible = "cavium,thunder", "arm,armv8";
105			reg = <0x0 0x00d>;
106			enable-method = "psci";
107		};
108		cpu@00e {
109			device_type = "cpu";
110			compatible = "cavium,thunder", "arm,armv8";
111			reg = <0x0 0x00e>;
112			enable-method = "psci";
113		};
114		cpu@00f {
115			device_type = "cpu";
116			compatible = "cavium,thunder", "arm,armv8";
117			reg = <0x0 0x00f>;
118			enable-method = "psci";
119		};
120		cpu@100 {
121			device_type = "cpu";
122			compatible = "cavium,thunder", "arm,armv8";
123			reg = <0x0 0x100>;
124			enable-method = "psci";
125		};
126		cpu@101 {
127			device_type = "cpu";
128			compatible = "cavium,thunder", "arm,armv8";
129			reg = <0x0 0x101>;
130			enable-method = "psci";
131		};
132		cpu@102 {
133			device_type = "cpu";
134			compatible = "cavium,thunder", "arm,armv8";
135			reg = <0x0 0x102>;
136			enable-method = "psci";
137		};
138		cpu@103 {
139			device_type = "cpu";
140			compatible = "cavium,thunder", "arm,armv8";
141			reg = <0x0 0x103>;
142			enable-method = "psci";
143		};
144		cpu@104 {
145			device_type = "cpu";
146			compatible = "cavium,thunder", "arm,armv8";
147			reg = <0x0 0x104>;
148			enable-method = "psci";
149		};
150		cpu@105 {
151			device_type = "cpu";
152			compatible = "cavium,thunder", "arm,armv8";
153			reg = <0x0 0x105>;
154			enable-method = "psci";
155		};
156		cpu@106 {
157			device_type = "cpu";
158			compatible = "cavium,thunder", "arm,armv8";
159			reg = <0x0 0x106>;
160			enable-method = "psci";
161		};
162		cpu@107 {
163			device_type = "cpu";
164			compatible = "cavium,thunder", "arm,armv8";
165			reg = <0x0 0x107>;
166			enable-method = "psci";
167		};
168		cpu@108 {
169			device_type = "cpu";
170			compatible = "cavium,thunder", "arm,armv8";
171			reg = <0x0 0x108>;
172			enable-method = "psci";
173		};
174		cpu@109 {
175			device_type = "cpu";
176			compatible = "cavium,thunder", "arm,armv8";
177			reg = <0x0 0x109>;
178			enable-method = "psci";
179		};
180		cpu@10a {
181			device_type = "cpu";
182			compatible = "cavium,thunder", "arm,armv8";
183			reg = <0x0 0x10a>;
184			enable-method = "psci";
185		};
186		cpu@10b {
187			device_type = "cpu";
188			compatible = "cavium,thunder", "arm,armv8";
189			reg = <0x0 0x10b>;
190			enable-method = "psci";
191		};
192		cpu@10c {
193			device_type = "cpu";
194			compatible = "cavium,thunder", "arm,armv8";
195			reg = <0x0 0x10c>;
196			enable-method = "psci";
197		};
198		cpu@10d {
199			device_type = "cpu";
200			compatible = "cavium,thunder", "arm,armv8";
201			reg = <0x0 0x10d>;
202			enable-method = "psci";
203		};
204		cpu@10e {
205			device_type = "cpu";
206			compatible = "cavium,thunder", "arm,armv8";
207			reg = <0x0 0x10e>;
208			enable-method = "psci";
209		};
210		cpu@10f {
211			device_type = "cpu";
212			compatible = "cavium,thunder", "arm,armv8";
213			reg = <0x0 0x10f>;
214			enable-method = "psci";
215		};
216		cpu@200 {
217			device_type = "cpu";
218			compatible = "cavium,thunder", "arm,armv8";
219			reg = <0x0 0x200>;
220			enable-method = "psci";
221		};
222		cpu@201 {
223			device_type = "cpu";
224			compatible = "cavium,thunder", "arm,armv8";
225			reg = <0x0 0x201>;
226			enable-method = "psci";
227		};
228		cpu@202 {
229			device_type = "cpu";
230			compatible = "cavium,thunder", "arm,armv8";
231			reg = <0x0 0x202>;
232			enable-method = "psci";
233		};
234		cpu@203 {
235			device_type = "cpu";
236			compatible = "cavium,thunder", "arm,armv8";
237			reg = <0x0 0x203>;
238			enable-method = "psci";
239		};
240		cpu@204 {
241			device_type = "cpu";
242			compatible = "cavium,thunder", "arm,armv8";
243			reg = <0x0 0x204>;
244			enable-method = "psci";
245		};
246		cpu@205 {
247			device_type = "cpu";
248			compatible = "cavium,thunder", "arm,armv8";
249			reg = <0x0 0x205>;
250			enable-method = "psci";
251		};
252		cpu@206 {
253			device_type = "cpu";
254			compatible = "cavium,thunder", "arm,armv8";
255			reg = <0x0 0x206>;
256			enable-method = "psci";
257		};
258		cpu@207 {
259			device_type = "cpu";
260			compatible = "cavium,thunder", "arm,armv8";
261			reg = <0x0 0x207>;
262			enable-method = "psci";
263		};
264		cpu@208 {
265			device_type = "cpu";
266			compatible = "cavium,thunder", "arm,armv8";
267			reg = <0x0 0x208>;
268			enable-method = "psci";
269		};
270		cpu@209 {
271			device_type = "cpu";
272			compatible = "cavium,thunder", "arm,armv8";
273			reg = <0x0 0x209>;
274			enable-method = "psci";
275		};
276		cpu@20a {
277			device_type = "cpu";
278			compatible = "cavium,thunder", "arm,armv8";
279			reg = <0x0 0x20a>;
280			enable-method = "psci";
281		};
282		cpu@20b {
283			device_type = "cpu";
284			compatible = "cavium,thunder", "arm,armv8";
285			reg = <0x0 0x20b>;
286			enable-method = "psci";
287		};
288		cpu@20c {
289			device_type = "cpu";
290			compatible = "cavium,thunder", "arm,armv8";
291			reg = <0x0 0x20c>;
292			enable-method = "psci";
293		};
294		cpu@20d {
295			device_type = "cpu";
296			compatible = "cavium,thunder", "arm,armv8";
297			reg = <0x0 0x20d>;
298			enable-method = "psci";
299		};
300		cpu@20e {
301			device_type = "cpu";
302			compatible = "cavium,thunder", "arm,armv8";
303			reg = <0x0 0x20e>;
304			enable-method = "psci";
305		};
306		cpu@20f {
307			device_type = "cpu";
308			compatible = "cavium,thunder", "arm,armv8";
309			reg = <0x0 0x20f>;
310			enable-method = "psci";
311		};
312	};
313
314	timer {
315		compatible = "arm,armv8-timer";
316		interrupts = <1 13 0xff01>,
317		             <1 14 0xff01>,
318		             <1 11 0xff01>,
319		             <1 10 0xff01>;
320	};
321
322	soc {
323		compatible = "simple-bus";
324		#address-cells = <2>;
325		#size-cells = <2>;
326		ranges;
327
328		refclk50mhz: refclk50mhz {
329			compatible = "fixed-clock";
330			#clock-cells = <0>;
331			clock-frequency = <50000000>;
332			clock-output-names = "refclk50mhz";
333		};
334
335		gic0: interrupt-controller@8010,00000000 {
336			compatible = "arm,gic-v3";
337			#interrupt-cells = <3>;
338			interrupt-controller;
339			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
340			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
341			interrupts = <1 9 0xf04>;
342		};
343
344		uaa0: serial@87e0,24000000 {
345			compatible = "arm,pl011", "arm,primecell";
346			reg = <0x87e0 0x24000000 0x0 0x1000>;
347			interrupts = <1 21 4>;
348			clocks = <&refclk50mhz>;
349			clock-names = "apb_pclk";
350			uboot,skip-init;
351		};
352
353		uaa1: serial@87e0,25000000 {
354			compatible = "arm,pl011", "arm,primecell";
355			reg = <0x87e0 0x25000000 0x0 0x1000>;
356			interrupts = <1 22 4>;
357			clocks = <&refclk50mhz>;
358			clock-names = "apb_pclk";
359			uboot,skip-init;
360		};
361	};
362};
363