1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2000-2002
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
7  * Scott McNutt <smcnutt@psyent.com>
8  */
9 
10 #include <common.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <timer.h>
14 #include <asm/io.h>
15 #include <linux/bitops.h>
16 
17 /* control register */
18 #define ALTERA_TIMER_CONT	BIT(1)	/* Continuous mode */
19 #define ALTERA_TIMER_START	BIT(2)	/* Start timer */
20 #define ALTERA_TIMER_STOP	BIT(3)	/* Stop timer */
21 
22 struct altera_timer_regs {
23 	u32	status;		/* Timer status reg */
24 	u32	control;	/* Timer control reg */
25 	u32	periodl;	/* Timeout period low */
26 	u32	periodh;	/* Timeout period high */
27 	u32	snapl;		/* Snapshot low */
28 	u32	snaph;		/* Snapshot high */
29 };
30 
31 struct altera_timer_plat {
32 	struct altera_timer_regs *regs;
33 };
34 
altera_timer_get_count(struct udevice * dev)35 static u64 altera_timer_get_count(struct udevice *dev)
36 {
37 	struct altera_timer_plat *plat = dev_get_plat(dev);
38 	struct altera_timer_regs *const regs = plat->regs;
39 	u32 val;
40 
41 	/* Trigger update */
42 	writel(0x0, &regs->snapl);
43 
44 	/* Read timer value */
45 	val = readl(&regs->snapl) & 0xffff;
46 	val |= (readl(&regs->snaph) & 0xffff) << 16;
47 	return timer_conv_64(~val);
48 }
49 
altera_timer_probe(struct udevice * dev)50 static int altera_timer_probe(struct udevice *dev)
51 {
52 	struct altera_timer_plat *plat = dev_get_plat(dev);
53 	struct altera_timer_regs *const regs = plat->regs;
54 
55 	writel(0, &regs->status);
56 	writel(0, &regs->control);
57 	writel(ALTERA_TIMER_STOP, &regs->control);
58 
59 	writel(0xffff, &regs->periodl);
60 	writel(0xffff, &regs->periodh);
61 	writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, &regs->control);
62 
63 	return 0;
64 }
65 
altera_timer_of_to_plat(struct udevice * dev)66 static int altera_timer_of_to_plat(struct udevice *dev)
67 {
68 	struct altera_timer_plat *plat = dev_get_plat(dev);
69 
70 	plat->regs = map_physmem(dev_read_addr(dev),
71 				 sizeof(struct altera_timer_regs),
72 				 MAP_NOCACHE);
73 
74 	return 0;
75 }
76 
77 static const struct timer_ops altera_timer_ops = {
78 	.get_count = altera_timer_get_count,
79 };
80 
81 static const struct udevice_id altera_timer_ids[] = {
82 	{ .compatible = "altr,timer-1.0" },
83 	{}
84 };
85 
86 U_BOOT_DRIVER(altera_timer) = {
87 	.name	= "altera_timer",
88 	.id	= UCLASS_TIMER,
89 	.of_match = altera_timer_ids,
90 	.of_to_plat = altera_timer_of_to_plat,
91 	.plat_auto	= sizeof(struct altera_timer_plat),
92 	.probe = altera_timer_probe,
93 	.ops	= &altera_timer_ops,
94 };
95