1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3  * This is from the ARM TF Project,
4  * Repository: https://github.com/ARM-software/arm-trusted-firmware.git
5  * File: include/common/bl_common.h
6  * Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights
7  * reserved.
8  * Copyright (C) 2016-2017 Rockchip Electronic Co.,Ltd
9  */
10 
11 #ifndef __BL_COMMON_H__
12 #define __BL_COMMON_H__
13 
14 #define ATF_PARAM_EP		0x01
15 #define ATF_PARAM_IMAGE_BINARY	0x02
16 #define ATF_PARAM_BL31		0x03
17 #define ATF_PARAM_BL_PARAMS	0x05
18 
19 #define ATF_VERSION_1	0x01
20 #define ATF_VERSION_2	0x02
21 
22 #define ATF_BL31_IMAGE_ID	0x03
23 #define ATF_BL32_IMAGE_ID	0x04
24 #define ATF_BL33_IMAGE_ID	0x05
25 
26 #define ATF_EP_SECURE	0x0
27 #define ATF_EP_NON_SECURE	0x1
28 
29 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
30 	(_p)->h.type = (uint8_t)(_type); \
31 	(_p)->h.version = (uint8_t)(_ver); \
32 	(_p)->h.size = (uint16_t)sizeof(*_p); \
33 	(_p)->h.attr = (uint32_t)(_attr) ; \
34 	} while (0)
35 
36 #define MODE_RW_SHIFT	0x4
37 #define MODE_RW_MASK	0x1
38 #define MODE_RW_64	0x0
39 #define MODE_RW_32	0x1
40 
41 #define MODE_EL_SHIFT	0x2
42 #define MODE_EL_MASK	0x3
43 #define MODE_EL3	0x3
44 #define MODE_EL2	0x2
45 #define MODE_EL1	0x1
46 #define MODE_EL0	0x0
47 
48 #define MODE_SP_SHIFT	0x0
49 #define MODE_SP_MASK	0x1
50 #define MODE_SP_EL0	0x0
51 #define MODE_SP_ELX	0x1
52 
53 #define SPSR_DAIF_SHIFT	6
54 #define SPSR_DAIF_MASK	0x0f
55 
56 #define SPSR_64(el, sp, daif)		\
57 	(MODE_RW_64 << MODE_RW_SHIFT |	\
58 	 ((el) & MODE_EL_MASK) << MODE_EL_SHIFT |	\
59 	 ((sp) & MODE_SP_MASK) << MODE_SP_SHIFT |	\
60 	 ((daif) & SPSR_DAIF_MASK) << SPSR_DAIF_SHIFT)
61 
62 #define SPSR_FIQ             (1 << 6)
63 #define SPSR_IRQ             (1 << 7)
64 #define SPSR_SERROR          (1 << 8)
65 #define SPSR_DEBUG           (1 << 9)
66 #define SPSR_EXCEPTION_MASK  (SPSR_FIQ | SPSR_IRQ | SPSR_SERROR | SPSR_DEBUG)
67 
68 #define DAIF_FIQ_BIT (1<<0)
69 #define DAIF_IRQ_BIT (1<<1)
70 #define DAIF_ABT_BIT (1<<2)
71 #define DAIF_DBG_BIT (1<<3)
72 #define DISABLE_ALL_EXECPTIONS	\
73 	(DAIF_FIQ_BIT | DAIF_IRQ_BIT | DAIF_ABT_BIT | DAIF_DBG_BIT)
74 
75 #ifndef __ASSEMBLY__
76 
77 /*******************************************************************************
78  * Structure used for telling the next BL how much of a particular type of
79  * memory is available for its use and how much is already used.
80  ******************************************************************************/
81 struct aapcs64_params {
82 	unsigned long arg0;
83 	unsigned long arg1;
84 	unsigned long arg2;
85 	unsigned long arg3;
86 	unsigned long arg4;
87 	unsigned long arg5;
88 	unsigned long arg6;
89 	unsigned long arg7;
90 };
91 
92 /***************************************************************************
93  * This structure provides version information and the size of the
94  * structure, attributes for the structure it represents
95  ***************************************************************************/
96 struct param_header {
97 	uint8_t type;		/* type of the structure */
98 	uint8_t version;    /* version of this structure */
99 	uint16_t size;      /* size of this structure in bytes */
100 	uint32_t attr;      /* attributes: unused bits SBZ */
101 };
102 
103 /*****************************************************************************
104  * This structure represents the superset of information needed while
105  * switching exception levels. The only two mechanisms to do so are
106  * ERET & SMC. Security state is indicated using bit zero of header
107  * attribute
108  * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
109  * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
110  * processing SMC to jump to BL31.
111  *****************************************************************************/
112 struct entry_point_info {
113 	struct param_header h;
114 	uintptr_t pc;
115 	uint32_t spsr;
116 	struct aapcs64_params args;
117 };
118 
119 /*****************************************************************************
120  * Image info binary provides information from the image loader that
121  * can be used by the firmware to manage available trusted RAM.
122  * More advanced firmware image formats can provide additional
123  * information that enables optimization or greater flexibility in the
124  * common firmware code
125  *****************************************************************************/
126 struct atf_image_info {
127 	struct param_header h;
128 	uintptr_t image_base;   /* physical address of base of image */
129 	uint32_t image_size;    /* bytes read from image file */
130 #if CONFIG_IS_ENABLED(ATF_LOAD_IMAGE_V2)
131 	uint32_t image_max_size;
132 #endif
133 };
134 
135 /*****************************************************************************
136  * The image descriptor struct definition.
137  *****************************************************************************/
138 struct image_desc {
139 	/* Contains unique image id for the image. */
140 	unsigned int image_id;
141 	/*
142 	 * This member contains Image state information.
143 	 * Refer IMAGE_STATE_XXX defined above.
144 	 */
145 	unsigned int state;
146 	uint32_t copied_size;	/* image size copied in blocks */
147 	struct atf_image_info atf_image_info;
148 	struct entry_point_info ep_info;
149 };
150 
151 /*******************************************************************************
152  * This structure represents the superset of information that can be passed to
153  * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
154  * populated only if BL2 detects its presence. A pointer to a structure of this
155  * type should be passed in X0 to BL31's cold boot entrypoint.
156  *
157  * Use of this structure and the X0 parameter is not mandatory: the BL31
158  * platform code can use other mechanisms to provide the necessary information
159  * about BL32 and BL33 to the common and SPD code.
160  *
161  * BL31 image information is mandatory if this structure is used. If either of
162  * the optional BL32 and BL33 image information is not provided, this is
163  * indicated by the respective image_info pointers being zero.
164  ******************************************************************************/
165 struct bl31_params {
166 	struct param_header h;
167 	struct atf_image_info *bl31_image_info;
168 	struct entry_point_info *bl32_ep_info;
169 	struct atf_image_info *bl32_image_info;
170 	struct entry_point_info *bl33_ep_info;
171 	struct atf_image_info *bl33_image_info;
172 };
173 
174 /* BL image node in the BL image execution sequence */
175 struct bl_params_node {
176 	unsigned int image_id;
177 	struct atf_image_info *image_info;
178 	struct entry_point_info *ep_info;
179 	struct bl_params_node *next_params_info;
180 };
181 
182 /*
183  * BL image head node in the BL image execution sequence
184  * It is also used to pass information to next BL image.
185  */
186 struct bl_params {
187 	struct param_header h;
188 	struct bl_params_node *head;
189 };
190 
191 #define for_each_bl_params_node(bl_params, node) \
192 	for ((node) = (bl_params)->head; \
193 	     (node); \
194 	     (node) = (node)->next_params_info)
195 
196 #endif /*__ASSEMBLY__ */
197 
198 #endif /* __BL_COMMON_H__ */
199