1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *
4  * Common functions for OMAP4/5 based boards
5  *
6  * (C) Copyright 2010
7  * Texas Instruments, <www.ti.com>
8  *
9  * Author :
10  *	Aneesh V	<aneesh@ti.com>
11  *	Steve Sakoman	<steve@sakoman.com>
12  */
13 #include <common.h>
14 #include <debug_uart.h>
15 #include <fdtdec.h>
16 #include <init.h>
17 #include <spl.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/global_data.h>
20 #include <linux/sizes.h>
21 #include <asm/emif.h>
22 #include <asm/omap_common.h>
23 #include <linux/compiler.h>
24 #include <asm/system.h>
25 #include <dm/root.h>
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
do_set_mux(u32 base,struct pad_conf_entry const * array,int size)29 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
30 {
31 	int i;
32 	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
33 
34 	for (i = 0; i < size; i++, pad++)
35 		writew(pad->val, base + pad->offset);
36 }
37 
set_mux_conf_regs(void)38 static void set_mux_conf_regs(void)
39 {
40 	switch (omap_hw_init_context()) {
41 	case OMAP_INIT_CONTEXT_SPL:
42 		set_muxconf_regs();
43 		break;
44 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
45 		break;
46 	case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
47 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
48 		set_muxconf_regs();
49 		break;
50 	}
51 }
52 
cortex_rev(void)53 u32 cortex_rev(void)
54 {
55 
56 	unsigned int rev;
57 
58 	/* Read Main ID Register (MIDR) */
59 	asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
60 
61 	return rev;
62 }
63 
omap_rev_string(void)64 static void omap_rev_string(void)
65 {
66 	u32 omap_rev = omap_revision();
67 	u32 soc_variant	= (omap_rev & 0xF0000000) >> 28;
68 	u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
69 	u32 major_rev = (omap_rev & 0x00000F00) >> 8;
70 	u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
71 
72 	const char *sec_s, *package = NULL;
73 
74 	switch (get_device_type()) {
75 	case TST_DEVICE:
76 		sec_s = "TST";
77 		break;
78 	case EMU_DEVICE:
79 		sec_s = "EMU";
80 		break;
81 	case HS_DEVICE:
82 		sec_s = "HS";
83 		break;
84 	case GP_DEVICE:
85 		sec_s = "GP";
86 		break;
87 	default:
88 		sec_s = "?";
89 	}
90 
91 #if defined(CONFIG_DRA7XX)
92 	if (is_dra76x()) {
93 		switch (omap_rev & 0xF) {
94 		case DRA762_ABZ_PACKAGE:
95 			package = "ABZ";
96 			break;
97 		case DRA762_ACD_PACKAGE:
98 		default:
99 			package = "ACD";
100 			break;
101 		}
102 	}
103 #endif
104 
105 	if (soc_variant)
106 		printf("OMAP");
107 	else
108 		printf("DRA");
109 	printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
110 	if (package)
111 		printf(" %s package\n", package);
112 	else
113 		puts("\n");
114 }
115 
116 #ifdef CONFIG_SPL_BUILD
spl_display_print(void)117 void spl_display_print(void)
118 {
119 	omap_rev_string();
120 }
121 #endif
122 
srcomp_enable(void)123 void __weak srcomp_enable(void)
124 {
125 }
126 
127 /**
128  * do_board_detect() - Detect board description
129  *
130  * Function to detect board description. This is expected to be
131  * overridden in the SoC family board file where desired.
132  */
do_board_detect(void)133 void __weak do_board_detect(void)
134 {
135 }
136 
137 /**
138  * vcores_init() - Assign omap_vcores based on board
139  *
140  * Function to pick the vcores based on board. This is expected to be
141  * overridden in the SoC family board file where desired.
142  */
vcores_init(void)143 void __weak vcores_init(void)
144 {
145 }
146 
s_init(void)147 void s_init(void)
148 {
149 }
150 
151 /**
152  * init_package_revision() - Initialize package revision
153  *
154  * Function to get the pacakage information. This is expected to be
155  * overridden in the SoC family file where desired.
156  */
init_package_revision(void)157 void __weak init_package_revision(void)
158 {
159 }
160 
161 /**
162  * early_system_init - Does Early system initialization.
163  *
164  * Does early system init of watchdog, muxing,  andclocks
165  * Watchdog disable is done always. For the rest what gets done
166  * depends on the boot mode in which this function is executed when
167  *   1. SPL running from SRAM
168  *   2. U-Boot running from FLASH
169  *   3. U-Boot loaded to SDRAM by SPL
170  *   4. U-Boot loaded to SDRAM by ROM code using the
171  *	Configuration Header feature
172  * Please have a look at the respective functions to see what gets
173  * done in each of these cases
174  * This function is called with SRAM stack.
175  */
early_system_init(void)176 void early_system_init(void)
177 {
178 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
179 	int ret;
180 	int rescan;
181 #endif
182 	init_omap_revision();
183 	hw_data_init();
184 	init_package_revision();
185 
186 #ifdef CONFIG_SPL_BUILD
187 	if (warm_reset())
188 		force_emif_self_refresh();
189 #endif
190 	watchdog_init();
191 	set_mux_conf_regs();
192 #ifdef CONFIG_SPL_BUILD
193 	srcomp_enable();
194 	do_io_settings();
195 #endif
196 	setup_early_clocks();
197 
198 #ifdef CONFIG_SPL_BUILD
199 	/*
200 	 * Save the boot parameters passed from romcode.
201 	 * We cannot delay the saving further than this,
202 	 * to prevent overwrites.
203 	 */
204 	save_omap_boot_params();
205 	spl_early_init();
206 #endif
207 	do_board_detect();
208 
209 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
210 	/*
211 	 * Board detection has been done.
212 	 * Let us see if another dtb wouldn't be a better match
213 	 * for our board
214 	 */
215 	ret = fdtdec_resetup(&rescan);
216 	if (!ret && rescan) {
217 		dm_uninit();
218 		dm_init_and_scan(true);
219 	}
220 #endif
221 
222 	vcores_init();
223 #ifdef CONFIG_DEBUG_UART_OMAP
224 	debug_uart_init();
225 #endif
226 	prcm_init();
227 }
228 
229 #ifdef CONFIG_SPL_BUILD
board_init_f(ulong dummy)230 void board_init_f(ulong dummy)
231 {
232 	early_system_init();
233 #ifdef CONFIG_BOARD_EARLY_INIT_F
234 	board_early_init_f();
235 #endif
236 	/* For regular u-boot sdram_init() is called from dram_init() */
237 	sdram_init();
238 	gd->ram_size = omap_sdram_size();
239 }
240 #endif
241 
arch_cpu_init_dm(void)242 int arch_cpu_init_dm(void)
243 {
244 	early_system_init();
245 	return 0;
246 }
247 
248 /*
249  * Routine: wait_for_command_complete
250  * Description: Wait for posting to finish on watchdog
251  */
wait_for_command_complete(struct watchdog * wd_base)252 void wait_for_command_complete(struct watchdog *wd_base)
253 {
254 	int pending = 1;
255 	do {
256 		pending = readl(&wd_base->wwps);
257 	} while (pending);
258 }
259 
260 /*
261  * Routine: watchdog_init
262  * Description: Shut down watch dogs
263  */
watchdog_init(void)264 void watchdog_init(void)
265 {
266 	struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
267 
268 	writel(WD_UNLOCK1, &wd2_base->wspr);
269 	wait_for_command_complete(wd2_base);
270 	writel(WD_UNLOCK2, &wd2_base->wspr);
271 }
272 
273 
274 /*
275  * This function finds the SDRAM size available in the system
276  * based on DMM section configurations
277  * This is needed because the size of memory installed may be
278  * different on different versions of the board
279  */
omap_sdram_size(void)280 u32 omap_sdram_size(void)
281 {
282 	u32 section, i, valid;
283 	u64 sdram_start = 0, sdram_end = 0, addr,
284 	    size, total_size = 0, trap_size = 0, trap_start = 0;
285 
286 	for (i = 0; i < 4; i++) {
287 		section	= __raw_readl(DMM_BASE + i*4);
288 		valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
289 			(EMIF_SDRC_ADDRSPC_SHIFT);
290 		addr = section & EMIF_SYS_ADDR_MASK;
291 
292 		/* See if the address is valid */
293 		if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
294 		    (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
295 			size = ((section & EMIF_SYS_SIZE_MASK) >>
296 				   EMIF_SYS_SIZE_SHIFT);
297 			size = 1 << size;
298 			size *= SZ_16M;
299 
300 			if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
301 				if (!sdram_start || (addr < sdram_start))
302 					sdram_start = addr;
303 				if (!sdram_end || ((addr + size) > sdram_end))
304 					sdram_end = addr + size;
305 			} else {
306 				trap_size = size;
307 				trap_start = addr;
308 			}
309 		}
310 	}
311 
312 	if ((trap_start >= sdram_start) && (trap_start < sdram_end))
313 		total_size = (sdram_end - sdram_start) - (trap_size);
314 	else
315 		total_size = sdram_end - sdram_start;
316 
317 	return total_size;
318 }
319 
320 
321 /*
322  * Routine: dram_init
323  * Description: sets uboots idea of sdram size
324  */
dram_init(void)325 int dram_init(void)
326 {
327 	sdram_init();
328 	gd->ram_size = omap_sdram_size();
329 	return 0;
330 }
331 
332 /*
333  * Print board information
334  */
checkboard(void)335 int checkboard(void)
336 {
337 	puts(sysinfo.board_string);
338 	return 0;
339 }
340 
341 #if defined(CONFIG_DISPLAY_CPUINFO)
342 /*
343  * Print CPU information
344  */
print_cpuinfo(void)345 int print_cpuinfo(void)
346 {
347 	puts("CPU  : ");
348 	omap_rev_string();
349 
350 	return 0;
351 }
352 #endif
353