1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
14 */
15
16 #ifndef _I2C_H_
17 #define _I2C_H_
18
19 #include <linker_lists.h>
20
21 /*
22 * For now there are essentially two parts to this file - driver model
23 * here at the top, and the older code below (with CONFIG_SYS_I2C being
24 * most recent). The plan is to migrate everything to driver model.
25 * The driver model structures and API are separate as they are different
26 * enough as to be incompatible for compilation purposes.
27 */
28
29 enum dm_i2c_chip_flags {
30 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
31 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
32 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
33 };
34
35 /** enum i2c_speed_mode - standard I2C speed modes */
36 enum i2c_speed_mode {
37 IC_SPEED_MODE_STANDARD,
38 IC_SPEED_MODE_FAST,
39 IC_SPEED_MODE_FAST_PLUS,
40 IC_SPEED_MODE_HIGH,
41 IC_SPEED_MODE_FAST_ULTRA,
42
43 IC_SPEED_MODE_COUNT,
44 };
45
46 /** enum i2c_speed_rate - standard I2C speeds in Hz */
47 enum i2c_speed_rate {
48 I2C_SPEED_STANDARD_RATE = 100000,
49 I2C_SPEED_FAST_RATE = 400000,
50 I2C_SPEED_FAST_PLUS_RATE = 1000000,
51 I2C_SPEED_HIGH_RATE = 3400000,
52 I2C_SPEED_FAST_ULTRA_RATE = 5000000,
53 };
54
55 /** enum i2c_address_mode - available address modes */
56 enum i2c_address_mode {
57 I2C_MODE_7_BIT,
58 I2C_MODE_10_BIT
59 };
60
61 /** enum i2c_device_t - Types of I2C devices, used for compatible strings */
62 enum i2c_device_t {
63 I2C_DEVICE_GENERIC,
64 I2C_DEVICE_HID_OVER_I2C,
65 };
66
67 struct udevice;
68 /**
69 * struct dm_i2c_chip - information about an i2c chip
70 *
71 * An I2C chip is a device on the I2C bus. It sits at a particular address
72 * and normally supports 7-bit or 10-bit addressing.
73 *
74 * To obtain this structure, use dev_get_parent_plat(dev) where dev is
75 * the chip to examine.
76 *
77 * @chip_addr: Chip address on bus
78 * @offset_len: Length of offset in bytes. A single byte offset can
79 * represent up to 256 bytes. A value larger than 1 may be
80 * needed for larger devices.
81 * @flags: Flags for this chip (dm_i2c_chip_flags)
82 * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
83 * devices which steal addresses as part of offset.
84 * If offset_len is zero, then the offset is encoded
85 * completely within the chip address itself.
86 * e.g. a devce with chip address of 0x2c with 512
87 * registers might use the bottom bit of the address
88 * to indicate which half of the address space is being
89 * accessed while still only using 1 byte offset.
90 * This means it will respond to chip address 0x2c and
91 * 0x2d.
92 * A real world example is the Atmel AT24C04. It's
93 * datasheet explains it's usage of this addressing
94 * mode.
95 * @emul: Emulator for this chip address (only used for emulation)
96 * @emul_idx: Emulator index, used for of-platdata and set by each i2c chip's
97 * bind() method. This allows i2c_emul_find() to work with of-platdata.
98 */
99 struct dm_i2c_chip {
100 uint chip_addr;
101 uint offset_len;
102 uint flags;
103 uint chip_addr_offset_mask;
104 #ifdef CONFIG_SANDBOX
105 struct udevice *emul;
106 bool test_mode;
107 int emul_idx;
108 #endif
109 };
110
111 /**
112 * struct dm_i2c_bus- information about an i2c bus
113 *
114 * An I2C bus contains 0 or more chips on it, each at its own address. The
115 * bus can operate at different speeds (measured in Hz, typically 100KHz
116 * or 400KHz).
117 *
118 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
119 * I2C bus udevice.
120 *
121 * @speed_hz: Bus speed in hertz (typically 100000)
122 * @max_transaction_bytes: Maximal size of single I2C transfer
123 */
124 struct dm_i2c_bus {
125 int speed_hz;
126 int max_transaction_bytes;
127 };
128
129 /*
130 * Not all of these flags are implemented in the U-Boot API
131 */
132 enum dm_i2c_msg_flags {
133 I2C_M_TEN = 0x0010, /* ten-bit chip address */
134 I2C_M_RD = 0x0001, /* read data, from slave to master */
135 I2C_M_STOP = 0x8000, /* send stop after this message */
136 I2C_M_NOSTART = 0x4000, /* no start before this message */
137 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
138 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
139 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
140 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
141 };
142
143 /**
144 * struct i2c_msg - an I2C message
145 *
146 * @addr: Slave address
147 * @flags: Flags (see enum dm_i2c_msg_flags)
148 * @len: Length of buffer in bytes, may be 0 for a probe
149 * @buf: Buffer to send/receive, or NULL if no data
150 */
151 struct i2c_msg {
152 uint addr;
153 uint flags;
154 uint len;
155 u8 *buf;
156 };
157
158 /**
159 * struct i2c_msg_list - a list of I2C messages
160 *
161 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
162 * appropriate in U-Boot.
163 *
164 * @msg: Pointer to i2c_msg array
165 * @nmsgs: Number of elements in the array
166 */
167 struct i2c_msg_list {
168 struct i2c_msg *msgs;
169 uint nmsgs;
170 };
171
172 /**
173 * dm_i2c_read() - read bytes from an I2C chip
174 *
175 * To obtain an I2C device (called a 'chip') given the I2C bus address you
176 * can use i2c_get_chip(). To obtain a bus by bus number use
177 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
178 *
179 * To set the address length of a devce use i2c_set_addr_len(). It
180 * defaults to 1.
181 *
182 * @dev: Chip to read from
183 * @offset: Offset within chip to start reading
184 * @buffer: Place to put data
185 * @len: Number of bytes to read
186 *
187 * @return 0 on success, -ve on failure
188 */
189 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
190
191 /**
192 * dm_i2c_write() - write bytes to an I2C chip
193 *
194 * See notes for dm_i2c_read() above.
195 *
196 * @dev: Chip to write to
197 * @offset: Offset within chip to start writing
198 * @buffer: Buffer containing data to write
199 * @len: Number of bytes to write
200 *
201 * @return 0 on success, -ve on failure
202 */
203 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
204 int len);
205
206 /**
207 * dm_i2c_probe() - probe a particular chip address
208 *
209 * This can be useful to check for the existence of a chip on the bus.
210 * It is typically implemented by writing the chip address to the bus
211 * and checking that the chip replies with an ACK.
212 *
213 * @bus: Bus to probe
214 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
215 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
216 * @devp: Returns the device found, or NULL if none
217 * @return 0 if a chip was found at that address, -ve if not
218 */
219 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
220 struct udevice **devp);
221
222 /**
223 * dm_i2c_reg_read() - Read a value from an I2C register
224 *
225 * This reads a single value from the given address in an I2C chip
226 *
227 * @dev: Device to use for transfer
228 * @addr: Address to read from
229 * @return value read, or -ve on error
230 */
231 int dm_i2c_reg_read(struct udevice *dev, uint offset);
232
233 /**
234 * dm_i2c_reg_write() - Write a value to an I2C register
235 *
236 * This writes a single value to the given address in an I2C chip
237 *
238 * @dev: Device to use for transfer
239 * @addr: Address to write to
240 * @val: Value to write (normally a byte)
241 * @return 0 on success, -ve on error
242 */
243 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
244
245 /**
246 * dm_i2c_xfer() - Transfer messages over I2C
247 *
248 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
249 * instead.
250 *
251 * @dev: Device to use for transfer
252 * @msg: List of messages to transfer
253 * @nmsgs: Number of messages to transfer
254 * @return 0 on success, -ve on error
255 */
256 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
257
258 /**
259 * dm_i2c_set_bus_speed() - set the speed of a bus
260 *
261 * @bus: Bus to adjust
262 * @speed: Requested speed in Hz
263 * @return 0 if OK, -EINVAL for invalid values
264 */
265 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
266
267 /**
268 * dm_i2c_get_bus_speed() - get the speed of a bus
269 *
270 * @bus: Bus to check
271 * @return speed of selected I2C bus in Hz, -ve on error
272 */
273 int dm_i2c_get_bus_speed(struct udevice *bus);
274
275 /**
276 * i2c_set_chip_flags() - set flags for a chip
277 *
278 * Typically addresses are 7 bits, but for 10-bit addresses you should set
279 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
280 *
281 * @dev: Chip to adjust
282 * @flags: New flags
283 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
284 */
285 int i2c_set_chip_flags(struct udevice *dev, uint flags);
286
287 /**
288 * i2c_get_chip_flags() - get flags for a chip
289 *
290 * @dev: Chip to check
291 * @flagsp: Place to put flags
292 * @return 0 if OK, other -ve value on error
293 */
294 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
295
296 /**
297 * i2c_set_offset_len() - set the offset length for a chip
298 *
299 * The offset used to access a chip may be up to 4 bytes long. Typically it
300 * is only 1 byte, which is enough for chips with 256 bytes of memory or
301 * registers. The default value is 1, but you can call this function to
302 * change it.
303 *
304 * @offset_len: New offset length value (typically 1 or 2)
305 */
306 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
307
308 /**
309 * i2c_get_offset_len() - get the offset length for a chip
310 *
311 * @return: Current offset length value (typically 1 or 2)
312 */
313 int i2c_get_chip_offset_len(struct udevice *dev);
314
315 /**
316 * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
317 *
318 * Some devices listen on multiple chip addresses to achieve larger offsets
319 * than their single or multiple byte offsets would allow for. You can use this
320 * function to set the bits that are valid to be used for offset overflow.
321 *
322 * @mask: The mask to be used for high offset bits within address
323 * @return 0 if OK, other -ve value on error
324 */
325 int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
326
327 /*
328 * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
329 *
330 * @return current chip addr offset mask
331 */
332 uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
333
334 /**
335 * i2c_deblock() - recover a bus that is in an unknown state
336 *
337 * See the deblock() method in 'struct dm_i2c_ops' for full information
338 *
339 * @bus: Bus to recover
340 * @return 0 if OK, -ve on error
341 */
342 int i2c_deblock(struct udevice *bus);
343
344 /**
345 * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
346 *
347 * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
348 * for deblocking the I2C bus.
349 *
350 * @sda_pin: SDA GPIO
351 * @scl_pin: SCL GPIO
352 * @scl_count: Number of SCL clock cycles generated to deblock SDA
353 * @start_count:Number of I2C start conditions sent after deblocking SDA
354 * @delay: Delay between SCL clock line changes
355 * @return 0 if OK, -ve on error
356 */
357 struct gpio_desc;
358 int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
359 unsigned int scl_count, unsigned int start_count,
360 unsigned int delay);
361
362 /**
363 * struct dm_i2c_ops - driver operations for I2C uclass
364 *
365 * Drivers should support these operations unless otherwise noted. These
366 * operations are intended to be used by uclass code, not directly from
367 * other code.
368 */
369 struct dm_i2c_ops {
370 /**
371 * xfer() - transfer a list of I2C messages
372 *
373 * @bus: Bus to read from
374 * @msg: List of messages to transfer
375 * @nmsgs: Number of messages in the list
376 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
377 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
378 * flags cannot be supported, other -ve value on some other error
379 */
380 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
381
382 /**
383 * probe_chip() - probe for the presense of a chip address
384 *
385 * This function is optional. If omitted, the uclass will send a zero
386 * length message instead.
387 *
388 * @bus: Bus to probe
389 * @chip_addr: Chip address to probe
390 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
391 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
392 * to default probem other -ve value on error
393 */
394 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
395
396 /**
397 * set_bus_speed() - set the speed of a bus (optional)
398 *
399 * The bus speed value will be updated by the uclass if this function
400 * does not return an error. This method is optional - if it is not
401 * provided then the driver can read the speed from
402 * dev_get_uclass_priv(bus)->speed_hz
403 *
404 * @bus: Bus to adjust
405 * @speed: Requested speed in Hz
406 * @return 0 if OK, -EINVAL for invalid values
407 */
408 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
409
410 /**
411 * get_bus_speed() - get the speed of a bus (optional)
412 *
413 * Normally this can be provided by the uclass, but if you want your
414 * driver to check the bus speed by looking at the hardware, you can
415 * implement that here. This method is optional. This method would
416 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
417 *
418 * @bus: Bus to check
419 * @return speed of selected I2C bus in Hz, -ve on error
420 */
421 int (*get_bus_speed)(struct udevice *bus);
422
423 /**
424 * set_flags() - set the flags for a chip (optional)
425 *
426 * This is generally implemented by the uclass, but drivers can
427 * check the value to ensure that unsupported options are not used.
428 * This method is optional. If provided, this method will always be
429 * called when the flags change.
430 *
431 * @dev: Chip to adjust
432 * @flags: New flags value
433 * @return 0 if OK, -EINVAL if value is unsupported
434 */
435 int (*set_flags)(struct udevice *dev, uint flags);
436
437 /**
438 * deblock() - recover a bus that is in an unknown state
439 *
440 * I2C is a synchronous protocol and resets of the processor in the
441 * middle of an access can block the I2C Bus until a powerdown of
442 * the full unit is done. This is because slaves can be stuck
443 * waiting for addition bus transitions for a transaction that will
444 * never complete. Resetting the I2C master does not help. The only
445 * way is to force the bus through a series of transitions to make
446 * sure that all slaves are done with the transaction. This method
447 * performs this 'deblocking' if support by the driver.
448 *
449 * This method is optional.
450 */
451 int (*deblock)(struct udevice *bus);
452 };
453
454 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
455
456 /**
457 * struct i2c_mux_ops - operations for an I2C mux
458 *
459 * The current mux state is expected to be stored in the mux itself since
460 * it is the only thing that knows how to make things work. The mux can
461 * record the current state and then avoid switching unless it is necessary.
462 * So select() can be skipped if the mux is already in the correct state.
463 * Also deselect() can be made a nop if required.
464 */
465 struct i2c_mux_ops {
466 /**
467 * select() - select one of of I2C buses attached to a mux
468 *
469 * This will be called when there is no bus currently selected by the
470 * mux. This method does not need to deselect the old bus since
471 * deselect() will be already have been called if necessary.
472 *
473 * @mux: Mux device
474 * @bus: I2C bus to select
475 * @channel: Channel number correponding to the bus to select
476 * @return 0 if OK, -ve on error
477 */
478 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
479
480 /**
481 * deselect() - select one of of I2C buses attached to a mux
482 *
483 * This is used to deselect the currently selected I2C bus.
484 *
485 * @mux: Mux device
486 * @bus: I2C bus to deselect
487 * @channel: Channel number correponding to the bus to deselect
488 * @return 0 if OK, -ve on error
489 */
490 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
491 };
492
493 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
494
495 /**
496 * i2c_get_chip() - get a device to use to access a chip on a bus
497 *
498 * This returns the device for the given chip address. The device can then
499 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
500 *
501 * @bus: Bus to examine
502 * @chip_addr: Chip address for the new device
503 * @offset_len: Length of a register offset in bytes (normally 1)
504 * @devp: Returns pointer to new device if found or -ENODEV if not
505 * found
506 */
507 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
508 struct udevice **devp);
509
510 /**
511 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
512 * a bus number
513 *
514 * This returns the device for the given chip address on a particular bus
515 * number.
516 *
517 * @busnum: Bus number to examine
518 * @chip_addr: Chip address for the new device
519 * @offset_len: Length of a register offset in bytes (normally 1)
520 * @devp: Returns pointer to new device if found or -ENODEV if not
521 * found
522 */
523 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
524 struct udevice **devp);
525
526 /**
527 * i2c_chip_of_to_plat() - Decode standard I2C platform data
528 *
529 * This decodes the chip address from a device tree node and puts it into
530 * its dm_i2c_chip structure. This should be called in your driver's
531 * of_to_plat() method.
532 *
533 * @blob: Device tree blob
534 * @node: Node offset to read from
535 * @spi: Place to put the decoded information
536 */
537 int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip);
538
539 /**
540 * i2c_dump_msgs() - Dump a list of I2C messages
541 *
542 * This may be useful for debugging.
543 *
544 * @msg: Message list to dump
545 * @nmsgs: Number of messages
546 */
547 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
548
549 /**
550 * i2c_emul_find() - Find an emulator for an i2c sandbox device
551 *
552 * This looks at the device's 'emul' phandle
553 *
554 * @dev: Device to find an emulator for
555 * @emulp: Returns the associated emulator, if found *
556 * @return 0 if OK, -ENOENT or -ENODEV if not found
557 */
558 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
559
560 /**
561 * i2c_emul_set_idx() - Set the emulator index for an i2c sandbox device
562 *
563 * With of-platdata we cannot find the emulator using the device tree, so rely
564 * on the bind() method of each i2c driver calling this function to tell us
565 * the of-platdata idx of the emulator
566 *
567 * @dev: i2c device to set the emulator for
568 * @emul_idx: of-platdata index for that emulator
569 */
570 void i2c_emul_set_idx(struct udevice *dev, int emul_idx);
571
572 /**
573 * i2c_emul_get_device() - Find the device being emulated
574 *
575 * Given an emulator this returns the associated device
576 *
577 * @emul: Emulator for the device
578 * @return device that @emul is emulating
579 */
580 struct udevice *i2c_emul_get_device(struct udevice *emul);
581
582 /* ACPI operations for generic I2C devices */
583 extern struct acpi_ops i2c_acpi_ops;
584
585 /**
586 * acpi_i2c_of_to_plat() - Read properties intended for ACPI
587 *
588 * This reads the generic I2C properties from the device tree, so that these
589 * can be used to create ACPI information for the device.
590 *
591 * See the i2c/generic-acpi.txt binding file for information about the
592 * properties.
593 *
594 * @dev: I2C device to process
595 * @return 0 if OK, -EINVAL if acpi,hid is not present
596 */
597 int acpi_i2c_of_to_plat(struct udevice *dev);
598
599 #if !CONFIG_IS_ENABLED(DM_I2C)
600
601 /*
602 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
603 *
604 * The implementation MUST NOT use static or global variables if the
605 * I2C routines are used to read SDRAM configuration information
606 * because this is done before the memories are initialized. Limited
607 * use of stack-based variables are OK (the initial stack size is
608 * limited).
609 *
610 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
611 */
612
613 /*
614 * Configuration items.
615 */
616 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
617
618 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
619 /* no muxes used bus = i2c adapters */
620 #define CONFIG_SYS_I2C_DIRECT_BUS 1
621 #define CONFIG_SYS_I2C_MAX_HOPS 0
622 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
623 #else
624 /* we use i2c muxes */
625 #undef CONFIG_SYS_I2C_DIRECT_BUS
626 #endif
627
628 /* define the I2C bus number for RTC and DTT if not already done */
629 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
630 #define CONFIG_SYS_RTC_BUS_NUM 0
631 #endif
632 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
633 #define CONFIG_SYS_SPD_BUS_NUM 0
634 #endif
635
636 struct i2c_adapter {
637 void (*init)(struct i2c_adapter *adap, int speed,
638 int slaveaddr);
639 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
640 int (*read)(struct i2c_adapter *adap, uint8_t chip,
641 uint addr, int alen, uint8_t *buffer,
642 int len);
643 int (*write)(struct i2c_adapter *adap, uint8_t chip,
644 uint addr, int alen, uint8_t *buffer,
645 int len);
646 uint (*set_bus_speed)(struct i2c_adapter *adap,
647 uint speed);
648 int speed;
649 int waitdelay;
650 int slaveaddr;
651 int init_done;
652 int hwadapnr;
653 char *name;
654 };
655
656 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
657 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
658 { \
659 .init = _init, \
660 .probe = _probe, \
661 .read = _read, \
662 .write = _write, \
663 .set_bus_speed = _set_speed, \
664 .speed = _speed, \
665 .slaveaddr = _slaveaddr, \
666 .init_done = 0, \
667 .hwadapnr = _hwadapnr, \
668 .name = #_name \
669 };
670
671 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
672 _set_speed, _speed, _slaveaddr, _hwadapnr) \
673 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
674 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
675 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
676
677 struct i2c_adapter *i2c_get_adapter(int index);
678
679 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
680 struct i2c_mux {
681 int id;
682 char name[16];
683 };
684
685 struct i2c_next_hop {
686 struct i2c_mux mux;
687 uint8_t chip;
688 uint8_t channel;
689 };
690
691 struct i2c_bus_hose {
692 int adapter;
693 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
694 };
695 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
696 extern struct i2c_bus_hose i2c_bus[];
697
698 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
699 #else
700 #define I2C_ADAPTER(bus) bus
701 #endif
702 #define I2C_BUS gd->cur_i2c_bus
703
704 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
705 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
706 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
707
708 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
709 #define I2C_MUX_PCA9540_ID 1
710 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
711 #define I2C_MUX_PCA9542_ID 2
712 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
713 #define I2C_MUX_PCA9544_ID 3
714 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
715 #define I2C_MUX_PCA9547_ID 4
716 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
717 #define I2C_MUX_PCA9548_ID 5
718 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
719 #endif
720
721 #ifndef I2C_SOFT_DECLARATIONS
722 # if (defined(CONFIG_AT91RM9200) || \
723 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
724 defined(CONFIG_AT91SAM9263))
725 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
726 # else
727 # define I2C_SOFT_DECLARATIONS
728 # endif
729 #endif
730
731 /*
732 * Many boards/controllers/drivers don't support an I2C slave interface so
733 * provide a default slave address for them for use in common code. A real
734 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
735 * support a slave interface.
736 */
737 #ifndef CONFIG_SYS_I2C_SLAVE
738 #define CONFIG_SYS_I2C_SLAVE 0xfe
739 #endif
740
741 /*
742 * Initialization, must be called once on start up, may be called
743 * repeatedly to change the speed and slave addresses.
744 */
745 #ifdef CONFIG_SYS_I2C_EARLY_INIT
746 void i2c_early_init_f(void);
747 #endif
748 void i2c_init(int speed, int slaveaddr);
749 void i2c_init_board(void);
750
751 #ifdef CONFIG_SYS_I2C
752 /*
753 * i2c_get_bus_num:
754 *
755 * Returns index of currently active I2C bus. Zero-based.
756 */
757 unsigned int i2c_get_bus_num(void);
758
759 /*
760 * i2c_set_bus_num:
761 *
762 * Change the active I2C bus. Subsequent read/write calls will
763 * go to this one.
764 *
765 * bus - bus index, zero based
766 *
767 * Returns: 0 on success, not 0 on failure
768 *
769 */
770 int i2c_set_bus_num(unsigned int bus);
771
772 /*
773 * i2c_init_all():
774 *
775 * Initializes all I2C adapters in the system. All i2c_adap structures must
776 * be initialized beforehead with function pointers and data, including
777 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
778 */
779 void i2c_init_all(void);
780
781 /*
782 * Probe the given I2C chip address. Returns 0 if a chip responded,
783 * not 0 on failure.
784 */
785 int i2c_probe(uint8_t chip);
786
787 /*
788 * Read/Write interface:
789 * chip: I2C chip address, range 0..127
790 * addr: Memory (register) address within the chip
791 * alen: Number of bytes to use for addr (typically 1, 2 for larger
792 * memories, 0 for register type devices with only one
793 * register)
794 * buffer: Where to read/write the data
795 * len: How many bytes to read/write
796 *
797 * Returns: 0 on success, not 0 on failure
798 */
799 int i2c_read(uint8_t chip, unsigned int addr, int alen,
800 uint8_t *buffer, int len);
801
802 int i2c_write(uint8_t chip, unsigned int addr, int alen,
803 uint8_t *buffer, int len);
804
805 /*
806 * Utility routines to read/write registers.
807 */
808 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
809
810 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
811
812 /*
813 * i2c_set_bus_speed:
814 *
815 * Change the speed of the active I2C bus
816 *
817 * speed - bus speed in Hz
818 *
819 * Returns: new bus speed
820 *
821 */
822 unsigned int i2c_set_bus_speed(unsigned int speed);
823
824 /*
825 * i2c_get_bus_speed:
826 *
827 * Returns speed of currently active I2C bus in Hz
828 */
829
830 unsigned int i2c_get_bus_speed(void);
831
832 #else
833
834 /*
835 * Probe the given I2C chip address. Returns 0 if a chip responded,
836 * not 0 on failure.
837 */
838 int i2c_probe(uchar chip);
839
840 /*
841 * Read/Write interface:
842 * chip: I2C chip address, range 0..127
843 * addr: Memory (register) address within the chip
844 * alen: Number of bytes to use for addr (typically 1, 2 for larger
845 * memories, 0 for register type devices with only one
846 * register)
847 * buffer: Where to read/write the data
848 * len: How many bytes to read/write
849 *
850 * Returns: 0 on success, not 0 on failure
851 */
852 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
853 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
854
855 /*
856 * Utility routines to read/write registers.
857 */
i2c_reg_read(u8 addr,u8 reg)858 static inline u8 i2c_reg_read(u8 addr, u8 reg)
859 {
860 u8 buf;
861
862 #ifdef DEBUG
863 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
864 #endif
865
866 i2c_read(addr, reg, 1, &buf, 1);
867
868 return buf;
869 }
870
i2c_reg_write(u8 addr,u8 reg,u8 val)871 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
872 {
873 #ifdef DEBUG
874 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
875 __func__, addr, reg, val);
876 #endif
877
878 i2c_write(addr, reg, 1, &val, 1);
879 }
880
881 /*
882 * Functions for setting the current I2C bus and its speed
883 */
884
885 /*
886 * i2c_set_bus_num:
887 *
888 * Change the active I2C bus. Subsequent read/write calls will
889 * go to this one.
890 *
891 * bus - bus index, zero based
892 *
893 * Returns: 0 on success, not 0 on failure
894 *
895 */
896 int i2c_set_bus_num(unsigned int bus);
897
898 /*
899 * i2c_get_bus_num:
900 *
901 * Returns index of currently active I2C bus. Zero-based.
902 */
903
904 unsigned int i2c_get_bus_num(void);
905
906 /*
907 * i2c_set_bus_speed:
908 *
909 * Change the speed of the active I2C bus
910 *
911 * speed - bus speed in Hz
912 *
913 * Returns: 0 on success, not 0 on failure
914 *
915 */
916 int i2c_set_bus_speed(unsigned int);
917
918 /*
919 * i2c_get_bus_speed:
920 *
921 * Returns speed of currently active I2C bus in Hz
922 */
923
924 unsigned int i2c_get_bus_speed(void);
925 #endif /* CONFIG_SYS_I2C */
926
927 /*
928 * only for backwardcompatibility, should go away if we switched
929 * completely to new multibus support.
930 */
931 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
932 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
933 # define CONFIG_SYS_MAX_I2C_BUS 2
934 # endif
935 # define I2C_MULTI_BUS 1
936 #else
937 # define CONFIG_SYS_MAX_I2C_BUS 1
938 # define I2C_MULTI_BUS 0
939 #endif
940
941 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
942 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)943 static inline unsigned int I2C_GET_BUS(void)
944 {
945 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
946 }
947
948 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)949 static inline void I2C_SET_BUS(unsigned int bus)
950 {
951 if (I2C_MULTI_BUS)
952 i2c_set_bus_num(bus);
953 }
954
955 /* Multi I2C definitions */
956 enum {
957 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
958 I2C_8, I2C_9, I2C_10,
959 };
960
961 /**
962 * Get FDT values for i2c bus.
963 *
964 * @param blob Device tree blbo
965 * @return the number of I2C bus
966 */
967 void board_i2c_init(const void *blob);
968
969 /**
970 * Find the I2C bus number by given a FDT I2C node.
971 *
972 * @param blob Device tree blbo
973 * @param node FDT I2C node to find
974 * @return the number of I2C bus (zero based), or -1 on error
975 */
976 int i2c_get_bus_num_fdt(int node);
977
978 /**
979 * Reset the I2C bus represented by the given a FDT I2C node.
980 *
981 * @param blob Device tree blbo
982 * @param node FDT I2C node to find
983 * @return 0 if port was reset, -1 if not found
984 */
985 int i2c_reset_port_fdt(const void *blob, int node);
986
987 #endif /* !CONFIG_DM_I2C */
988
989 #endif /* _I2C_H_ */
990