1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2017 Intel Corporation 4 * 5 * Partially based on southcluster.asl for other x86 platforms 6 */ 7 8Device (PCI0) 9{ 10 Name (_HID, EISAID("PNP0A08")) /* PCIe */ 11 Name (_CID, EISAID("PNP0A03")) /* PCI */ 12 13 Name (_UID, Zero) 14 Name (_BBN, Zero) 15 16 Name (MCRS, ResourceTemplate() 17 { 18 /* Bus Numbers */ 19 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, 20 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) 21 22 /* IO Region 0 */ 23 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 24 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) 25 26 /* PCI Config Space */ 27 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) 28 29 /* IO Region 1 */ 30 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 31 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) 32 33 /* GPIO Low Memory Region */ 34 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 35 Cacheable, ReadWrite, 36 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000, 37 0x00000010, , , GP00) 38 39 /* PSH Memory Region 0 */ 40 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 41 Cacheable, ReadWrite, 42 0x00000000, 0x04819000, 0x04898fff, 0x00000000, 43 0x00080000, , , PSH0) 44 45 /* PSH Memory Region 1 */ 46 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 47 Cacheable, ReadWrite, 48 0x00000000, 0x04919000, 0x04920fff, 0x00000000, 49 0x00008000, , , PSH1) 50 51 /* SST Memory Region */ 52 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 53 Cacheable, ReadWrite, 54 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000, 55 0x00200000, , , SST0) 56 57 /* PCI Memory Region */ 58 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 59 Cacheable, ReadWrite, 60 0x00000000, 0x80000000, 0xffffffff, 0x00000000, 61 0x80000000, , , PMEM) 62 }) 63 64 Method (_CRS, 0, Serialized) 65 { 66 Return (MCRS) 67 } 68 69 /* Device Resource Consumption */ 70 Device (PDRC) 71 { 72 Name (_HID, EISAID("PNP0C02")) 73 Name (_UID, One) 74 75 Name (PDRS, ResourceTemplate() 76 { 77 Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE) 78 }) 79 80 Method (_CRS, 0, Serialized) 81 { 82 Return (PDRS) 83 } 84 } 85 86 Method (_OSC, 4) 87 { 88 /* Check for proper GUID */ 89 If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) { 90 /* Let OS control everything */ 91 Return (Arg3) 92 } Else { 93 /* Unrecognized UUID */ 94 CreateDWordField(Arg3, 0, CDW1) 95 Or(CDW1, 4, CDW1) 96 Return (Arg3) 97 } 98 } 99 100 Device (SDHC) 101 { 102 Name (_ADR, 0x00010003) 103 Name (_DEP, Package (0x01) 104 { 105 GPIO 106 }) 107 Name (PSTS, Zero) 108 109 Method (_STA) 110 { 111 Return (STA_VISIBLE) 112 } 113 114 Method (_PS3, 0, NotSerialized) 115 { 116 } 117 118 Method (_PS0, 0, NotSerialized) 119 { 120 If (PSTS == Zero) 121 { 122 If (^^GPIO.AVBL == One) 123 { 124 ^^GPIO.WFD3 = One 125 PSTS = One 126 } 127 } 128 } 129 130 /* BCM43340 */ 131 Device (BRC1) 132 { 133 Name (_ADR, 0x01) 134 Name (_DEP, Package (0x01) 135 { 136 GPIO 137 }) 138 139 Method (_STA) 140 { 141 Return (STA_VISIBLE) 142 } 143 144 Method (_RMV, 0, NotSerialized) 145 { 146 Return (Zero) 147 } 148 149 Method (_PS3, 0, NotSerialized) 150 { 151 If (^^^GPIO.AVBL == One) 152 { 153 ^^^GPIO.WFD3 = Zero 154 PSTS = Zero 155 } 156 } 157 158 Method (_PS0, 0, NotSerialized) 159 { 160 If (PSTS == Zero) 161 { 162 If (^^^GPIO.AVBL == One) 163 { 164 ^^^GPIO.WFD3 = One 165 PSTS = One 166 } 167 } 168 } 169 } 170 171 Device (BRC2) 172 { 173 Name (_ADR, 0x02) 174 Method (_STA, 0, NotSerialized) 175 { 176 Return (STA_VISIBLE) 177 } 178 179 Method (_RMV, 0, NotSerialized) 180 { 181 Return (Zero) 182 } 183 } 184 } 185 186 Device (SPI5) 187 { 188 Name (_ADR, 0x00070001) 189 Name (RBUF, ResourceTemplate() 190 { 191 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 192 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 110 } 193 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 194 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 111 } 195 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 196 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } 197 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 198 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } 199 200 FixedDMA(0x000d, 0x0002, Width32bit, ) 201 FixedDMA(0x000c, 0x0003, Width32bit, ) 202 }) 203 204 Method (_CRS, 0, NotSerialized) 205 { 206 Return (RBUF) 207 } 208 209 /* 210 * See 211 * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt 212 * for more information about GPIO bindings. 213 */ 214 Name (_DSD, Package () { 215 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 216 Package () { 217 Package () { 218 "cs-gpios", Package () { 219 ^SPI5, 0, 0, 0, 220 ^SPI5, 1, 0, 0, 221 ^SPI5, 2, 0, 0, 222 ^SPI5, 3, 0, 0, 223 }, 224 }, 225 } 226 }) 227 228 Method (_STA, 0, NotSerialized) 229 { 230 Return (STA_VISIBLE) 231 } 232 } 233 234 Device (I2C1) 235 { 236 Name (_ADR, 0x00080000) 237 238 Method (_STA, 0, NotSerialized) 239 { 240 Return (STA_VISIBLE) 241 } 242 243 Name (SSCN, Package () 244 { 245 0x02F8, 0x037B, Zero, 246 }) 247 248 Name (FMCN, Package () 249 { 250 0x0087, 0x010A, Zero, 251 }) 252 253 Name (HSCN, Package () 254 { 255 0x0008, 0x0020, Zero, 256 }) 257 258 Name (RBUF, ResourceTemplate() 259 { 260 FixedDMA(0x0009, 0x0000, Width32bit, ) 261 FixedDMA(0x0008, 0x0001, Width32bit, ) 262 }) 263 264 Method (_CRS, 0, NotSerialized) 265 { 266 Return (RBUF) 267 } 268 } 269 270 Device (I2C6) 271 { 272 Name (_ADR, 0x00090001) 273 274 Method (_STA, 0, NotSerialized) 275 { 276 Return (STA_VISIBLE) 277 } 278 279 Name (SSCN, Package () 280 { 281 0x02F8, 0x037B, Zero, 282 }) 283 284 Name (FMCN, Package () 285 { 286 0x0087, 0x010A, Zero, 287 }) 288 289 Name (HSCN, Package () 290 { 291 0x0008, 0x0020, Zero, 292 }) 293 } 294 295 Device (GPIO) 296 { 297 Name (_ADR, 0x000c0000) 298 299 Method (_STA) 300 { 301 Return (STA_VISIBLE) 302 } 303 304 Name (AVBL, Zero) 305 Method (_REG, 2, NotSerialized) 306 { 307 If (Arg0 == 0x08) 308 { 309 AVBL = Arg1 310 } 311 } 312 313 OperationRegion (GPOP, GeneralPurposeIo, 0, 1) 314 Field (GPOP, ByteAcc, NoLock, Preserve) 315 { 316 Connection ( 317 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 318 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 96 } 319 ), 320 WFD3, 1, 321 } 322 } 323 324 Device (DWC3) 325 { 326 Name (_ADR, 0x00110000) 327 Name (_DEP, Package () 328 { 329 ^IPC1.PMIC 330 }) 331 332 Method (_STA, 0, NotSerialized) 333 { 334 Return (STA_VISIBLE) 335 } 336 337 Device (RHUB) 338 { 339 Name (_ADR, Zero) 340 341 Name (PCKG, Package () { 342 Buffer (0x14) {} 343 }) 344 345 /* GPLD: Generate Port Location Data (PLD) */ 346 Method (GPLD, 1, Serialized) { 347 /* REV: Revision 0x02 for ACPI 5.0 */ 348 CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) 349 Store (0x0002, REV) 350 351 /* VISI: Port visibility to user per port */ 352 CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) 353 Store (Arg0, VISI) 354 355 /* VOFF: Vertical offset is not supplied */ 356 CreateField (DerefOf (Index (PCKG, Zero)), 0x80, 0x10, VOFF) 357 Store (0xFFFF, VOFF) 358 359 /* HOFF: Horizontal offset is not supplied */ 360 CreateField (DerefOf (Index (PCKG, Zero)), 0x90, 0x10, HOFF) 361 Store (0xFFFF, HOFF) 362 363 Return (PCKG) 364 } 365 366 Device (HS01) { Name (_ADR, 1) } 367 Device (SS01) { Name (_ADR, 2) } 368 } 369 } 370 371 Device (PWM0) 372 { 373 Name (_ADR, 0x00170000) 374 375 Method (_STA, 0, NotSerialized) 376 { 377 Return (STA_VISIBLE) 378 } 379 } 380 381 Device (HSU0) 382 { 383 Name (_ADR, 0x00040001) 384 385 Method (_STA, 0, NotSerialized) 386 { 387 Return (STA_VISIBLE) 388 } 389 390 Device (BTH0) 391 { 392 Name (_HID, "BCM2E95") 393 Name (_DEP, Package () 394 { 395 GPIO, 396 HSU0 397 }) 398 399 Method (_STA, 0, NotSerialized) 400 { 401 Return (STA_VISIBLE) 402 } 403 404 Name (RBUF, ResourceTemplate() 405 { 406 UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne, 407 0xFC, LittleEndian, ParityTypeNone, FlowControlHardware, 408 0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , ) 409 GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, 410 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 } 411 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 412 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 } 413 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 414 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 } 415 }) 416 417 Method (_CRS, 0, Serialized) 418 { 419 Return (RBUF) 420 } 421 422 Name (_DSD, Package () { 423 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 424 Package () { 425 Package () { "host-wakeup-gpios", Package () { ^BTH0, 0, 0, 0 } }, 426 Package () { "device-wakeup-gpios", Package () { ^BTH0, 1, 0, 0 } }, 427 Package () { "shutdown-gpios", Package () { ^BTH0, 2, 0, 0 } }, 428 } 429 }) 430 } 431 } 432 433 Device (IPC1) 434 { 435 Name (_ADR, 0x00130000) 436 437 Method (_STA, 0, NotSerialized) 438 { 439 Return (STA_VISIBLE) 440 } 441 442 Device (PMIC) 443 { 444 Name (_HID, "INTC100E") 445 Name (_CID, "INTC100E") 446 Name (_DDN, "Basin Cove PMIC") 447 Name (_DEP, Package () 448 { 449 IPC1 450 }) 451 452 Method (_STA, 0, NotSerialized) 453 { 454 Return (STA_VISIBLE) 455 } 456 457 Name (RBUF, ResourceTemplate() 458 { 459 /* 460 * Shadow registers in SRAM for PMIC: 461 * SRAM PMIC register 462 * -------------------- 463 * 0x00- Unknown 464 * 0x03 THRMIRQ (0x04) 465 * 0x04 BCUIRQ (0x05) 466 * 0x05 ADCIRQ (0x06) 467 * 0x06 CHGRIRQ0 (0x07) 468 * 0x07 CHGRIRQ1 (0x08) 469 * 0x08- Unknown 470 * 0x0a PBSTATUS (0x27) 471 * 0x0b- Unknown 472 */ 473 Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010) 474 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 } 475 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 } 476 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 } 477 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 } 478 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 } 479 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 } 480 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 } 481 }) 482 483 Method (_CRS, 0, Serialized) 484 { 485 Return (RBUF) 486 } 487 488 OperationRegion (PMOP, 0x8D, Zero, 0x0100) 489 Field (PMOP, DWordAcc, NoLock, Preserve) 490 { 491 SEL1, 32, 492 SEL2, 32, 493 VCCL, 32, 494 VNNL, 32, 495 AONL, 32, 496 CNTC, 32, 497 CNTN, 32, 498 AONN, 32, 499 CNT1, 32, 500 CNT2, 32, 501 CNT3, 32, 502 FLEX, 32, 503 PRG1, 32, 504 PRG2, 32, 505 PRG3, 32, 506 VLDO, 32, 507 } 508 509 Name (AVBL, Zero) 510 Method (_REG, 2, NotSerialized) 511 { 512 If ((Arg0 == 0x8D)) 513 { 514 AVBL = Arg1 515 } 516 } 517 } 518 } 519 520 Device (GDMA) 521 { 522 Name (_ADR, 0x00150000) 523 Name (_UID, Zero) 524 525 Method (_STA, 0, NotSerialized) 526 { 527 Return (STA_VISIBLE) 528 } 529 530 Name (RBUF, ResourceTemplate () 531 { 532 Memory32Fixed(ReadWrite, 0xFF192000, 0x00001000) 533 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 32 } 534 }) 535 536 Method (_CRS, 0, Serialized) 537 { 538 Return (RBUF) 539 } 540 } 541} 542 543Device (FLIS) 544{ 545 Name (_HID, "INTC1002") 546 Name (_DDN, "Intel Merrifield Family-Level Interface Shim") 547 Name (RBUF, ResourceTemplate() 548 { 549 Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000) 550 PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 } 551 PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 } 552 PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 } 553 PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 } 554 PinGroup("pwm0", ResourceProducer, ) { 144 } 555 PinGroup("pwm1", ResourceProducer, ) { 145 } 556 PinGroup("pwm2", ResourceProducer, ) { 132 } 557 PinGroup("pwm3", ResourceProducer, ) { 133 } 558 }) 559 560 Method (_CRS, 0, NotSerialized) 561 { 562 Return (RBUF) 563 } 564 565 Method (_STA, 0, NotSerialized) 566 { 567 Return (STA_VISIBLE) 568 } 569} 570