1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Specialty padding for the Altera SoCFPGA preloader image
4  */
5 
6 #ifndef __BOOT0_H
7 #define __BOOT0_H
8 
9 _start:
10 	ARM_VECTORS
11 
12 #ifdef CONFIG_SPL_BUILD
13 	.balignl 64,0xf33db33f;
14 
15 	.word	0x1337c0d3;	/* SoCFPGA preloader validation word */
16 	.word	0xc01df00d;	/* Version, flags, length */
17 	.word	0xcafec0d3;	/* Checksum, zero-pad */
18 	nop;
19 
20 	b reset;		/* SoCFPGA Gen5 jumps here */
21 	b reset;		/* SoCFPGA Gen10 trampoline */
22 	nop;
23 	nop;
24 #endif
25 
26 #endif /* __BOOT0_H */
27