1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
4  */
5 
6 #ifndef _SYSTEM_MANAGER_GEN5_H_
7 #define _SYSTEM_MANAGER_GEN5_H_
8 
9 #ifndef __ASSEMBLY__
10 
11 void sysmgr_pinmux_init(void);
12 void sysmgr_config_warmrstcfgio(int enable);
13 
14 void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len);
15 
16 #define SYSMGR_GEN5_WDDBG			0x10
17 #define SYSMGR_GEN5_BOOTINFO			0x14
18 #define SYSMGR_GEN5_FPGAINFGRP_GBL		0x20
19 #define SYSMGR_GEN5_FPGAINFGRP_INDIV		0x24
20 #define SYSMGR_GEN5_FPGAINFGRP_MODULE		0x28
21 #define SYSMGR_GEN5_SCANMGRGRP_CTRL		0x30
22 #define SYSMGR_GEN5_ISWGRP_HANDOFF		0x80
23 #define SYSMGR_GEN5_ROMCODEGRP_CTRL		0xc0
24 #define SYSMGR_GEN5_WARMRAMGRP_EN		0xe0
25 #define SYSMGR_GEN5_SDMMC			0x108
26 #define SYSMGR_GEN5_ECCGRP_OCRAM		0x144
27 #define SYSMGR_GEN5_EMACIO			0x400
28 #define SYSMGR_GEN5_NAND_USEFPGA		0x6f0
29 #define SYSMGR_GEN5_RGMII1_USEFPGA		0x6f8
30 #define SYSMGR_GEN5_SDMMC_USEFPGA		0x708
31 #define SYSMGR_GEN5_RGMII0_USEFPGA		0x714
32 #define SYSMGR_GEN5_SPIM1_USEFPGA		0x730
33 #define SYSMGR_GEN5_SPIM0_USEFPGA		0x738
34 
35 #define SYSMGR_SDMMC				SYSMGR_GEN5_SDMMC
36 
37 #define SYSMGR_ISWGRP_HANDOFF_OFFSET(i)	\
38 	SYSMGR_GEN5_ISWGRP_HANDOFF + ((i) * sizeof(u32))
39 #endif
40 
41 #define SYSMGR_SDMMC_SMPLSEL_SHIFT	3
42 #define SYSMGR_BOOTINFO_BSEL_SHIFT	0
43 
44 #endif /* _SYSTEM_MANAGER_GEN5_H_ */
45