1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * Author: Ryder Lee <ryder.lee@mediatek.com> 5 */ 6 #ifndef __PINCTRL_MEDIATEK_H__ 7 #define __PINCTRL_MEDIATEK_H__ 8 9 #define MTK_PINCTRL_V0 0x0 10 #define MTK_PINCTRL_V1 0x1 11 12 #define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), } 13 #define MTK_PIN(_number, _name, _drv_n) { \ 14 .number = _number, \ 15 .name = _name, \ 16 .drv_n = _drv_n, \ 17 } 18 19 #define PINCTRL_PIN_GROUP(name, id) \ 20 { \ 21 name, \ 22 id##_pins, \ 23 ARRAY_SIZE(id##_pins), \ 24 id##_funcs, \ 25 } 26 27 #define PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \ 28 _x_bits, _sz_reg, _fixed) { \ 29 .s_pin = _s_pin, \ 30 .e_pin = _e_pin, \ 31 .s_addr = _s_addr, \ 32 .x_addrs = _x_addrs, \ 33 .s_bit = _s_bit, \ 34 .x_bits = _x_bits, \ 35 .sz_reg = _sz_reg, \ 36 .fixed = _fixed, \ 37 } 38 39 /* List these attributes which could be modified for the pin */ 40 enum { 41 PINCTRL_PIN_REG_MODE, 42 PINCTRL_PIN_REG_DIR, 43 PINCTRL_PIN_REG_DI, 44 PINCTRL_PIN_REG_DO, 45 PINCTRL_PIN_REG_SMT, 46 PINCTRL_PIN_REG_PD, 47 PINCTRL_PIN_REG_PU, 48 PINCTRL_PIN_REG_E4, 49 PINCTRL_PIN_REG_E8, 50 PINCTRL_PIN_REG_IES, 51 PINCTRL_PIN_REG_PULLEN, 52 PINCTRL_PIN_REG_PULLSEL, 53 PINCTRL_PIN_REG_DRV, 54 PINCTRL_PIN_REG_PUPD, 55 PINCTRL_PIN_REG_R0, 56 PINCTRL_PIN_REG_R1, 57 PINCTRL_PIN_REG_MAX, 58 }; 59 60 /* Group the pins by the driving current */ 61 enum { 62 DRV_FIXED, 63 DRV_GRP0, 64 DRV_GRP1, 65 DRV_GRP2, 66 DRV_GRP3, 67 DRV_GRP4, 68 }; 69 70 /** 71 * struct mtk_pin_field - the structure that holds the information of the field 72 * used to describe the attribute for the pin 73 * @offset: the register offset relative to the base address 74 * @mask: the mask used to filter out the field from the register 75 * @bitpos: the start bit relative to the register 76 * @next: the indication that the field would be extended to the 77 next register 78 */ 79 struct mtk_pin_field { 80 u32 offset; 81 u32 mask; 82 u8 bitpos; 83 u8 next; 84 }; 85 86 /** 87 * struct mtk_pin_field_calc - the structure that holds the range providing 88 * the guide used to look up the relevant field 89 * @s_pin: the start pin within the range 90 * @e_pin: the end pin within the range 91 * @s_addr: the start address for the range 92 * @x_addrs: the address distance between two consecutive registers 93 * within the range 94 * @s_bit: the start bit for the first register within the range 95 * @x_bits: the bit distance between two consecutive pins within 96 * the range 97 * @sz_reg: the size of bits in a register 98 * @fixed: the consecutive pins share the same bits with the 1st 99 * pin 100 */ 101 struct mtk_pin_field_calc { 102 u16 s_pin; 103 u16 e_pin; 104 u32 s_addr; 105 u8 x_addrs; 106 u8 s_bit; 107 u8 x_bits; 108 u8 sz_reg; 109 u8 fixed; 110 }; 111 112 /** 113 * struct mtk_pin_reg_calc - the structure that holds all ranges used to 114 * determine which register the pin would make use of 115 * for certain pin attribute. 116 * @range: the start address for the range 117 * @nranges: the number of items in the range 118 */ 119 struct mtk_pin_reg_calc { 120 const struct mtk_pin_field_calc *range; 121 unsigned int nranges; 122 }; 123 124 /** 125 * struct mtk_pin_desc - the structure that providing information 126 * for each pin of chips 127 * @number: unique pin number from the global pin number space 128 * @name: name for this pin 129 * @drv_n: the index with the driving group 130 */ 131 struct mtk_pin_desc { 132 unsigned int number; 133 const char *name; 134 u8 drv_n; 135 }; 136 137 /** 138 * struct mtk_group_desc - generic pin group descriptor 139 * @name: name of the pin group 140 * @pins: array of pins that belong to the group 141 * @num_pins: number of pins in the group 142 * @data: pin controller driver specific data 143 */ 144 struct mtk_group_desc { 145 const char *name; 146 int *pins; 147 int num_pins; 148 void *data; 149 }; 150 151 /** 152 * struct mtk_function_desc - generic function descriptor 153 * @name: name of the function 154 * @group_names: array of pin group names 155 * @num_group_names: number of pin group names 156 */ 157 struct mtk_function_desc { 158 const char *name; 159 const char * const *group_names; 160 int num_group_names; 161 }; 162 163 /* struct mtk_pin_soc - the structure that holds SoC-specific data */ 164 struct mtk_pinctrl_soc { 165 const char *name; 166 const struct mtk_pin_reg_calc *reg_cal; 167 const struct mtk_pin_desc *pins; 168 int npins; 169 const struct mtk_group_desc *grps; 170 int ngrps; 171 const struct mtk_function_desc *funcs; 172 int nfuncs; 173 int gpio_mode; 174 int rev; 175 }; 176 177 /** 178 * struct mtk_pinctrl_priv - private data for MTK pinctrl driver 179 * 180 * @base: base address of the pinctrl device 181 * @soc: SoC specific data 182 */ 183 struct mtk_pinctrl_priv { 184 void __iomem *base; 185 struct mtk_pinctrl_soc *soc; 186 }; 187 188 extern const struct pinctrl_ops mtk_pinctrl_ops; 189 190 /* A common read-modify-write helper for MediaTek chips */ 191 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set); 192 int mtk_pinctrl_common_probe(struct udevice *dev, 193 struct mtk_pinctrl_soc *soc); 194 195 #endif /* __PINCTRL_MEDIATEK_H__ */ 196