1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2013 Boundary Devices Inc. 4 */ 5 #ifndef __ASM_ARCH_MX6DLS_DDR_H__ 6 #define __ASM_ARCH_MX6DLS_DDR_H__ 7 8 #ifndef CONFIG_MX6DL 9 #ifndef CONFIG_MX6S 10 #error "wrong CPU" 11 #endif 12 #endif 13 14 #define MX6_IOM_DRAM_DQM0 0x020e0470 15 #define MX6_IOM_DRAM_DQM1 0x020e0474 16 #define MX6_IOM_DRAM_DQM2 0x020e0478 17 #define MX6_IOM_DRAM_DQM3 0x020e047c 18 #define MX6_IOM_DRAM_DQM4 0x020e0480 19 #define MX6_IOM_DRAM_DQM5 0x020e0484 20 #define MX6_IOM_DRAM_DQM6 0x020e0488 21 #define MX6_IOM_DRAM_DQM7 0x020e048c 22 23 #define MX6_IOM_DRAM_CAS 0x020e0464 24 #define MX6_IOM_DRAM_RAS 0x020e0490 25 #define MX6_IOM_DRAM_RESET 0x020e0494 26 #define MX6_IOM_DRAM_SDCLK_0 0x020e04ac 27 #define MX6_IOM_DRAM_SDCLK_1 0x020e04b0 28 #define MX6_IOM_DRAM_SDBA2 0x020e04a0 29 #define MX6_IOM_DRAM_SDCKE0 0x020e04a4 30 #define MX6_IOM_DRAM_SDCKE1 0x020e04a8 31 #define MX6_IOM_DRAM_SDODT0 0x020e04b4 32 #define MX6_IOM_DRAM_SDODT1 0x020e04b8 33 34 #define MX6_IOM_DRAM_SDQS0 0x020e04bc 35 #define MX6_IOM_DRAM_SDQS1 0x020e04c0 36 #define MX6_IOM_DRAM_SDQS2 0x020e04c4 37 #define MX6_IOM_DRAM_SDQS3 0x020e04c8 38 #define MX6_IOM_DRAM_SDQS4 0x020e04cc 39 #define MX6_IOM_DRAM_SDQS5 0x020e04d0 40 #define MX6_IOM_DRAM_SDQS6 0x020e04d4 41 #define MX6_IOM_DRAM_SDQS7 0x020e04d8 42 43 #define MX6_IOM_GRP_B0DS 0x020e0764 44 #define MX6_IOM_GRP_B1DS 0x020e0770 45 #define MX6_IOM_GRP_B2DS 0x020e0778 46 #define MX6_IOM_GRP_B3DS 0x020e077c 47 #define MX6_IOM_GRP_B4DS 0x020e0780 48 #define MX6_IOM_GRP_B5DS 0x020e0784 49 #define MX6_IOM_GRP_B6DS 0x020e078c 50 #define MX6_IOM_GRP_B7DS 0x020e0748 51 #define MX6_IOM_GRP_ADDDS 0x020e074c 52 #define MX6_IOM_DDRMODE_CTL 0x020e0750 53 #define MX6_IOM_GRP_DDRPKE 0x020e0754 54 #define MX6_IOM_GRP_DDRMODE 0x020e0760 55 #define MX6_IOM_GRP_CTLDS 0x020e076c 56 #define MX6_IOM_GRP_DDR_TYPE 0x020e0774 57 58 #endif /*__ASM_ARCH_MX6S_DDR_H__ */ 59