1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 * Based on da850evm.c. Original Copyrights follow:
6 *
7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 */
10
11 #include <common.h>
12 #include <env.h>
13 #include <i2c.h>
14 #include <init.h>
15 #include <net.h>
16 #include <asm/arch/hardware.h>
17 #include <asm/global_data.h>
18 #include <asm/ti-common/davinci_nand.h>
19 #include <asm/io.h>
20 #include <ns16550.h>
21 #include <dm/platdata.h>
22 #include <linux/errno.h>
23 #include <asm/mach-types.h>
24 #include <asm/arch/davinci_misc.h>
25 #ifdef CONFIG_MMC_DAVINCI
26 #include <mmc.h>
27 #include <asm/arch/sdmmc_defs.h>
28 #endif
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
33
34 #ifdef CONFIG_MMC_DAVINCI
35 /* MMC0 pin muxer settings */
36 const struct pinmux_config mmc0_pins[] = {
37 /* GP0[11] is required for SD to work on Rev 3 EVMs */
38 { pinmux(0), 8, 4 }, /* GP0[11] */
39 { pinmux(10), 2, 0 }, /* MMCSD0_CLK */
40 { pinmux(10), 2, 1 }, /* MMCSD0_CMD */
41 { pinmux(10), 2, 2 }, /* MMCSD0_DAT_0 */
42 { pinmux(10), 2, 3 }, /* MMCSD0_DAT_1 */
43 { pinmux(10), 2, 4 }, /* MMCSD0_DAT_2 */
44 { pinmux(10), 2, 5 }, /* MMCSD0_DAT_3 */
45 /* LCDK supports only 4-bit mode, remaining pins are not configured */
46 };
47 #endif
48
49 /* UART pin muxer settings */
50 static const struct pinmux_config uart_pins[] = {
51 { pinmux(0), 4, 6 },
52 { pinmux(0), 4, 7 },
53 { pinmux(4), 2, 4 },
54 { pinmux(4), 2, 5 }
55 };
56
57 #ifdef CONFIG_DRIVER_TI_EMAC
58 static const struct pinmux_config emac_pins[] = {
59 { pinmux(2), 8, 1 },
60 { pinmux(2), 8, 2 },
61 { pinmux(2), 8, 3 },
62 { pinmux(2), 8, 4 },
63 { pinmux(2), 8, 5 },
64 { pinmux(2), 8, 6 },
65 { pinmux(2), 8, 7 },
66 { pinmux(3), 8, 0 },
67 { pinmux(3), 8, 1 },
68 { pinmux(3), 8, 2 },
69 { pinmux(3), 8, 3 },
70 { pinmux(3), 8, 4 },
71 { pinmux(3), 8, 5 },
72 { pinmux(3), 8, 6 },
73 { pinmux(3), 8, 7 },
74 { pinmux(4), 8, 0 },
75 { pinmux(4), 8, 1 }
76 };
77 #endif /* CONFIG_DRIVER_TI_EMAC */
78
79 /* I2C pin muxer settings */
80 static const struct pinmux_config i2c_pins[] = {
81 { pinmux(4), 2, 2 },
82 { pinmux(4), 2, 3 }
83 };
84
85 #ifdef CONFIG_NAND_DAVINCI
86 const struct pinmux_config nand_pins[] = {
87 { pinmux(7), 1, 1 },
88 { pinmux(7), 1, 2 },
89 { pinmux(7), 1, 4 },
90 { pinmux(7), 1, 5 },
91 { pinmux(8), 1, 0 },
92 { pinmux(8), 1, 1 },
93 { pinmux(8), 1, 2 },
94 { pinmux(8), 1, 3 },
95 { pinmux(8), 1, 4 },
96 { pinmux(8), 1, 5 },
97 { pinmux(8), 1, 6 },
98 { pinmux(8), 1, 7 },
99 { pinmux(9), 1, 0 },
100 { pinmux(9), 1, 1 },
101 { pinmux(9), 1, 2 },
102 { pinmux(9), 1, 3 },
103 { pinmux(9), 1, 4 },
104 { pinmux(9), 1, 5 },
105 { pinmux(9), 1, 6 },
106 { pinmux(9), 1, 7 },
107 { pinmux(12), 1, 5 },
108 { pinmux(12), 1, 6 }
109 };
110
111 #endif
112
113 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
114 #define HAS_RMII 1
115 #else
116 #define HAS_RMII 0
117 #endif
118
119 const struct pinmux_resource pinmuxes[] = {
120 PINMUX_ITEM(uart_pins),
121 PINMUX_ITEM(i2c_pins),
122 #ifdef CONFIG_NAND_DAVINCI
123 PINMUX_ITEM(nand_pins),
124 #endif
125 };
126
127 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
128
129 const struct lpsc_resource lpsc[] = {
130 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
131 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
132 { DAVINCI_LPSC_EMAC }, /* image download */
133 { DAVINCI_LPSC_UART2 }, /* console */
134 { DAVINCI_LPSC_GPIO },
135 #ifdef CONFIG_MMC_DAVINCI
136 { DAVINCI_LPSC_MMC_SD },
137 #endif
138 };
139
140 const int lpsc_size = ARRAY_SIZE(lpsc);
141
142 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
143 #define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
144 #endif
145
146 /*
147 * get_board_rev() - setup to pass kernel board revision information
148 * Returns:
149 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
150 * 0000b - 300 MHz
151 * 0001b - 372 MHz
152 * 0010b - 408 MHz
153 * 0011b - 456 MHz
154 */
get_board_rev(void)155 u32 get_board_rev(void)
156 {
157 return 0;
158 }
159
board_early_init_f(void)160 int board_early_init_f(void)
161 {
162 /*
163 * Power on required peripherals
164 * ARM does not have access by default to PSC0 and PSC1
165 * assuming here that the DSP bootloader has set the IOPU
166 * such that PSC access is available to ARM
167 */
168 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
169 return 1;
170
171 return 0;
172 }
173
board_init(void)174 int board_init(void)
175 {
176 irq_init();
177
178 /* arch number of the board */
179 gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;
180
181 /* address of boot parameters */
182 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
183
184
185 /* setup the SUSPSRC for ARM to control emulation suspend */
186 writel(readl(&davinci_syscfg_regs->suspsrc) &
187 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
188 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
189 DAVINCI_SYSCFG_SUSPSRC_UART2),
190 &davinci_syscfg_regs->suspsrc);
191
192 /* configure pinmux settings */
193 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
194 return 1;
195
196 #ifdef CONFIG_NAND_DAVINCI
197 /*
198 * NAND CS setup - cycle counts based on da850evm NAND timings in the
199 * Linux kernel @ 25MHz EMIFA
200 */
201 writel((DAVINCI_ABCR_WSETUP(15) |
202 DAVINCI_ABCR_WSTROBE(63) |
203 DAVINCI_ABCR_WHOLD(7) |
204 DAVINCI_ABCR_RSETUP(15) |
205 DAVINCI_ABCR_RSTROBE(63) |
206 DAVINCI_ABCR_RHOLD(7) |
207 DAVINCI_ABCR_TA(3) |
208 DAVINCI_ABCR_ASIZE_16BIT),
209 &davinci_emif_regs->ab2cr); /* CS3 */
210 #endif
211
212
213 #ifdef CONFIG_MMC_DAVINCI
214 if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
215 return 1;
216 #endif
217
218 #ifdef CONFIG_DRIVER_TI_EMAC
219 if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
220 return 1;
221 davinci_emac_mii_mode_sel(HAS_RMII);
222 #endif /* CONFIG_DRIVER_TI_EMAC */
223
224 /* enable the console UART */
225 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
226 DAVINCI_UART_PWREMU_MGMT_UTRST),
227 &davinci_uart2_ctrl_regs->pwremu_mgmt);
228
229 return 0;
230 }
231
232 #define CFG_MAC_ADDR_SPI_BUS 0
233 #define CFG_MAC_ADDR_SPI_CS 0
234 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
235 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
236
237 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
238
get_mac_addr(u8 * addr)239 static int get_mac_addr(u8 *addr)
240 {
241 /* Need to find a way to get MAC ADDRESS */
242 return 0;
243 }
244
dsp_lpsc_on(unsigned domain,unsigned int id)245 void dsp_lpsc_on(unsigned domain, unsigned int id)
246 {
247 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
248 struct davinci_psc_regs *psc_regs;
249
250 psc_regs = davinci_psc0_regs;
251 mdstat = &psc_regs->psc0.mdstat[id];
252 mdctl = &psc_regs->psc0.mdctl[id];
253 ptstat = &psc_regs->ptstat;
254 ptcmd = &psc_regs->ptcmd;
255
256 while (*ptstat & (0x1 << domain))
257 ;
258
259 if ((*mdstat & 0x1f) == 0x03)
260 return; /* Already on and enabled */
261
262 *mdctl |= 0x03;
263
264 *ptcmd = 0x1 << domain;
265
266 while (*ptstat & (0x1 << domain))
267 ;
268 while ((*mdstat & 0x1f) != 0x03)
269 ; /* Probably an overkill... */
270 }
271
dspwake(void)272 static void dspwake(void)
273 {
274 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
275
276 /* if the device is ARM only, return */
277 if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
278 return;
279
280 if (!strcmp(env_get("dspwake"), "no"))
281 return;
282
283 *resetvect++ = 0x1E000; /* DSP Idle */
284 /* clear out the next 10 words as NOP */
285 memset(resetvect, 0, sizeof(unsigned) * 10);
286
287 /* setup the DSP reset vector */
288 REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;
289
290 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
291 REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
292 }
293
294 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
295 /**
296 * rmii_hw_init
297 *
298 */
rmii_hw_init(void)299 int rmii_hw_init(void)
300 {
301 return 0;
302 }
303 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
304
misc_init_r(void)305 int misc_init_r(void)
306 {
307 uint8_t tmp[20], addr[10];
308
309
310 if (env_get("ethaddr") == NULL) {
311 /* Read Ethernet MAC address from EEPROM */
312 if (dvevm_read_mac_address(addr)) {
313 /* Set Ethernet MAC address from EEPROM */
314 davinci_sync_env_enetaddr(addr);
315 } else {
316 get_mac_addr(addr);
317 }
318
319 if (!is_multicast_ethaddr(addr) && !is_zero_ethaddr(addr)) {
320 sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x",
321 addr[0], addr[1], addr[2], addr[3], addr[4],
322 addr[5]);
323
324 env_set("ethaddr", (char *)tmp);
325 } else {
326 printf("Invalid MAC address read.\n");
327 }
328 }
329
330 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
331 /* Select RMII fucntion through the expander */
332 if (rmii_hw_init())
333 printf("RMII hardware init failed!!!\n");
334 #endif
335
336 dspwake();
337
338 return 0;
339 }
340
341 #if !CONFIG_IS_ENABLED(DM_MMC)
342 #ifdef CONFIG_MMC_DAVINCI
343 static struct davinci_mmc mmc_sd0 = {
344 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
345 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
346 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
347 };
348
board_mmc_init(struct bd_info * bis)349 int board_mmc_init(struct bd_info *bis)
350 {
351 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
352
353 /* Add slot-0 to mmc subsystem */
354 return davinci_mmc_init(bis, &mmc_sd0);
355 }
356 #endif
357 #endif
358
359 #ifdef CONFIG_SPL_BUILD
360 static const struct ns16550_plat serial_pdata = {
361 .base = DAVINCI_UART2_BASE,
362 .reg_shift = 2,
363 .clock = 228000000,
364 .fcr = UART_FCR_DEFVAL,
365 };
366
367 U_BOOT_DRVINFO(omapl138_uart) = {
368 .name = "ns16550_serial",
369 .plat = &serial_pdata,
370 };
371
372 static const struct davinci_mmc_plat mmc_plat = {
373 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
374 .cfg = {
375 .f_min = 200000,
376 .f_max = 25000000,
377 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
378 .host_caps = MMC_MODE_4BIT,
379 .b_max = DAVINCI_MAX_BLOCKS,
380 .name = "da830-mmc",
381 },
382 };
383 U_BOOT_DRVINFO(omapl138_mmc) = {
384 .name = "ti_da830_mmc",
385 .plat = &mmc_plat,
386 };
387
spl_board_init(void)388 void spl_board_init(void)
389 {
390 davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins));
391 }
392 #endif
393