1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com 4 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 5 */ 6 7 #include <linux/kernel.h> 8 9 #include "k3-psil-priv.h" 10 11 #define PSIL_PDMA_XY_TR(x) \ 12 { \ 13 .thread_id = x, \ 14 .ep_config = { \ 15 .ep_type = PSIL_EP_PDMA_XY, \ 16 .mapped_channel_id = -1, \ 17 }, \ 18 } 19 20 #define PSIL_PDMA_XY_PKT(x) \ 21 { \ 22 .thread_id = x, \ 23 .ep_config = { \ 24 .ep_type = PSIL_EP_PDMA_XY, \ 25 .mapped_channel_id = -1, \ 26 .pkt_mode = 1, \ 27 }, \ 28 } 29 30 #define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \ 31 { \ 32 .thread_id = x, \ 33 .ep_config = { \ 34 .ep_type = PSIL_EP_NATIVE, \ 35 .pkt_mode = 1, \ 36 .needs_epib = 1, \ 37 .psd_size = 16, \ 38 .mapped_channel_id = ch, \ 39 .flow_start = flow_base, \ 40 .flow_num = flow_cnt, \ 41 .default_flow_id = flow_base, \ 42 }, \ 43 } 44 45 #define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx) \ 46 { \ 47 .thread_id = x, \ 48 .ep_config = { \ 49 .ep_type = PSIL_EP_NATIVE, \ 50 .pkt_mode = 1, \ 51 .needs_epib = 1, \ 52 .psd_size = 64, \ 53 .mapped_channel_id = ch, \ 54 .flow_start = flow_base, \ 55 .flow_num = flow_cnt, \ 56 .default_flow_id = default_flow, \ 57 .notdpkt = tx, \ 58 }, \ 59 } 60 61 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ 62 static struct psil_ep am64_src_ep_map[] = { 63 /* SAUL */ 64 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0), 65 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0), 66 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0), 67 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0), 68 /* ICSS_G0 */ 69 PSIL_ETHERNET(0x4100, 21, 48, 16), 70 PSIL_ETHERNET(0x4101, 22, 64, 16), 71 PSIL_ETHERNET(0x4102, 23, 80, 16), 72 PSIL_ETHERNET(0x4103, 24, 96, 16), 73 /* ICSS_G1 */ 74 PSIL_ETHERNET(0x4200, 25, 112, 16), 75 PSIL_ETHERNET(0x4201, 26, 128, 16), 76 PSIL_ETHERNET(0x4202, 27, 144, 16), 77 PSIL_ETHERNET(0x4203, 28, 160, 16), 78 /* PDMA_MAIN0 - SPI0-3 */ 79 PSIL_PDMA_XY_PKT(0x4300), 80 PSIL_PDMA_XY_PKT(0x4301), 81 PSIL_PDMA_XY_PKT(0x4302), 82 PSIL_PDMA_XY_PKT(0x4303), 83 PSIL_PDMA_XY_PKT(0x4304), 84 PSIL_PDMA_XY_PKT(0x4305), 85 PSIL_PDMA_XY_PKT(0x4306), 86 PSIL_PDMA_XY_PKT(0x4307), 87 PSIL_PDMA_XY_PKT(0x4308), 88 PSIL_PDMA_XY_PKT(0x4309), 89 PSIL_PDMA_XY_PKT(0x430a), 90 PSIL_PDMA_XY_PKT(0x430b), 91 PSIL_PDMA_XY_PKT(0x430c), 92 PSIL_PDMA_XY_PKT(0x430d), 93 PSIL_PDMA_XY_PKT(0x430e), 94 PSIL_PDMA_XY_PKT(0x430f), 95 /* PDMA_MAIN0 - USART0-1 */ 96 PSIL_PDMA_XY_PKT(0x4310), 97 PSIL_PDMA_XY_PKT(0x4311), 98 /* PDMA_MAIN1 - SPI4 */ 99 PSIL_PDMA_XY_PKT(0x4400), 100 PSIL_PDMA_XY_PKT(0x4401), 101 PSIL_PDMA_XY_PKT(0x4402), 102 PSIL_PDMA_XY_PKT(0x4403), 103 /* PDMA_MAIN1 - USART2-6 */ 104 PSIL_PDMA_XY_PKT(0x4404), 105 PSIL_PDMA_XY_PKT(0x4405), 106 PSIL_PDMA_XY_PKT(0x4406), 107 PSIL_PDMA_XY_PKT(0x4407), 108 PSIL_PDMA_XY_PKT(0x4408), 109 /* PDMA_MAIN1 - ADCs */ 110 PSIL_PDMA_XY_TR(0x440f), 111 PSIL_PDMA_XY_TR(0x4410), 112 /* CPSW2 */ 113 PSIL_ETHERNET(0x4500, 16, 16, 16), 114 }; 115 116 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ 117 static struct psil_ep am64_dst_ep_map[] = { 118 /* SAUL */ 119 PSIL_SAUL(0xc000, 24, 80, 8, 80, 1), 120 PSIL_SAUL(0xc001, 25, 88, 8, 88, 1), 121 /* ICSS_G0 */ 122 PSIL_ETHERNET(0xc100, 26, 96, 1), 123 PSIL_ETHERNET(0xc101, 27, 97, 1), 124 PSIL_ETHERNET(0xc102, 28, 98, 1), 125 PSIL_ETHERNET(0xc103, 29, 99, 1), 126 PSIL_ETHERNET(0xc104, 30, 100, 1), 127 PSIL_ETHERNET(0xc105, 31, 101, 1), 128 PSIL_ETHERNET(0xc106, 32, 102, 1), 129 PSIL_ETHERNET(0xc107, 33, 103, 1), 130 /* ICSS_G1 */ 131 PSIL_ETHERNET(0xc200, 34, 104, 1), 132 PSIL_ETHERNET(0xc201, 35, 105, 1), 133 PSIL_ETHERNET(0xc202, 36, 106, 1), 134 PSIL_ETHERNET(0xc203, 37, 107, 1), 135 PSIL_ETHERNET(0xc204, 38, 108, 1), 136 PSIL_ETHERNET(0xc205, 39, 109, 1), 137 PSIL_ETHERNET(0xc206, 40, 110, 1), 138 PSIL_ETHERNET(0xc207, 41, 111, 1), 139 /* CPSW2 */ 140 PSIL_ETHERNET(0xc500, 16, 16, 8), 141 PSIL_ETHERNET(0xc501, 17, 24, 8), 142 PSIL_ETHERNET(0xc502, 18, 32, 8), 143 PSIL_ETHERNET(0xc503, 19, 40, 8), 144 PSIL_ETHERNET(0xc504, 20, 48, 8), 145 PSIL_ETHERNET(0xc505, 21, 56, 8), 146 PSIL_ETHERNET(0xc506, 22, 64, 8), 147 PSIL_ETHERNET(0xc507, 23, 72, 8), 148 }; 149 150 struct psil_ep_map am64_ep_map = { 151 .name = "am64", 152 .src = am64_src_ep_map, 153 .src_count = ARRAY_SIZE(am64_src_ep_map), 154 .dst = am64_dst_ep_map, 155 .dst_count = ARRAY_SIZE(am64_dst_ep_map), 156 }; 157