1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (c) 2014 The Chromium OS Authors.
4 *
5 * Part of this file is adapted from coreboot
6 * src/arch/x86/include/arch/cpu.h and
7 * src/arch/x86/lib/cpu.c
8 */
9
10 #ifndef _ASM_CPU_H
11 #define _ASM_CPU_H
12
13 enum {
14 X86_VENDOR_INVALID = 0,
15 X86_VENDOR_INTEL,
16 X86_VENDOR_CYRIX,
17 X86_VENDOR_AMD,
18 X86_VENDOR_UMC,
19 X86_VENDOR_NEXGEN,
20 X86_VENDOR_CENTAUR,
21 X86_VENDOR_RISE,
22 X86_VENDOR_TRANSMETA,
23 X86_VENDOR_NSC,
24 X86_VENDOR_SIS,
25 X86_VENDOR_ANY = 0xfe,
26 X86_VENDOR_UNKNOWN = 0xff
27 };
28
29 /* Global descriptor table (GDT) bits */
30 enum {
31 GDT_4KB = 1ULL << 55,
32 GDT_32BIT = 1ULL << 54,
33 GDT_LONG = 1ULL << 53,
34 GDT_PRESENT = 1ULL << 47,
35 GDT_NOTSYS = 1ULL << 44,
36 GDT_CODE = 1ULL << 43,
37 GDT_LIMIT_LOW_SHIFT = 0,
38 GDT_LIMIT_LOW_MASK = 0xffff,
39 GDT_LIMIT_HIGH_SHIFT = 48,
40 GDT_LIMIT_HIGH_MASK = 0xf,
41 GDT_BASE_LOW_SHIFT = 16,
42 GDT_BASE_LOW_MASK = 0xffff,
43 GDT_BASE_HIGH_SHIFT = 56,
44 GDT_BASE_HIGH_MASK = 0xf,
45 };
46
47 /*
48 * System controllers in an x86 system. We mostly need to just find these and
49 * use them on PCI. At some point these might have their own uclass (e.g.
50 * UCLASS_VIDEO for the GMA device).
51 */
52 enum {
53 X86_NONE,
54 X86_SYSCON_ME, /* Intel Management Engine */
55 X86_SYSCON_PINCONF, /* Intel x86 pin configuration */
56 X86_SYSCON_PMU, /* Power Management Unit */
57 X86_SYSCON_SCU, /* System Controller Unit */
58 X86_SYSCON_PUNIT, /* Power unit */
59 };
60
61 struct cpuid_result {
62 uint32_t eax;
63 uint32_t ebx;
64 uint32_t ecx;
65 uint32_t edx;
66 };
67
68 /*
69 * Generic CPUID function
70 */
cpuid(int op)71 static inline struct cpuid_result cpuid(int op)
72 {
73 struct cpuid_result result;
74 asm volatile(
75 "mov %%ebx, %%edi;"
76 "cpuid;"
77 "mov %%ebx, %%esi;"
78 "mov %%edi, %%ebx;"
79 : "=a" (result.eax),
80 "=S" (result.ebx),
81 "=c" (result.ecx),
82 "=d" (result.edx)
83 : "0" (op)
84 : "edi");
85 return result;
86 }
87
88 /*
89 * Generic Extended CPUID function
90 */
cpuid_ext(int op,unsigned ecx)91 static inline struct cpuid_result cpuid_ext(int op, unsigned ecx)
92 {
93 struct cpuid_result result;
94 asm volatile(
95 "mov %%ebx, %%edi;"
96 "cpuid;"
97 "mov %%ebx, %%esi;"
98 "mov %%edi, %%ebx;"
99 : "=a" (result.eax),
100 "=S" (result.ebx),
101 "=c" (result.ecx),
102 "=d" (result.edx)
103 : "0" (op), "2" (ecx)
104 : "edi");
105 return result;
106 }
107
108 /*
109 * CPUID functions returning a single datum
110 */
cpuid_eax(unsigned int op)111 static inline unsigned int cpuid_eax(unsigned int op)
112 {
113 unsigned int eax;
114
115 __asm__("mov %%ebx, %%edi;"
116 "cpuid;"
117 "mov %%edi, %%ebx;"
118 : "=a" (eax)
119 : "0" (op)
120 : "ecx", "edx", "edi");
121 return eax;
122 }
123
cpuid_ebx(unsigned int op)124 static inline unsigned int cpuid_ebx(unsigned int op)
125 {
126 unsigned int eax, ebx;
127
128 __asm__("mov %%ebx, %%edi;"
129 "cpuid;"
130 "mov %%ebx, %%esi;"
131 "mov %%edi, %%ebx;"
132 : "=a" (eax), "=S" (ebx)
133 : "0" (op)
134 : "ecx", "edx", "edi");
135 return ebx;
136 }
137
cpuid_ecx(unsigned int op)138 static inline unsigned int cpuid_ecx(unsigned int op)
139 {
140 unsigned int eax, ecx;
141
142 __asm__("mov %%ebx, %%edi;"
143 "cpuid;"
144 "mov %%edi, %%ebx;"
145 : "=a" (eax), "=c" (ecx)
146 : "0" (op)
147 : "edx", "edi");
148 return ecx;
149 }
150
cpuid_edx(unsigned int op)151 static inline unsigned int cpuid_edx(unsigned int op)
152 {
153 unsigned int eax, edx;
154
155 __asm__("mov %%ebx, %%edi;"
156 "cpuid;"
157 "mov %%edi, %%ebx;"
158 : "=a" (eax), "=d" (edx)
159 : "0" (op)
160 : "ecx", "edi");
161 return edx;
162 }
163
164 #if !CONFIG_IS_ENABLED(X86_64)
165
166 /* Standard macro to see if a specific flag is changeable */
flag_is_changeable_p(uint32_t flag)167 static inline int flag_is_changeable_p(uint32_t flag)
168 {
169 uint32_t f1, f2;
170
171 asm(
172 "pushfl\n\t"
173 "pushfl\n\t"
174 "popl %0\n\t"
175 "movl %0,%1\n\t"
176 "xorl %2,%0\n\t"
177 "pushl %0\n\t"
178 "popfl\n\t"
179 "pushfl\n\t"
180 "popl %0\n\t"
181 "popfl\n\t"
182 : "=&r" (f1), "=&r" (f2)
183 : "ir" (flag));
184 return ((f1^f2) & flag) != 0;
185 }
186 #endif
187
mfence(void)188 static inline void mfence(void)
189 {
190 __asm__ __volatile__("mfence" : : : "memory");
191 }
192
193 /**
194 * cpu_enable_paging_pae() - Enable PAE-paging
195 *
196 * @cr3: Value to set in cr3 (PDPT or PML4T)
197 */
198 void cpu_enable_paging_pae(ulong cr3);
199
200 /**
201 * cpu_disable_paging_pae() - Disable paging and PAE
202 */
203 void cpu_disable_paging_pae(void);
204
205 /**
206 * cpu_has_64bit() - Check if the CPU has 64-bit support
207 *
208 * @return 1 if this CPU supports long mode (64-bit), 0 if not
209 */
210 int cpu_has_64bit(void);
211
212 /**
213 * cpu_vendor_name() - Get CPU vendor name
214 *
215 * @vendor: CPU vendor enumeration number
216 *
217 * @return: Address to hold the CPU vendor name string
218 */
219 const char *cpu_vendor_name(int vendor);
220
221 #define CPU_MAX_NAME_LEN 49
222
223 /**
224 * cpu_get_name() - Get the name of the current cpu
225 *
226 * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including
227 * @return pointer to name, which will likely be a few bytes after the start
228 * of @name
229 * \0 terminator
230 */
231 char *cpu_get_name(char *name);
232
233 /**
234 * cpu_call64() - Jump to a 64-bit Linux kernel (internal function)
235 *
236 * The kernel is uncompressed and the 64-bit entry point is expected to be
237 * at @target.
238 *
239 * This function is used internally - see cpu_jump_to_64bit() for a more
240 * useful function.
241 *
242 * @pgtable: Address of 24KB area containing the page table
243 * @setup_base: Pointer to the setup.bin information for the kernel
244 * @target: Pointer to the start of the kernel image
245 */
246 void cpu_call64(ulong pgtable, ulong setup_base, ulong target);
247
248 /**
249 * cpu_call32() - Jump to a 32-bit entry point
250 *
251 * @code_seg32: 32-bit code segment to use (GDT offset, e.g. 0x20)
252 * @target: Pointer to the start of the 32-bit U-Boot image/entry point
253 * @table: Pointer to start of info table to pass to U-Boot
254 */
255 void cpu_call32(ulong code_seg32, ulong target, ulong table);
256
257 /**
258 * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel
259 *
260 * The kernel is uncompressed and the 64-bit entry point is expected to be
261 * at @target.
262 *
263 * @setup_base: Pointer to the setup.bin information for the kernel
264 * @target: Pointer to the start of the kernel image
265 */
266 int cpu_jump_to_64bit(ulong setup_base, ulong target);
267
268 /**
269 * cpu_jump_to_64bit_uboot() - special function to jump from SPL to U-Boot
270 *
271 * This handles calling from 32-bit SPL to 64-bit U-Boot.
272 *
273 * @target: Address of U-Boot in RAM
274 */
275 int cpu_jump_to_64bit_uboot(ulong target);
276
277 /**
278 * cpu_get_family_model() - Get the family and model for the CPU
279 *
280 * @return the CPU ID masked with 0x0fff0ff0
281 */
282 u32 cpu_get_family_model(void);
283
284 /**
285 * cpu_get_stepping() - Get the stepping value for the CPU
286 *
287 * @return the CPU ID masked with 0xf
288 */
289 u32 cpu_get_stepping(void);
290
291 /**
292 * cpu_phys_address_size() - Get the physical address size in bits
293 *
294 * This is 32 for older CPUs but newer ones may support 36.
295 *
296 * @return address size (typically 32 or 36)
297 */
298 int cpu_phys_address_size(void);
299
300 #endif
301