1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Cortina CS4315/CS4340 10G PHY drivers
4 *
5 * Copyright 2014 Freescale Semiconductor, Inc.
6 * Copyright 2018 NXP
7 *
8 */
9
10 #include <config.h>
11 #include <common.h>
12 #include <log.h>
13 #include <malloc.h>
14 #include <linux/ctype.h>
15 #include <linux/delay.h>
16 #include <linux/string.h>
17 #include <linux/err.h>
18 #include <phy.h>
19
20 #define PHY_ID_RTL8211_EXT 0x001cc910
21 #define PHY_ID_RTL8211_INT 0x001cc980
22 #define PHY_ID_MASK 0xFFFFFFF0
23
__internal_phy_init(struct phy_device * phydev,int reset_phy)24 static void __internal_phy_init(struct phy_device *phydev, int reset_phy)
25 {
26 u8 phy_addr;
27 u16 data;
28
29 /* should initialize 4 GPHYs at once */
30 for (phy_addr = 4; phy_addr > 0; phy_addr--) {
31 phydev->addr = phy_addr;
32 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0BC6);
33 phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x0053);
34 phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x4003);
35 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x7e01);
36 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0A42);
37 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0A40);
38 phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x1140);
39 }
40
41 /* workaround to fix GPHY fail */
42 for (phy_addr = 1; phy_addr < 5; phy_addr++) {
43 /* Clear clock fail interrupt */
44 phydev->addr = phy_addr;
45 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0xB90);
46 data = phy_read(phydev, MDIO_DEVAD_NONE, 19);
47 if (data == 0x10) {
48 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0xB90);
49 data = phy_read(phydev, MDIO_DEVAD_NONE, 19);
50 printf("%s: read again.\n", __func__);
51 }
52
53 printf("%s: phy_addr=%d, read register 19, value=0x%x\n",
54 __func__, phy_addr, data);
55 }
56 }
57
__external_phy_init(struct phy_device * phydev,int reset_phy)58 static void __external_phy_init(struct phy_device *phydev, int reset_phy)
59 {
60 u16 val;
61
62 /* Disable response PHYAD=0 function of RTL8211 series PHY */
63 /* REG31 write 0x0007, set to extension page */
64 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0007);
65
66 /* REG30 write 0x002C, set to extension page 44 */
67 phy_write(phydev, MDIO_DEVAD_NONE, 30, 0x002C);
68
69 /*
70 * REG27 write bit[2] = 0 disable response PHYAD = 0 function.
71 * we should read REG27 and clear bit[2], and write back
72 */
73 val = phy_read(phydev, MDIO_DEVAD_NONE, 27);
74 val &= ~(1 << 2);
75 phy_write(phydev, MDIO_DEVAD_NONE, 27, val);
76
77 /* REG31 write 0X0000, back to page0 */
78 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000);
79 }
80
rtl8211_external_config(struct phy_device * phydev)81 static int rtl8211_external_config(struct phy_device *phydev)
82 {
83 __external_phy_init(phydev, 0);
84 printf("%s: initialize RTL8211 external done.\n", __func__);
85 return 0;
86 }
87
rtl8211_internal_config(struct phy_device * phydev)88 static int rtl8211_internal_config(struct phy_device *phydev)
89 {
90 struct phy_device phydev_init;
91
92 memcpy(&phydev_init, phydev, sizeof(struct phy_device));
93 /* should initialize 4 GPHYs at once */
94 __internal_phy_init(&phydev_init, 0);
95 printf("%s: initialize RTL8211 internal done.\n", __func__);
96 return 0;
97 }
98
rtl8211_probe(struct phy_device * phydev)99 static int rtl8211_probe(struct phy_device *phydev)
100 {
101 /* disable reset behavior */
102 phydev->flags = PHY_FLAG_BROKEN_RESET;
103 return 0;
104 }
105
106 /* Support for RTL8211 External PHY */
107 struct phy_driver rtl8211_external_driver = {
108 .name = "Cortina RTL8211 External",
109 .uid = PHY_ID_RTL8211_EXT,
110 .mask = PHY_ID_MASK,
111 .features = PHY_GBIT_FEATURES,
112 .config = &rtl8211_external_config,
113 .probe = &rtl8211_probe,
114 .startup = &genphy_startup,
115 };
116
117 /* Support for RTL8211 Internal PHY */
118 struct phy_driver rtl8211_internal_driver = {
119 .name = "Cortina RTL8211 Inrernal",
120 .uid = PHY_ID_RTL8211_INT,
121 .mask = PHY_ID_MASK,
122 .features = PHY_GBIT_FEATURES,
123 .config = &rtl8211_internal_config,
124 .probe = &rtl8211_probe,
125 .startup = &genphy_startup,
126 };
127
phy_cortina_access_init(void)128 int phy_cortina_access_init(void)
129 {
130 phy_register(&rtl8211_external_driver);
131 phy_register(&rtl8211_internal_driver);
132 return 0;
133 }
134