1/*
2 * Utility functions for FEL mode, when running SPL in AArch64.
3 *
4 * Copyright (c) 2017 Arm Ltd.
5 *
6 * SPDX-License-Identifier:	GPL-2.0+
7 */
8
9#include <asm-offsets.h>
10#include <config.h>
11#include <asm/system.h>
12#include <linux/linkage.h>
13
14/*
15 * We don't overwrite save_boot_params() here, to save the FEL state upon
16 * entry, since this would run *after* the RMR reset, which clobbers that
17 * state.
18 * Instead we store the state _very_ early in the boot0 hook, *before*
19 * resetting to AArch64.
20 */
21
22/*
23 * The FEL routines in BROM run in AArch32.
24 * Reset back into 32-bit mode here and restore the saved FEL state
25 * afterwards.
26 * Resetting back into AArch32/EL3 using the RMR always enters the BROM,
27 * but we can use the CPU hotplug mechanism to branch back to our code
28 * immediately.
29 */
30ENTRY(return_to_fel)
31	/*
32	 * the RMR reset will clear all registers, so save the arguments
33	 * (LR and SP) in the fel_stash structure, which we read anyways later
34	 */
35	adr	x2, fel_stash
36	str	w0, [x2]
37	str	w1, [x2, #4]
38
39	adr	x1, fel_stash_addr	// to find the fel_stash address in AA32
40	str	w2, [x1]
41
42	ldr	x0, =0xfa50392f		// CPU hotplug magic
43#ifdef CONFIG_MACH_SUN50I_H616
44	ldr	x2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
45	str	w0, [x2], #0x4
46#elif CONFIG_MACH_SUN50I_H6
47	ldr	x2, =(SUNXI_RTC_BASE + 0x1b8)	// BOOT_CPU_HP_FLAG_REG
48	str	w0, [x2], #0x4
49#else
50	ldr	x2, =(SUNXI_CPUCFG_BASE + 0x1a4) // offset for CPU hotplug base
51	str	w0, [x2, #0x8]
52#endif
53	adr	x0, back_in_32
54	str	w0, [x2]
55
56	dsb	sy
57	isb	sy
58	mov	x0, #2			// RMR reset into AArch32
59	dsb	sy
60	msr	RMR_EL3, x0
61	isb	sy
621:	wfi
63	b	1b
64
65/* AArch32 code to restore the state from fel_stash and return back to FEL. */
66back_in_32:
67	.word	0xe59f0028 	// ldr	r0, [pc, #40]	; load fel_stash address
68	.word	0xe5901008 	// ldr	r1, [r0, #8]
69	.word	0xe129f001 	// msr	CPSR_fc, r1
70	.word	0xf57ff06f	// isb
71	.word	0xe590d000 	// ldr	sp, [r0]
72	.word	0xe590e004 	// ldr	lr, [r0, #4]
73	.word	0xe5901010 	// ldr	r1, [r0, #16]
74	.word	0xee0c1f10 	// mcr	15, 0, r1, cr12, cr0, {0} ; VBAR
75	.word	0xe590100c 	// ldr	r1, [r0, #12]
76	.word	0xee011f10 	// mcr	15, 0, r1, cr1, cr0, {0}  ; SCTLR
77	.word	0xf57ff06f	// isb
78	.word	0xe12fff1e 	// bx	lr		; return to FEL
79fel_stash_addr:
80	.word   0x00000000	// receives fel_stash addr, by AA64 code above
81ENDPROC(return_to_fel)
82