1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
5  */
6 
7 #ifndef _CONFIG_CONTROLCENTERDC_H
8 #define _CONFIG_CONTROLCENTERDC_H
9 
10 /*
11  * High Level Configuration Options (easy to change)
12  */
13 #define CONFIG_CUSTOMER_BOARD_SUPPORT
14 
15 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
16 
17 /*
18  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
19  * for DDR ECC byte filling in the SPL before loading the main
20  * U-Boot into it.
21  */
22 
23 #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
24 
25 #define CONFIG_LOADADDR 		1000000
26 
27 /*
28  * SATA/SCSI/AHCI configuration
29  */
30 #define CONFIG_SCSI_AHCI_PLAT
31 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
32 #define CONFIG_SYS_SCSI_MAX_LUN		1
33 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
34 					 CONFIG_SYS_SCSI_MAX_LUN)
35 
36 /* USB/EHCI configuration */
37 #define CONFIG_EHCI_IS_TDI
38 
39 /* Environment in SPI NOR flash */
40 
41 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
42 
43 /* PCIe support */
44 #ifndef CONFIG_SPL_BUILD
45 #define CONFIG_PCI_SCAN_SHOW
46 #endif
47 
48 /*
49  * Software (bit-bang) MII driver configuration
50  */
51 #define CONFIG_BITBANGMII_MULTI
52 
53 /* SPL */
54 /*
55  * Select the boot device here
56  *
57  * Currently supported are:
58  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
59  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
60  */
61 #define SPL_BOOT_SPI_NOR_FLASH		1
62 #define SPL_BOOT_SDIO_MMC_CARD		2
63 #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
64 
65 /* Defines for SPL */
66 #define CONFIG_SPL_SIZE			(160 << 10)
67 
68 #if defined(CONFIG_SECURED_MODE_IMAGE)
69 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x2614)
70 #else
71 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x30)
72 #endif
73 
74 #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
75 #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
76 
77 #ifdef CONFIG_SPL_BUILD
78 #define CONFIG_SYS_MALLOC_SIMPLE
79 #endif
80 
81 #define CONFIG_SPL_STACK		(0x40000000 + ((212 - 16) << 10))
82 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
83 
84 #define CONFIG_SPL_LIBCOMMON_SUPPORT
85 #define CONFIG_SPL_LIBGENERIC_SUPPORT
86 #define CONFIG_SPL_I2C_SUPPORT
87 
88 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
89 /* SPL related SPI defines */
90 #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
91 #endif
92 
93 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
94 /* SPL related MMC defines */
95 #define CONFIG_SPL_MMC_SUPPORT
96 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
97 #define CONFIG_SYS_MMC_U_BOOT_OFFS		(168 << 10)
98 #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
99 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
100 #ifdef CONFIG_SPL_BUILD
101 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
102 #endif
103 #endif
104 
105 /*
106  * Environment Configuration
107  */
108 
109 #define CONFIG_HOSTNAME		"ccdc"
110 #define CONFIG_ROOTPATH		"/opt/nfsroot"
111 #define CONFIG_BOOTFILE		"ccdc.img"
112 
113 #define CONFIG_EXTRA_ENV_SETTINGS						\
114 	"netdev=eth1\0"						\
115 	"consoledev=ttyS1\0"							\
116 	"u-boot=u-boot.bin\0"							\
117 	"bootfile_addr=1000000\0"						\
118 	"keyprogram_addr=3000000\0"						\
119 	"keyprogram_file=keyprogram.img\0"						\
120 	"fdtfile=controlcenterdc.dtb\0"						\
121 	"load=tftpboot ${loadaddr} ${u-boot}\0"					\
122 	"mmcdev=0:2\0"								\
123 	"update=sf probe 1:0;"							\
124 		" sf erase 0 +${filesize};"					\
125 		" sf write ${fileaddr} 0 ${filesize}\0"				\
126 	"upd=run load update\0"							\
127 	"fdt_high=0x10000000\0"							\
128 	"initrd_high=0x10000000\0"						\
129 	"loadkeyprogram=tpm flush_keys;"					\
130 		" mmc rescan;"							\
131 		" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
132 		" source ${keyprogram_addr}:script@1\0"				\
133 	"gpio1=gpio@22_25\0"							\
134 	"gpio2=A29\0"								\
135 	"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "	\
136 		  "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"	\
137 	"bootfail=for i in ${blinkseq}; do"					\
138 		" if test $i -eq 0; then"					\
139 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
140 		" elif test $i -eq 1; then"					\
141 		" gpio clear ${gpio1}; gpio clear ${gpio2};"			\
142 		" elif test $i -eq 2; then"					\
143 		" gpio set ${gpio1}; gpio set ${gpio2};"			\
144 		" else;"							\
145 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
146 		" fi; sleep 0.12; done\0"
147 
148 #define CONFIG_NFSBOOTCOMMAND								\
149 	"setenv bootargs root=/dev/nfs rw "						\
150 	"nfsroot=${serverip}:${rootpath} "						\
151 	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "	\
152 	"console=${consoledev},${baudrate} ${othbootargs}; "				\
153 	"tftpboot ${bootfile_addr} ${bootfile}; "						\
154 	"bootm ${bootfile_addr}"
155 
156 #define CONFIG_MMCBOOTCOMMAND					\
157 	"setenv bootargs root=/dev/mmcblk0p3 rw rootwait "	\
158 	"console=${consoledev},${baudrate} ${othbootargs}; "	\
159 	"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "	\
160 	"bootm ${bootfile_addr}"
161 
162 #define CONFIG_BOOTCOMMAND			\
163 	"if env exists keyprogram; then;"	\
164 	" setenv keyprogram; run nfsboot;"	\
165         " fi;"					\
166         " run dobootfail"
167 
168 /*
169  * mv-common.h should be defined after CMD configs since it used them
170  * to enable certain macros
171  */
172 #include "mv-common.h"
173 
174 #endif /* _CONFIG_CONTROLCENTERDC_H */
175