1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2013 Samsung Electronics 4 * Sanghee Kim <sh0130.kim@samsung.com> 5 * Piotr Wilczek <p.wilczek@samsung.com> 6 * 7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board. 8 */ 9 10 #ifndef __CONFIG_TRATS2_H 11 #define __CONFIG_TRATS2_H 12 13 #include <configs/exynos4-common.h> 14 15 #define CONFIG_TIZEN /* TIZEN lib */ 16 17 #define CONFIG_SYS_L2CACHE_OFF 18 #ifndef CONFIG_SYS_L2CACHE_OFF 19 #define CONFIG_SYS_L2_PL310 20 #define CONFIG_SYS_PL310_BASE 0x10502000 21 #endif 22 23 /* TRATS2 has 4 banks of DRAM */ 24 #define CONFIG_SYS_SDRAM_BASE 0x40000000 25 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 26 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 27 /* memtest works on */ 28 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) 29 30 #define CONFIG_BOOTCOMMAND "run autoboot" 31 32 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 33 - GENERATED_GBL_DATA_SIZE) 34 35 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 36 37 #define CONFIG_SYS_MONITOR_BASE 0x00000000 38 39 /* Tizen - partitions definitions */ 40 #define PARTS_CSA "csa-mmc" 41 #define PARTS_BOOT "boot" 42 #define PARTS_QBOOT "qboot" 43 #define PARTS_CSC "csc" 44 #define PARTS_ROOT "platform" 45 #define PARTS_DATA "data" 46 #define PARTS_UMS "ums" 47 48 #define PARTS_DEFAULT \ 49 "uuid_disk=${uuid_gpt_disk};" \ 50 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 51 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 52 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ 53 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 54 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 55 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 56 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 57 58 #define CONFIG_DFU_ALT \ 59 "u-boot raw 0x80 0x800;" \ 60 "/uImage ext4 0 2;" \ 61 "/modem.bin ext4 0 2;" \ 62 "/exynos4412-trats2.dtb ext4 0 2;" \ 63 ""PARTS_CSA" part 0 1;" \ 64 ""PARTS_BOOT" part 0 2;" \ 65 ""PARTS_QBOOT" part 0 3;" \ 66 ""PARTS_CSC" part 0 4;" \ 67 ""PARTS_ROOT" part 0 5;" \ 68 ""PARTS_DATA" part 0 6;" \ 69 ""PARTS_UMS" part 0 7;" \ 70 "params.bin raw 0x38 0x8;" \ 71 "/Image.itb ext4 0 2\0" 72 73 #define CONFIG_EXTRA_ENV_SETTINGS \ 74 "bootk=" \ 75 "run loaduimage;" \ 76 "if run loaddtb; then " \ 77 "bootm 0x40007FC0 - ${fdtaddr};" \ 78 "fi;" \ 79 "bootm 0x40007FC0;\0" \ 80 "updatebackup=" \ 81 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \ 82 " mmc dev 0 0\0" \ 83 "updatebootb=" \ 84 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \ 85 "mmcboot=" \ 86 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 87 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 88 "run bootk\0" \ 89 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 90 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 91 "verify=n\0" \ 92 "rootfstype=ext4\0" \ 93 "console=console=ttySAC2,115200n8\0" \ 94 "kernelname=uImage\0" \ 95 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \ 96 "${kernelname}\0" \ 97 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 98 "${fdtfile}\0" \ 99 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \ 100 "mmcbootpart=2\0" \ 101 "mmcrootpart=5\0" \ 102 "opts=always_resume=1\0" \ 103 "partitions=" PARTS_DEFAULT \ 104 "dfu_alt_info=" CONFIG_DFU_ALT \ 105 "uartpath=ap\0" \ 106 "usbpath=ap\0" \ 107 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \ 108 "consoleoff=set console console=ram; save; reset\0" \ 109 "spladdr=0x40000100\0" \ 110 "splsize=0x200\0" \ 111 "splfile=falcon.bin\0" \ 112 "spl_export=" \ 113 "setexpr spl_imgsize ${splsize} + 8 ;" \ 114 "setenv spl_imgsize 0x${spl_imgsize};" \ 115 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 116 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 117 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 118 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 119 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 120 "spl export atags 0x40007FC0;" \ 121 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 122 "mw.l ${spl_addr_tmp} ${splsize};" \ 123 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 124 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 125 "setenv spl_imgsize;" \ 126 "setenv spl_imgaddr;" \ 127 "setenv spl_addr_tmp;\0" \ 128 CONFIG_EXTRA_ENV_ITB \ 129 "fdtaddr=40800000\0" \ 130 131 /* GPT */ 132 133 /* Security subsystem - enable hw_rand() */ 134 #define CONFIG_EXYNOS_ACE_SHA 135 136 /* Common misc for Samsung */ 137 #define CONFIG_MISC_COMMON 138 139 /* Download menu - Samsung common */ 140 #define CONFIG_LCD_MENU 141 142 /* Download menu - definitions for check keys */ 143 #ifndef __ASSEMBLY__ 144 145 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC" 146 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1 147 #define KEY_PWR_STATUS_MASK (1 << 0) 148 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 149 #define KEY_PWR_INTERRUPT_MASK (1 << 1) 150 151 #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22 152 #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33 153 #endif /* __ASSEMBLY__ */ 154 155 /* LCD console */ 156 #define LCD_BPP LCD_COLOR16 157 158 /* LCD */ 159 #define CONFIG_FB_ADDR 0x52504000 160 #define CONFIG_EXYNOS_MIPI_DSIM 161 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 162 163 #endif /* __CONFIG_H */ 164