1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Qualcomm APQ8096 based Dragonboard 820C board device tree source
4 *
5 * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 */
7
8/dts-v1/;
9
10#include "skeleton64.dtsi"
11#include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
12
13/ {
14	model = "Qualcomm Technologies, Inc. DB820c";
15	compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
16	#address-cells = <2>;
17	#size-cells = <2>;
18
19	aliases {
20		serial0 = &blsp2_uart2;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	memory {
28		device_type = "memory";
29		reg = <0 0x80000000 0 0xc0000000>;
30	};
31
32	reserved-memory {
33		#address-cells = <2>;
34		#size-cells = <2>;
35		ranges;
36
37		smem_mem: smem_region@86300000 {
38			reg = <0x0 0x86300000 0x0 0x200000>;
39			no-map;
40		};
41	};
42
43	psci {
44		compatible = "arm,psci-1.0";
45		method = "smc";
46	};
47
48	smem {
49		compatible = "qcom,smem";
50		memory-region = <&smem_mem>;
51	};
52
53	soc: soc {
54		#address-cells = <1>;
55		#size-cells = <1>;
56		ranges = <0 0 0 0xffffffff>;
57		compatible = "simple-bus";
58
59		gcc: clock-controller@300000 {
60			compatible = "qcom,gcc-msm8996";
61			#clock-cells = <1>;
62			#reset-cells = <1>;
63			#power-domain-cells = <1>;
64			reg = <0x300000 0x90000>;
65		};
66
67		pinctrl: qcom,tlmm@1010000 {
68			compatible = "qcom,tlmm-apq8096";
69			reg = <0x1010000 0x400000>;
70
71			blsp8_uart: uart {
72				function = "blsp_uart8";
73				pins = "GPIO_4", "GPIO_5";
74				drive-strength = <DRIVE_STRENGTH_8MA>;
75				bias-disable;
76			};
77		};
78
79		blsp2_uart2: serial@75b0000 {
80			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
81			reg = <0x75b0000 0x1000>;
82			clock = <&gcc 4>;
83			pinctrl-names = "uart";
84			pinctrl-0 = <&blsp8_uart>;
85		};
86
87		sdhc2: sdhci@74a4900 {
88			compatible = "qcom,sdhci-msm-v4";
89			reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
90			index = <0x0>;
91			bus-width = <4>;
92			clock = <&gcc 0>;
93			clock-frequency = <200000000>;
94		 };
95
96		spmi@400f000 {
97			compatible = "qcom,spmi-pmic-arb";
98			reg = <0x400f800 0x200>,
99			      <0x4400000 0x400000>,
100			      <0x4c00000 0x400000>;
101			#address-cells = <0x1>;
102			#size-cells = <0x1>;
103
104			pmic0: pm8994@0 {
105				compatible = "qcom,spmi-pmic";
106				reg = <0x0 0x1>;
107				#address-cells = <0x1>;
108				#size-cells = <0x1>;
109
110				pm8994_pon: pm8994_pon@800 {
111					compatible = "qcom,pm8994-pwrkey";
112					reg = <0x800 0x96>;
113					#gpio-cells = <2>;
114					gpio-controller;
115					gpio-bank-name="pm8994_key.";
116				};
117
118				pm8994_gpios: pm8994_gpios@c000 {
119					compatible = "qcom,pm8994-gpio";
120					reg = <0xc000 0x400>;
121					gpio-controller;
122					gpio-count = <24>;
123					#gpio-cells = <2>;
124					gpio-bank-name="pm8994.";
125				};
126			};
127
128			pmic1: pm8994@1 {
129				compatible = "qcom,spmi-pmic";
130				reg = <0x1 0x1>;
131				#address-cells = <0x1>;
132				#size-cells = <0x1>;
133			};
134		};
135	};
136
137};
138
139#include "dragonboard820c-uboot.dtsi"
140