1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * Copyright 2020 NXP
4 * Copyright 2016 Freescale Semiconductor
5 */
6
7/include/ "skeleton64.dtsi"
8
9/ {
10	compatible = "fsl,ls1012a";
11	interrupt-parent = <&gic>;
12
13	sysclk: sysclk {
14		compatible = "fixed-clock";
15		#clock-cells = <0>;
16		clock-frequency = <100000000>;
17		clock-output-names = "sysclk";
18	};
19
20	gic: interrupt-controller@1400000 {
21		compatible = "arm,gic-400";
22		#interrupt-cells = <3>;
23		interrupt-controller;
24		reg = <0x0 0x1401000 0 0x1000>, /* GICD */
25		      <0x0 0x1402000 0 0x2000>, /* GICC */
26		      <0x0 0x1404000 0 0x2000>, /* GICH */
27		      <0x0 0x1406000 0 0x2000>; /* GICV */
28		interrupts = <1 9 0xf08>;
29	};
30
31	soc {
32		compatible = "simple-bus";
33		#address-cells = <2>;
34		#size-cells = <2>;
35		ranges;
36
37		clockgen: clocking@1ee1000 {
38			compatible = "fsl,ls1012a-clockgen";
39			reg = <0x0 0x1ee1000 0x0 0x1000>;
40			#clock-cells = <2>;
41			clocks = <&sysclk>;
42		};
43
44		dspi0: dspi@2100000 {
45			compatible = "fsl,vf610-dspi";
46			#address-cells = <1>;
47			#size-cells = <0>;
48			reg = <0x0 0x2100000 0x0 0x10000>;
49			interrupts = <0 64 0x4>;
50			clock-names = "dspi";
51			clocks = <&clockgen 4 0>;
52			num-cs = <6>;
53			big-endian;
54			status = "disabled";
55		};
56
57		esdhc0: esdhc@1560000 {
58			compatible = "fsl,esdhc";
59			reg = <0x0 0x1560000 0x0 0x10000>;
60			interrupts = <0 62 0x4>;
61			big-endian;
62			bus-width = <4>;
63		};
64
65		esdhc1: esdhc@1580000 {
66			compatible = "fsl,esdhc";
67			reg = <0x0 0x1580000 0x0 0x10000>;
68			interrupts = <0 65 0x4>;
69			big-endian;
70			non-removable;
71			bus-width = <4>;
72		};
73
74		gpio0: gpio@2300000 {
75			compatible = "fsl,qoriq-gpio";
76			reg = <0x0 0x2300000 0x0 0x10000>;
77			interrupts = <0 66 0x4>;
78			gpio-controller;
79			#gpio-cells = <2>;
80			interrupt-controller;
81			#interrupt-cells = <2>;
82		};
83
84		gpio1: gpio@2310000 {
85			compatible = "fsl,qoriq-gpio";
86			reg = <0x0 0x2310000 0x0 0x10000>;
87			interrupts = <0 67 0x4>;
88			gpio-controller;
89			#gpio-cells = <2>;
90			interrupt-controller;
91			#interrupt-cells = <2>;
92		};
93
94		i2c0: i2c@2180000 {
95			compatible = "fsl,vf610-i2c";
96			#address-cells = <1>;
97			#size-cells = <0>;
98			reg = <0x0 0x2180000 0x0 0x10000>;
99			interrupts = <0 56 0x4>;
100			clock-names = "i2c";
101			clocks = <&clockgen 4 0>;
102			status = "disabled";
103		};
104
105		i2c1: i2c@2190000 {
106			compatible = "fsl,vf610-i2c";
107			#address-cells = <1>;
108			#size-cells = <0>;
109			reg = <0x0 0x2190000 0x0 0x10000>;
110			interrupts = <0 57 0x4>;
111			clock-names = "i2c";
112			clocks = <&clockgen 4 0>;
113			status = "disabled";
114		};
115
116		duart0: serial@21c0500 {
117			compatible = "fsl,ns16550", "ns16550a";
118			reg = <0x00 0x21c0500 0x0 0x100>;
119			interrupts = <0 54 0x4>;
120			clocks = <&clockgen 4 0>;
121		};
122
123		duart1: serial@21c0600 {
124			compatible = "fsl,ns16550", "ns16550a";
125			reg = <0x00 0x21c0600 0x0 0x100>;
126			interrupts = <0 54 0x4>;
127			clocks = <&clockgen 4 0>;
128		};
129
130		qspi: quadspi@1550000 {
131			compatible = "fsl,ls1021a-qspi";
132			#address-cells = <1>;
133			#size-cells = <0>;
134			reg = <0x0 0x1550000 0x0 0x10000>,
135				<0x0 0x40000000 0x0 0x4000000>;
136			reg-names = "QuadSPI", "QuadSPI-memory";
137			status = "disabled";
138		};
139
140		pcie1: pcie@3400000 {
141			compatible = "fsl,ls-pcie", "snps,dw-pcie";
142			reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
143			       0x00 0x03480000 0x0 0x40000   /* lut registers */
144			       0x00 0x034c0000 0x0 0x40000   /* pf controls registers */
145			       0x40 0x00000000 0x0 0x20000>; /* configuration space */
146			reg-names = "dbi", "lut", "ctrl", "config";
147			big-endian;
148			#address-cells = <3>;
149			#size-cells = <2>;
150			device_type = "pci";
151			bus-range = <0x0 0xff>;
152			ranges = <0x81000000 0x0 0x00000000 0x40 0x00020000 0x0 0x00010000   /* downstream I/O */
153				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
154		};
155
156		sata: sata@3200000 {
157			compatible = "fsl,ls1012a-ahci";
158			reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
159			       0x0 0x20140520 0x0 0x4>;	 /* ecc sata addr */
160			reg-names = "sata-base", "ecc-addr";
161			interrupts = <0 69 4>;
162			clocks = <&clockgen 4 0>;
163			status = "disabled";
164		};
165
166		usb0: usb2@8600000 {
167			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
168			reg = <0x0 0x8600000 0x0 0x1000>;
169			interrupts = <0 139 0x4>;
170			dr_mode = "host";
171			fsl,usb-erratum-a005697;
172		};
173
174		usb1: usb3@2f00000 {
175			compatible = "fsl,layerscape-dwc3";
176			reg = <0x0 0x2f00000 0x0 0x10000>;
177			interrupts = <0 61 0x4>;
178			dr_mode = "host";
179		};
180	};
181};
182