1// SPDX-License-Identifier: GPL-2.0 2/* 3 * dts file for Xilinx ZynqMP SM-K26 rev1/B/A 4 * 5 * (C) Copyright 2020, Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 */ 9 10/dts-v1/; 11 12#include "zynqmp.dtsi" 13#include "zynqmp-clk-ccf.dtsi" 14#include <dt-bindings/input/input.h> 15#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/phy/phy.h> 17 18/ { 19 model = "ZynqMP SM-K26 Rev1/B/A"; 20 compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", 21 "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26", 22 "xlnx,zynqmp"; 23 24 aliases { 25 gpio0 = &gpio; 26 i2c0 = &i2c0; 27 i2c1 = &i2c1; 28 mmc0 = &sdhci0; 29 mmc1 = &sdhci1; 30 rtc0 = &rtc; 31 serial0 = &uart0; 32 serial1 = &uart1; 33 serial2 = &dcc; 34 spi0 = &qspi; 35 spi1 = &spi0; 36 spi2 = &spi1; 37 usb0 = &usb0; 38 usb1 = &usb1; 39 nvmem0 = &eeprom; 40 nvmem1 = &eeprom_cc; 41 }; 42 43 chosen { 44 bootargs = "earlycon"; 45 stdout-path = "serial1:115200n8"; 46 }; 47 48 memory@0 { 49 device_type = "memory"; /* 4GB */ 50 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 51 }; 52 53 gpio-keys { 54 compatible = "gpio-keys"; 55 autorepeat; 56 fwuen { 57 label = "fwuen"; 58 gpios = <&gpio 12 GPIO_ACTIVE_LOW>; 59 }; 60 }; 61 62 leds { 63 compatible = "gpio-leds"; 64 ds35 { 65 label = "heartbeat"; 66 gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; 67 linux,default-trigger = "heartbeat"; 68 }; 69 70 ds36 { 71 label = "vbus_det"; 72 gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; 73 default-state = "on"; 74 }; 75 }; 76 77 ams { 78 compatible = "iio-hwmon"; 79 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, 80 <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>, 81 <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>, 82 <&xilinx_ams 9>, <&xilinx_ams 10>, <&xilinx_ams 11>, 83 <&xilinx_ams 12>, <&xilinx_ams 13>, <&xilinx_ams 14>, 84 <&xilinx_ams 15>, <&xilinx_ams 16>, <&xilinx_ams 17>, 85 <&xilinx_ams 18>, <&xilinx_ams 19>, <&xilinx_ams 20>, 86 <&xilinx_ams 21>, <&xilinx_ams 22>, <&xilinx_ams 23>, 87 <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, 88 <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; 89 }; 90}; 91 92&uart1 { /* MIO36/MIO37 */ 93 status = "okay"; 94}; 95 96&qspi { /* MIO 0-5 - U143 */ 97 status = "okay"; 98 flash@0 { /* MT25QU512A */ 99 compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */ 100 #address-cells = <1>; 101 #size-cells = <1>; 102 reg = <0>; 103 spi-tx-bus-width = <1>; 104 spi-rx-bus-width = <4>; 105 spi-max-frequency = <40000000>; /* 40MHz */ 106 partition@0 { 107 label = "Image Selector"; 108 reg = <0x0 0x80000>; /* 512KB */ 109 read-only; 110 lock; 111 }; 112 partition@80000 { 113 label = "Image Selector Golden"; 114 reg = <0x80000 0x80000>; /* 512KB */ 115 read-only; 116 lock; 117 }; 118 partition@100000 { 119 label = "Persistent Register"; 120 reg = <0x100000 0x20000>; /* 128KB */ 121 }; 122 partition@120000 { 123 label = "Persistent Register Backup"; 124 reg = <0x120000 0x20000>; /* 128KB */ 125 }; 126 partition@140000 { 127 label = "Open_1"; 128 reg = <0x140000 0xC0000>; /* 768KB */ 129 }; 130 partition@200000 { 131 label = "Image A (FSBL, PMU, ATF, U-Boot)"; 132 reg = <0x200000 0xD00000>; /* 13MB */ 133 }; 134 partition@f00000 { 135 label = "ImgSel Image A Catch"; 136 reg = <0xF00000 0x80000>; /* 512KB */ 137 read-only; 138 lock; 139 }; 140 partition@f80000 { 141 label = "Image B (FSBL, PMU, ATF, U-Boot)"; 142 reg = <0xF80000 0xD00000>; /* 13MB */ 143 }; 144 partition@1c80000 { 145 label = "ImgSel Image B Catch"; 146 reg = <0x1C80000 0x80000>; /* 512KB */ 147 read-only; 148 lock; 149 }; 150 partition@1d00000 { 151 label = "Open_2"; 152 reg = <0x1D00000 0x100000>; /* 1MB */ 153 }; 154 partition@1e00000 { 155 label = "Recovery Image"; 156 reg = <0x1E00000 0x200000>; /* 2MB */ 157 read-only; 158 lock; 159 }; 160 partition@2000000 { 161 label = "Recovery Image Backup"; 162 reg = <0x2000000 0x200000>; /* 2MB */ 163 read-only; 164 lock; 165 }; 166 partition@2200000 { 167 label = "U-Boot storage variables"; 168 reg = <0x2200000 0x20000>; /* 128KB */ 169 }; 170 partition@2220000 { 171 label = "U-Boot storage variables backup"; 172 reg = <0x2220000 0x20000>; /* 128KB */ 173 }; 174 partition@2240000 { 175 label = "SHA256"; 176 reg = <0x2240000 0x10000>; /* 256B but 64KB sector */ 177 read-only; 178 lock; 179 }; 180 partition@2250000 { 181 label = "User"; 182 reg = <0x2250000 0x1db0000>; /* 29.5 MB */ 183 }; 184 }; 185}; 186 187&sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A*/ 188 status = "okay"; 189 non-removable; 190 disable-wp; 191 bus-width = <8>; 192 xlnx,mio-bank = <0>; 193}; 194 195&spi1 { /* MIO6, 9-11 */ 196 status = "okay"; 197 label = "TPM"; 198 num-cs = <1>; 199 tpm@0 { /* slm9670 - U144 */ 200 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 201 reg = <0>; 202 spi-max-frequency = <18500000>; 203 }; 204}; 205 206&i2c1 { 207 status = "okay"; 208 clock-frequency = <400000>; 209 scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; 210 sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; 211 212 eeprom: eeprom@50 { /* u46 - also at address 0x58 */ 213 compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ 214 reg = <0x50>; 215 /* WP pin EE_WP_EN connected to slg7x644092@68 */ 216 }; 217 218 eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */ 219 compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ 220 reg = <0x51>; 221 }; 222 223 /* da9062@30 - u170 - also at address 0x31 */ 224 /* da9131@33 - u167 */ 225 da9131: pmic@33 { 226 compatible = "dlg,da9131"; 227 reg = <0x33>; 228 regulators { 229 da9131_buck1: buck1 { 230 regulator-name = "da9131_buck1"; 231 regulator-boot-on; 232 regulator-always-on; 233 }; 234 da9131_buck2: buck2 { 235 regulator-name = "da9131_buck2"; 236 regulator-boot-on; 237 regulator-always-on; 238 }; 239 }; 240 }; 241 242 /* da9130@32 - u166 */ 243 da9130: pmic@32 { 244 compatible = "dlg,da9130"; 245 reg = <0x32>; 246 regulators { 247 da9130_buck1: buck1 { 248 regulator-name = "da9130_buck1"; 249 regulator-boot-on; 250 regulator-always-on; 251 }; 252 }; 253 }; 254 255 /* slg7x644091@70 - u168 NOT accessible due to address conflict with stdp4320 */ 256 /* 257 * stdp4320 - u27 FW has below two issues to be fixed in next board revision. 258 * Device acknowledging to addresses 0x5C, 0x5D, 0x70, 0x72, 0x76. 259 * Address conflict with slg7x644091@70 making both the devices NOT accessible. 260 * With the FW fix, stdp4320 should respond to address 0x73 only. 261 */ 262 /* slg7x644092@68 - u169 */ 263 /* Also connected via JA1C as C23/C24 */ 264}; 265 266&gpio { 267 status = "okay"; 268 gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */ 269 "QSPI_CS_B", "SPI_CLK", "LED1", "LED2", "SPI_CS_B", /* 5 - 9 */ 270 "SPI_MISO", "SPI_MOSI", "FWUEN", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ 271 "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ 272 "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST", "I2C1_SCL", /* 20 - 24 */ 273 "I2C1_SDA", "", "", "", "", /* 25 - 29 */ 274 "", "", "", "", "", /* 30 - 34 */ 275 "", "", "", "", "", /* 35 - 39 */ 276 "", "", "", "", "", /* 40 - 44 */ 277 "", "", "", "", "", /* 45 - 49 */ 278 "", "", "", "", "", /* 50 - 54 */ 279 "", "", "", "", "", /* 55 - 59 */ 280 "", "", "", "", "", /* 60 - 64 */ 281 "", "", "", "", "", /* 65 - 69 */ 282 "", "", "", "", "", /* 70 - 74 */ 283 "", "", "", /* 75 - 77, MIO end and EMIO start */ 284 "", "", /* 78 - 79 */ 285 "", "", "", "", "", /* 80 - 84 */ 286 "", "", "", "", "", /* 85 - 89 */ 287 "", "", "", "", "", /* 90 - 94 */ 288 "", "", "", "", "", /* 95 - 99 */ 289 "", "", "", "", "", /* 100 - 104 */ 290 "", "", "", "", "", /* 105 - 109 */ 291 "", "", "", "", "", /* 110 - 114 */ 292 "", "", "", "", "", /* 115 - 119 */ 293 "", "", "", "", "", /* 120 - 124 */ 294 "", "", "", "", "", /* 125 - 129 */ 295 "", "", "", "", "", /* 130 - 134 */ 296 "", "", "", "", "", /* 135 - 139 */ 297 "", "", "", "", "", /* 140 - 144 */ 298 "", "", "", "", "", /* 145 - 149 */ 299 "", "", "", "", "", /* 150 - 154 */ 300 "", "", "", "", "", /* 155 - 159 */ 301 "", "", "", "", "", /* 160 - 164 */ 302 "", "", "", "", "", /* 165 - 169 */ 303 "", "", "", ""; /* 170 - 174 */ 304}; 305 306&xilinx_ams { 307 status = "okay"; 308}; 309 310&ams_ps { 311 status = "okay"; 312}; 313 314&ams_pl { 315 status = "okay"; 316}; 317