1menu "ARM architecture" 2 depends on ARM 3 4config SYS_ARCH 5 default "arm" 6 7config ARM64 8 bool 9 select PHYS_64BIT 10 select SYS_CACHE_SHIFT_6 11 12if ARM64 13config POSITION_INDEPENDENT 14 bool "Generate position-independent pre-relocation code" 15 help 16 U-Boot expects to be linked to a specific hard-coded address, and to 17 be loaded to and run from that address. This option lifts that 18 restriction, thus allowing the code to be loaded to and executed from 19 almost any 4K aligned address. This logic relies on the relocation 20 information that is embedded in the binary to support U-Boot 21 relocating itself to the top-of-RAM later during execution. 22 23config INIT_SP_RELATIVE 24 bool "Specify the early stack pointer relative to the .bss section" 25 default n if ARCH_QEMU 26 default y if POSITION_INDEPENDENT 27 help 28 U-Boot typically uses a hard-coded value for the stack pointer 29 before relocation. Enable this option to instead calculate the 30 initial SP at run-time. This is useful to avoid hard-coding addresses 31 into U-Boot, so that it can be loaded and executed at arbitrary 32 addresses and thus avoid using arbitrary addresses at runtime. 33 34 If this option is enabled, the early stack pointer is set to 35 &_bss_start with a offset value added. The offset is specified by 36 SYS_INIT_SP_BSS_OFFSET. 37 38config SYS_INIT_SP_BSS_OFFSET 39 int "Early stack offset from the .bss base address" 40 depends on INIT_SP_RELATIVE 41 default 524288 42 help 43 This option's value is the offset added to &_bss_start in order to 44 calculate the stack pointer. This offset should be large enough so 45 that the early malloc region, global data (gd), and early stack usage 46 do not overlap any appended DTB. 47 48config LINUX_KERNEL_IMAGE_HEADER 49 bool 50 help 51 Place a Linux kernel image header at the start of the U-Boot binary. 52 The format of the header is described in the Linux kernel source at 53 Documentation/arm64/booting.txt. This feature is useful since the 54 image header reports the amount of memory (BSS and similar) that 55 U-Boot needs to use, but which isn't part of the binary. 56 57if LINUX_KERNEL_IMAGE_HEADER 58config LNX_KRNL_IMG_TEXT_OFFSET_BASE 59 hex 60 help 61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the 62 TEXT_OFFSET value written to the Linux kernel image header. 63endif 64endif 65 66config GIC_V3_ITS 67 bool "ARM GICV3 ITS" 68 select REGMAP 69 select SYSCON 70 select IRQ 71 help 72 ARM GICV3 Interrupt translation service (ITS). 73 Basic support for programming locality specific peripheral 74 interrupts (LPI) configuration tables and enable LPI tables. 75 LPI configuration table can be used by u-boot or Linux. 76 ARM GICV3 has limitation, once the LPI table is enabled, LPI 77 configuration table can not be re-programmed, unless GICV3 reset. 78 79config STATIC_RELA 80 bool 81 default y if ARM64 82 83config DMA_ADDR_T_64BIT 84 bool 85 default y if ARM64 86 87config HAS_VBAR 88 bool 89 90config HAS_THUMB2 91 bool 92 93# Used for compatibility with asm files copied from the kernel 94config ARM_ASM_UNIFIED 95 bool 96 default y 97 98# Used for compatibility with asm files copied from the kernel 99config THUMB2_KERNEL 100 bool 101 102config SYS_ICACHE_OFF 103 bool "Do not enable icache" 104 default n 105 help 106 Do not enable instruction cache in U-Boot. 107 108config SPL_SYS_ICACHE_OFF 109 bool "Do not enable icache in SPL" 110 depends on SPL 111 default SYS_ICACHE_OFF 112 help 113 Do not enable instruction cache in SPL. 114 115config SYS_DCACHE_OFF 116 bool "Do not enable dcache" 117 default n 118 help 119 Do not enable data cache in U-Boot. 120 121config SPL_SYS_DCACHE_OFF 122 bool "Do not enable dcache in SPL" 123 depends on SPL 124 default SYS_DCACHE_OFF 125 help 126 Do not enable data cache in SPL. 127 128config SYS_ARM_CACHE_CP15 129 bool "CP15 based cache enabling support" 130 help 131 Select this if your processor suports enabling caches by using 132 CP15 registers. 133 134config SYS_ARM_MMU 135 bool "MMU-based Paged Memory Management Support" 136 select SYS_ARM_CACHE_CP15 137 help 138 Select if you want MMU-based virtualised addressing space 139 support via paged memory management. 140 141config SYS_ARM_MPU 142 bool 'Use the ARM v7 PMSA Compliant MPU' 143 help 144 Some ARM systems without an MMU have instead a Memory Protection 145 Unit (MPU) that defines the type and permissions for regions of 146 memory. 147 If your CPU has an MPU then you should choose 'y' here unless you 148 know that you do not want to use the MPU. 149 150# If set, the workarounds for these ARM errata are applied early during U-Boot 151# startup. Note that in general these options force the workarounds to be 152# applied; no CPU-type/version detection exists, unlike the similar options in 153# the Linux kernel. Do not set these options unless they apply! Also note that 154# the following can be machine-specific errata. These do have ability to 155# provide rudimentary version and machine-specific checks, but expect no 156# product checks: 157# CONFIG_ARM_ERRATA_430973 158# CONFIG_ARM_ERRATA_454179 159# CONFIG_ARM_ERRATA_621766 160# CONFIG_ARM_ERRATA_798870 161# CONFIG_ARM_ERRATA_801819 162# CONFIG_ARM_CORTEX_A8_CVE_2017_5715 163# CONFIG_ARM_CORTEX_A15_CVE_2017_5715 164 165config ARM_ERRATA_430973 166 bool 167 168config ARM_ERRATA_454179 169 bool 170 171config ARM_ERRATA_621766 172 bool 173 174config ARM_ERRATA_716044 175 bool 176 177config ARM_ERRATA_725233 178 bool 179 180config ARM_ERRATA_742230 181 bool 182 183config ARM_ERRATA_743622 184 bool 185 186config ARM_ERRATA_751472 187 bool 188 189config ARM_ERRATA_761320 190 bool 191 192config ARM_ERRATA_773022 193 bool 194 195config ARM_ERRATA_774769 196 bool 197 198config ARM_ERRATA_794072 199 bool 200 201config ARM_ERRATA_798870 202 bool 203 204config ARM_ERRATA_801819 205 bool 206 207config ARM_ERRATA_826974 208 bool 209 210config ARM_ERRATA_828024 211 bool 212 213config ARM_ERRATA_829520 214 bool 215 216config ARM_ERRATA_833069 217 bool 218 219config ARM_ERRATA_833471 220 bool 221 222config ARM_ERRATA_845369 223 bool 224 225config ARM_ERRATA_852421 226 bool 227 228config ARM_ERRATA_852423 229 bool 230 231config ARM_ERRATA_855873 232 bool 233 234config ARM_CORTEX_A8_CVE_2017_5715 235 bool 236 237config ARM_CORTEX_A15_CVE_2017_5715 238 bool 239 240config CPU_ARM720T 241 bool 242 select SYS_CACHE_SHIFT_5 243 imply SYS_ARM_MMU 244 245config CPU_ARM920T 246 bool 247 select SYS_CACHE_SHIFT_5 248 imply SYS_ARM_MMU 249 250config CPU_ARM926EJS 251 bool 252 select SYS_CACHE_SHIFT_5 253 imply SYS_ARM_MMU 254 255config CPU_ARM946ES 256 bool 257 select SYS_CACHE_SHIFT_5 258 imply SYS_ARM_MMU 259 260config CPU_ARM1136 261 bool 262 select SYS_CACHE_SHIFT_5 263 imply SYS_ARM_MMU 264 265config CPU_ARM1176 266 bool 267 select HAS_VBAR 268 select SYS_CACHE_SHIFT_5 269 imply SYS_ARM_MMU 270 271config CPU_V7A 272 bool 273 select HAS_THUMB2 274 select HAS_VBAR 275 select SYS_CACHE_SHIFT_6 276 imply SYS_ARM_MMU 277 278config CPU_V7M 279 bool 280 select HAS_THUMB2 281 select SYS_ARM_MPU 282 select SYS_CACHE_SHIFT_5 283 select SYS_THUMB_BUILD 284 select THUMB2_KERNEL 285 286config CPU_V7R 287 bool 288 select HAS_THUMB2 289 select SYS_ARM_CACHE_CP15 290 select SYS_ARM_MPU 291 select SYS_CACHE_SHIFT_6 292 293config CPU_PXA 294 bool 295 select SYS_CACHE_SHIFT_5 296 imply SYS_ARM_MMU 297 298config CPU_SA1100 299 bool 300 select SYS_CACHE_SHIFT_5 301 imply SYS_ARM_MMU 302 303config SYS_CPU 304 default "arm720t" if CPU_ARM720T 305 default "arm920t" if CPU_ARM920T 306 default "arm926ejs" if CPU_ARM926EJS 307 default "arm946es" if CPU_ARM946ES 308 default "arm1136" if CPU_ARM1136 309 default "arm1176" if CPU_ARM1176 310 default "armv7" if CPU_V7A 311 default "armv7" if CPU_V7R 312 default "armv7m" if CPU_V7M 313 default "pxa" if CPU_PXA 314 default "sa1100" if CPU_SA1100 315 default "armv8" if ARM64 316 317config SYS_ARM_ARCH 318 int 319 default 4 if CPU_ARM720T 320 default 4 if CPU_ARM920T 321 default 5 if CPU_ARM926EJS 322 default 5 if CPU_ARM946ES 323 default 6 if CPU_ARM1136 324 default 6 if CPU_ARM1176 325 default 7 if CPU_V7A 326 default 7 if CPU_V7M 327 default 7 if CPU_V7R 328 default 5 if CPU_PXA 329 default 4 if CPU_SA1100 330 default 8 if ARM64 331 332config SYS_CACHE_SHIFT_5 333 bool 334 335config SYS_CACHE_SHIFT_6 336 bool 337 338config SYS_CACHE_SHIFT_7 339 bool 340 341config SYS_CACHELINE_SIZE 342 int 343 default 128 if SYS_CACHE_SHIFT_7 344 default 64 if SYS_CACHE_SHIFT_6 345 default 32 if SYS_CACHE_SHIFT_5 346 347choice 348 prompt "Select the ARM data write cache policy" 349 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ 350 CPU_PXA || RZA1 351 default SYS_ARM_CACHE_WRITEBACK 352 353config SYS_ARM_CACHE_WRITEBACK 354 bool "Write-back (WB)" 355 help 356 A write updates the cache only and marks the cache line as dirty. 357 External memory is updated only when the line is evicted or explicitly 358 cleaned. 359 360config SYS_ARM_CACHE_WRITETHROUGH 361 bool "Write-through (WT)" 362 help 363 A write updates both the cache and the external memory system. 364 This does not mark the cache line as dirty. 365 366config SYS_ARM_CACHE_WRITEALLOC 367 bool "Write allocation (WA)" 368 help 369 A cache line is allocated on a write miss. This means that executing a 370 store instruction on the processor might cause a burst read to occur. 371 There is a linefill to obtain the data for the cache line, before the 372 write is performed. 373endchoice 374 375config ARCH_CPU_INIT 376 bool "Enable ARCH_CPU_INIT" 377 help 378 Some architectures require a call to arch_cpu_init(). 379 Say Y here to enable it 380 381config SYS_ARCH_TIMER 382 bool "ARM Generic Timer support" 383 depends on CPU_V7A || ARM64 384 default y if ARM64 385 help 386 The ARM Generic Timer (aka arch-timer) provides an architected 387 interface to a timer source on an SoC. 388 It is mandatory for ARMv8 implementation and widely available 389 on ARMv7 systems. 390 391config ARM_SMCCC 392 bool "Support for ARM SMC Calling Convention (SMCCC)" 393 depends on CPU_V7A || ARM64 394 select ARM_PSCI_FW 395 help 396 Say Y here if you want to enable ARM SMC Calling Convention. 397 This should be enabled if U-Boot needs to communicate with system 398 firmware (for example, PSCI) according to SMCCC. 399 400config SEMIHOSTING 401 bool "support boot from semihosting" 402 help 403 In emulated environments, semihosting is a way for 404 the hosted environment to call out to the emulator to 405 retrieve files from the host machine. 406 407config SYS_THUMB_BUILD 408 bool "Build U-Boot using the Thumb instruction set" 409 depends on !ARM64 410 help 411 Use this flag to build U-Boot using the Thumb instruction set for 412 ARM architectures. Thumb instruction set provides better code 413 density. For ARM architectures that support Thumb2 this flag will 414 result in Thumb2 code generated by GCC. 415 416config SPL_SYS_THUMB_BUILD 417 bool "Build SPL using the Thumb instruction set" 418 default y if SYS_THUMB_BUILD 419 depends on !ARM64 && SPL 420 help 421 Use this flag to build SPL using the Thumb instruction set for 422 ARM architectures. Thumb instruction set provides better code 423 density. For ARM architectures that support Thumb2 this flag will 424 result in Thumb2 code generated by GCC. 425 426config TPL_SYS_THUMB_BUILD 427 bool "Build TPL using the Thumb instruction set" 428 default y if SYS_THUMB_BUILD 429 depends on TPL && !ARM64 430 help 431 Use this flag to build TPL using the Thumb instruction set for 432 ARM architectures. Thumb instruction set provides better code 433 density. For ARM architectures that support Thumb2 this flag will 434 result in Thumb2 code generated by GCC. 435 436 437config SYS_L2CACHE_OFF 438 bool "L2cache off" 439 help 440 If SoC does not support L2CACHE or one does not want to enable 441 L2CACHE, choose this option. 442 443config ENABLE_ARM_SOC_BOOT0_HOOK 444 bool "prepare BOOT0 header" 445 help 446 If the SoC's BOOT0 requires a header area filled with (magic) 447 values, then choose this option, and create a file included as 448 <asm/arch/boot0.h> which contains the required assembler code. 449 450config ARM_CORTEX_CPU_IS_UP 451 bool 452 default n 453 454config USE_ARCH_MEMCPY 455 bool "Use an assembly optimized implementation of memcpy" 456 default y 457 depends on !ARM64 458 help 459 Enable the generation of an optimized version of memcpy. 460 Such an implementation may be faster under some conditions 461 but may increase the binary size. 462 463config SPL_USE_ARCH_MEMCPY 464 bool "Use an assembly optimized implementation of memcpy for SPL" 465 default y if USE_ARCH_MEMCPY 466 depends on !ARM64 && SPL 467 help 468 Enable the generation of an optimized version of memcpy. 469 Such an implementation may be faster under some conditions 470 but may increase the binary size. 471 472config TPL_USE_ARCH_MEMCPY 473 bool "Use an assembly optimized implementation of memcpy for TPL" 474 default y if USE_ARCH_MEMCPY 475 depends on !ARM64 && TPL 476 help 477 Enable the generation of an optimized version of memcpy. 478 Such an implementation may be faster under some conditions 479 but may increase the binary size. 480 481config USE_ARCH_MEMSET 482 bool "Use an assembly optimized implementation of memset" 483 default y 484 depends on !ARM64 485 help 486 Enable the generation of an optimized version of memset. 487 Such an implementation may be faster under some conditions 488 but may increase the binary size. 489 490config SPL_USE_ARCH_MEMSET 491 bool "Use an assembly optimized implementation of memset for SPL" 492 default y if USE_ARCH_MEMSET 493 depends on !ARM64 && SPL 494 help 495 Enable the generation of an optimized version of memset. 496 Such an implementation may be faster under some conditions 497 but may increase the binary size. 498 499config TPL_USE_ARCH_MEMSET 500 bool "Use an assembly optimized implementation of memset for TPL" 501 default y if USE_ARCH_MEMSET 502 depends on !ARM64 && TPL 503 help 504 Enable the generation of an optimized version of memset. 505 Such an implementation may be faster under some conditions 506 but may increase the binary size. 507 508config ARM64_SUPPORT_AARCH32 509 bool "ARM64 system support AArch32 execution state" 510 depends on ARM64 511 default y if !TARGET_THUNDERX_88XX 512 help 513 This ARM64 system supports AArch32 execution state. 514 515choice 516 prompt "Target select" 517 default TARGET_HIKEY 518 519config ARCH_AT91 520 bool "Atmel AT91" 521 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB 522 select SPL_SEPARATE_BSS if SPL 523 524config TARGET_EDB93XX 525 bool "Support edb93xx" 526 select CPU_ARM920T 527 select PL010_SERIAL 528 529config TARGET_ASPENITE 530 bool "Support aspenite" 531 select CPU_ARM926EJS 532 533config TARGET_GPLUGD 534 bool "Support gplugd" 535 select CPU_ARM926EJS 536 537config ARCH_DAVINCI 538 bool "TI DaVinci" 539 select CPU_ARM926EJS 540 select SPL_DM_SPI if SPL 541 imply CMD_SAVES 542 help 543 Support for TI's DaVinci platform. 544 545config ARCH_KIRKWOOD 546 bool "Marvell Kirkwood" 547 select ARCH_MISC_INIT 548 select BOARD_EARLY_INIT_F 549 select CPU_ARM926EJS 550 551config ARCH_MVEBU 552 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" 553 select DM 554 select DM_ETH 555 select DM_SERIAL 556 select DM_SPI 557 select DM_SPI_FLASH 558 select SPL_DM_SPI if SPL 559 select SPL_DM_SPI_FLASH if SPL 560 select OF_CONTROL 561 select OF_SEPARATE 562 select SPI 563 imply CMD_DM 564 565config ARCH_ORION5X 566 bool "Marvell Orion" 567 select CPU_ARM926EJS 568 569config TARGET_SPEAR300 570 bool "Support spear300" 571 select BOARD_EARLY_INIT_F 572 select CPU_ARM926EJS 573 select PL011_SERIAL 574 imply CMD_SAVES 575 576config TARGET_SPEAR310 577 bool "Support spear310" 578 select BOARD_EARLY_INIT_F 579 select CPU_ARM926EJS 580 select PL011_SERIAL 581 imply CMD_SAVES 582 583config TARGET_SPEAR320 584 bool "Support spear320" 585 select BOARD_EARLY_INIT_F 586 select CPU_ARM926EJS 587 select PL011_SERIAL 588 imply CMD_SAVES 589 590config TARGET_SPEAR600 591 bool "Support spear600" 592 select BOARD_EARLY_INIT_F 593 select CPU_ARM926EJS 594 select PL011_SERIAL 595 imply CMD_SAVES 596 597config TARGET_STV0991 598 bool "Support stv0991" 599 select CPU_V7A 600 select DM 601 select DM_SERIAL 602 select DM_SPI 603 select DM_SPI_FLASH 604 select PL01X_SERIAL 605 select SPI 606 select SPI_FLASH 607 imply CMD_DM 608 609config TARGET_X600 610 bool "Support x600" 611 select BOARD_LATE_INIT 612 select CPU_ARM926EJS 613 select PL011_SERIAL 614 select SUPPORT_SPL 615 616config TARGET_FLEA3 617 bool "Support flea3" 618 select CPU_ARM1136 619 620config ARCH_BCM283X 621 bool "Broadcom BCM283X family" 622 select DM 623 select DM_GPIO 624 select DM_SERIAL 625 select OF_CONTROL 626 select PL01X_SERIAL 627 select SERIAL_SEARCH_ALL 628 imply CMD_DM 629 imply FAT_WRITE 630 631config ARCH_BCM63158 632 bool "Broadcom BCM63158 family" 633 select DM 634 select OF_CONTROL 635 imply CMD_DM 636 637config ARCH_BCM68360 638 bool "Broadcom BCM68360 family" 639 select DM 640 select OF_CONTROL 641 imply CMD_DM 642 643config ARCH_BCM6858 644 bool "Broadcom BCM6858 family" 645 select DM 646 select OF_CONTROL 647 imply CMD_DM 648 649config ARCH_BCMSTB 650 bool "Broadcom BCM7XXX family" 651 select CPU_V7A 652 select DM 653 select OF_CONTROL 654 select OF_PRIOR_STAGE 655 imply CMD_DM 656 help 657 This enables support for Broadcom ARM-based set-top box 658 chipsets, including the 7445 family of chips. 659 660config TARGET_BCMCYGNUS 661 bool "Support bcmcygnus" 662 select CPU_V7A 663 imply BCM_SF2_ETH 664 imply BCM_SF2_ETH_GMAC 665 imply CMD_HASH 666 imply CRC32_VERIFY 667 imply FAT_WRITE 668 imply HASH_VERIFY 669 imply NETDEVICES 670 671config TARGET_BCMNS2 672 bool "Support Broadcom Northstar2" 673 select ARM64 674 help 675 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit 676 ARMv8 Cortex-A57 processors targeting a broad range of networking 677 applications. 678 679config TARGET_BCMNS3 680 bool "Support Broadcom NS3" 681 select ARM64 682 select BOARD_LATE_INIT 683 help 684 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit 685 ARMv8 Cortex-A72 processors targeting a broad range of networking 686 applications. 687 688config ARCH_EXYNOS 689 bool "Samsung EXYNOS" 690 select DM 691 select DM_GPIO 692 select DM_I2C 693 select DM_KEYBOARD 694 select DM_SERIAL 695 select DM_SPI 696 select DM_SPI_FLASH 697 select SPI 698 imply SYS_THUMB_BUILD 699 imply CMD_DM 700 imply FAT_WRITE 701 702config ARCH_S5PC1XX 703 bool "Samsung S5PC1XX" 704 select CPU_V7A 705 select DM 706 select DM_GPIO 707 select DM_I2C 708 select DM_SERIAL 709 imply CMD_DM 710 711config ARCH_HIGHBANK 712 bool "Calxeda Highbank" 713 select CPU_V7A 714 select PL01X_SERIAL 715 select DM 716 select DM_SERIAL 717 select OF_CONTROL 718 select OF_BOARD 719 select CLK 720 select CLK_CCF 721 select AHCI 722 select DM_ETH 723 select PHYS_64BIT 724 725config ARCH_INTEGRATOR 726 bool "ARM Ltd. Integrator family" 727 select DM 728 select DM_SERIAL 729 select PL01X_SERIAL 730 imply CMD_DM 731 732config ARCH_IPQ40XX 733 bool "Qualcomm IPQ40xx SoCs" 734 select CPU_V7A 735 select DM 736 select DM_GPIO 737 select DM_SERIAL 738 select DM_RESET 739 select MSM_SMEM 740 select PINCTRL 741 select CLK 742 select SMEM 743 select OF_CONTROL 744 imply CMD_DM 745 746config ARCH_KEYSTONE 747 bool "TI Keystone" 748 select CMD_POWEROFF 749 select CPU_V7A 750 select SUPPORT_SPL 751 select SYS_ARCH_TIMER 752 select SYS_THUMB_BUILD 753 imply CMD_MTDPARTS 754 imply CMD_SAVES 755 imply FIT 756 757config ARCH_K3 758 bool "Texas Instruments' K3 Architecture" 759 select SPL 760 select SUPPORT_SPL 761 select FIT 762 763config ARCH_OMAP2PLUS 764 bool "TI OMAP2+" 765 select CPU_V7A 766 select SPL_BOARD_INIT if SPL 767 select SPL_STACK_R if SPL 768 select SUPPORT_SPL 769 imply TI_SYSC if DM && OF_CONTROL 770 imply FIT 771 772config ARCH_MESON 773 bool "Amlogic Meson" 774 imply DISTRO_DEFAULTS 775 imply DM_RNG 776 help 777 Support for the Meson SoC family developed by Amlogic Inc., 778 targeted at media players and tablet computers. We currently 779 support the S905 (GXBaby) 64-bit SoC. 780 781config ARCH_MEDIATEK 782 bool "MediaTek SoCs" 783 select DM 784 select OF_CONTROL 785 select SPL_DM if SPL 786 select SPL_LIBCOMMON_SUPPORT if SPL 787 select SPL_LIBGENERIC_SUPPORT if SPL 788 select SPL_OF_CONTROL if SPL 789 select SUPPORT_SPL 790 help 791 Support for the MediaTek SoCs family developed by MediaTek Inc. 792 Please refer to doc/README.mediatek for more information. 793 794config ARCH_LPC32XX 795 bool "NXP LPC32xx platform" 796 select CPU_ARM926EJS 797 select DM 798 select DM_GPIO 799 select DM_SERIAL 800 select SPL_DM if SPL 801 select SUPPORT_SPL 802 imply CMD_DM 803 804config ARCH_IMX8 805 bool "NXP i.MX8 platform" 806 select ARM64 807 select DM 808 select OF_CONTROL 809 select ENABLE_ARM_SOC_BOOT0_HOOK 810 811config ARCH_IMX8M 812 bool "NXP i.MX8M platform" 813 select ARM64 814 select SYS_FSL_HAS_SEC if IMX_HAB 815 select SYS_FSL_SEC_COMPAT_4 816 select SYS_FSL_SEC_LE 817 select DM 818 select SUPPORT_SPL 819 imply CMD_DM 820 821config ARCH_IMXRT 822 bool "NXP i.MXRT platform" 823 select CPU_V7M 824 select DM 825 select DM_SERIAL 826 select SUPPORT_SPL 827 imply CMD_DM 828 829config ARCH_MX23 830 bool "NXP i.MX23 family" 831 select CPU_ARM926EJS 832 select PL011_SERIAL 833 select SUPPORT_SPL 834 835config ARCH_MX25 836 bool "NXP MX25" 837 select CPU_ARM926EJS 838 imply MXC_GPIO 839 840config ARCH_MX28 841 bool "NXP i.MX28 family" 842 select CPU_ARM926EJS 843 select PL011_SERIAL 844 select SUPPORT_SPL 845 846config ARCH_MX31 847 bool "NXP i.MX31 family" 848 select CPU_ARM1136 849 850config ARCH_MX7ULP 851 bool "NXP MX7ULP" 852 select CPU_V7A 853 select SYS_FSL_HAS_SEC if IMX_HAB 854 select SYS_FSL_SEC_COMPAT_4 855 select SYS_FSL_SEC_LE 856 select ROM_UNIFIED_SECTIONS 857 imply MXC_GPIO 858 imply SYS_THUMB_BUILD 859 860config ARCH_MX7 861 bool "Freescale MX7" 862 select ARCH_MISC_INIT 863 select CPU_V7A 864 select SYS_FSL_HAS_SEC if IMX_HAB 865 select SYS_FSL_SEC_COMPAT_4 866 select SYS_FSL_SEC_LE 867 imply BOARD_EARLY_INIT_F 868 imply MXC_GPIO 869 imply SYS_THUMB_BUILD 870 871config ARCH_MX6 872 bool "Freescale MX6" 873 select CPU_V7A 874 select SYS_FSL_HAS_SEC 875 select SYS_FSL_SEC_COMPAT_4 876 select SYS_FSL_SEC_LE 877 imply MXC_GPIO 878 imply SYS_THUMB_BUILD 879 880if ARCH_MX6 881config SPL_LDSCRIPT 882 default "arch/arm/mach-omap2/u-boot-spl.lds" 883endif 884 885config ARCH_MX5 886 bool "Freescale MX5" 887 select BOARD_EARLY_INIT_F 888 select CPU_V7A 889 imply MXC_GPIO 890 891config ARCH_NEXELL 892 bool "Nexell S5P4418/S5P6818 SoC" 893 select ENABLE_ARM_SOC_BOOT0_HOOK 894 select DM 895 896config ARCH_OWL 897 bool "Actions Semi OWL SoCs" 898 select DM 899 select DM_ETH 900 select DM_SERIAL 901 select OWL_SERIAL 902 select CLK 903 select CLK_OWL 904 select OF_CONTROL 905 select SYS_RELOC_GD_ENV_ADDR 906 imply CMD_DM 907 908config ARCH_QEMU 909 bool "QEMU Virtual Platform" 910 select DM 911 select DM_SERIAL 912 select OF_CONTROL 913 select PL01X_SERIAL 914 imply CMD_DM 915 imply DM_RNG 916 imply DM_RTC 917 imply RTC_PL031 918 919config ARCH_RMOBILE 920 bool "Renesas ARM SoCs" 921 select DM 922 select DM_SERIAL 923 imply BOARD_EARLY_INIT_F 924 imply CMD_DM 925 imply FAT_WRITE 926 imply SYS_THUMB_BUILD 927 imply ARCH_MISC_INIT if DISPLAY_CPUINFO 928 929config ARCH_SNAPDRAGON 930 bool "Qualcomm Snapdragon SoCs" 931 select ARM64 932 select DM 933 select DM_GPIO 934 select DM_SERIAL 935 select MSM_SMEM 936 select OF_CONTROL 937 select OF_SEPARATE 938 select SMEM 939 select SPMI 940 imply CMD_DM 941 942config ARCH_SOCFPGA 943 bool "Altera SOCFPGA family" 944 select ARCH_EARLY_INIT_R 945 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 946 select ARM64 if TARGET_SOCFPGA_SOC64 947 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 948 select DM 949 select DM_SERIAL 950 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 951 select OF_CONTROL 952 select SPL_DM_RESET if DM_RESET 953 select SPL_DM_SERIAL 954 select SPL_LIBCOMMON_SUPPORT 955 select SPL_LIBGENERIC_SUPPORT 956 select SPL_NAND_SUPPORT if SPL_NAND_DENALI 957 select SPL_OF_CONTROL 958 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 959 select SPL_SERIAL_SUPPORT 960 select SPL_SYSRESET 961 select SPL_WATCHDOG_SUPPORT 962 select SUPPORT_SPL 963 select SYS_NS16550 964 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 965 select SYSRESET 966 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 967 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 968 imply CMD_DM 969 imply CMD_MTDPARTS 970 imply CRC32_VERIFY 971 imply DM_SPI 972 imply DM_SPI_FLASH 973 imply FAT_WRITE 974 imply SPL 975 imply SPL_DM 976 imply SPL_DM_SPI 977 imply SPL_DM_SPI_FLASH 978 imply SPL_LIBDISK_SUPPORT 979 imply SPL_MMC_SUPPORT 980 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 981 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 982 imply SPL_SPI_FLASH_SUPPORT 983 imply SPL_SPI_SUPPORT 984 imply L2X0_CACHE 985 986config ARCH_SUNXI 987 bool "Support sunxi (Allwinner) SoCs" 988 select BINMAN 989 select CMD_GPIO 990 select CMD_MMC if MMC 991 select CMD_USB if DISTRO_DEFAULTS 992 select CLK 993 select DM 994 select DM_ETH 995 select DM_GPIO 996 select DM_KEYBOARD 997 select DM_MMC if MMC 998 select DM_SCSI if SCSI 999 select DM_SERIAL 1000 select DM_USB if DISTRO_DEFAULTS 1001 select OF_BOARD_SETUP 1002 select OF_CONTROL 1003 select OF_SEPARATE 1004 select SPECIFY_CONSOLE_INDEX 1005 select SPL_STACK_R if SPL 1006 select SPL_SYS_MALLOC_SIMPLE if SPL 1007 select SPL_SYS_THUMB_BUILD if !ARM64 1008 select SUNXI_GPIO 1009 select SYS_NS16550 1010 select SYS_THUMB_BUILD if !ARM64 1011 select USB if DISTRO_DEFAULTS 1012 select USB_KEYBOARD if DISTRO_DEFAULTS 1013 select USB_STORAGE if DISTRO_DEFAULTS 1014 select SPL_USE_TINY_PRINTF 1015 select USE_PREBOOT 1016 select SYS_RELOC_GD_ENV_ADDR 1017 imply BOARD_LATE_INIT 1018 imply CMD_DM 1019 imply CMD_GPT 1020 imply CMD_UBI if MTD_RAW_NAND 1021 imply DISTRO_DEFAULTS 1022 imply FAT_WRITE 1023 imply FIT 1024 imply OF_LIBFDT_OVERLAY 1025 imply PRE_CONSOLE_BUFFER 1026 imply SPL_GPIO_SUPPORT 1027 imply SPL_LIBCOMMON_SUPPORT 1028 imply SPL_LIBGENERIC_SUPPORT 1029 imply SPL_MMC_SUPPORT if MMC 1030 imply SPL_POWER_SUPPORT 1031 imply SPL_SERIAL_SUPPORT 1032 imply USB_GADGET 1033 1034config ARCH_U8500 1035 bool "ST-Ericsson U8500 Series" 1036 select CPU_V7A 1037 select DM 1038 select DM_GPIO 1039 select DM_MMC if MMC 1040 select DM_SERIAL 1041 select DM_USB if USB 1042 select OF_CONTROL 1043 select SYSRESET 1044 select TIMER 1045 imply ARM_PL180_MMCI 1046 imply DM_RTC 1047 imply NOMADIK_MTU_TIMER 1048 imply PL01X_SERIAL 1049 imply RTC_PL031 1050 imply SYSRESET_SYSCON 1051 1052config ARCH_VERSAL 1053 bool "Support Xilinx Versal Platform" 1054 select ARM64 1055 select CLK 1056 select DM 1057 select DM_ETH if NET 1058 select DM_MMC if MMC 1059 select DM_SERIAL 1060 select OF_CONTROL 1061 imply BOARD_LATE_INIT 1062 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1063 1064config ARCH_VF610 1065 bool "Freescale Vybrid" 1066 select CPU_V7A 1067 select SYS_FSL_ERRATUM_ESDHC111 1068 imply CMD_MTDPARTS 1069 imply MTD_RAW_NAND 1070 1071config ARCH_ZYNQ 1072 bool "Xilinx Zynq based platform" 1073 select CLK 1074 select CLK_ZYNQ 1075 select CPU_V7A 1076 select DM 1077 select DM_ETH if NET 1078 select DM_MMC if MMC 1079 select DM_SERIAL 1080 select DM_SPI 1081 select DM_SPI_FLASH 1082 select DM_USB if USB 1083 select OF_CONTROL 1084 select SPI 1085 select SPL_BOARD_INIT if SPL 1086 select SPL_CLK if SPL 1087 select SPL_DM if SPL 1088 select SPL_DM_SPI if SPL 1089 select SPL_DM_SPI_FLASH if SPL 1090 select SPL_OF_CONTROL if SPL 1091 select SPL_SEPARATE_BSS if SPL 1092 select SUPPORT_SPL 1093 imply ARCH_EARLY_INIT_R 1094 imply BOARD_LATE_INIT 1095 imply CMD_CLK 1096 imply CMD_DM 1097 imply CMD_SPL 1098 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1099 imply FAT_WRITE 1100 1101config ARCH_ZYNQMP_R5 1102 bool "Xilinx ZynqMP R5 based platform" 1103 select CLK 1104 select CPU_V7R 1105 select DM 1106 select DM_ETH if NET 1107 select DM_MMC if MMC 1108 select DM_SERIAL 1109 select OF_CONTROL 1110 imply CMD_DM 1111 imply DM_USB_GADGET 1112 1113config ARCH_ZYNQMP 1114 bool "Xilinx ZynqMP based platform" 1115 select ARM64 1116 select CLK 1117 select DM 1118 select DM_ETH if NET 1119 select DM_MAILBOX 1120 select DM_MMC if MMC 1121 select DM_SERIAL 1122 select DM_SPI if SPI 1123 select DM_SPI_FLASH if DM_SPI 1124 select DM_USB if USB 1125 select FIRMWARE 1126 select OF_CONTROL 1127 select SPL_BOARD_INIT if SPL 1128 select SPL_CLK if SPL 1129 select SPL_DM if SPL 1130 select SPL_DM_SPI if SPI && SPL_DM 1131 select SPL_DM_SPI_FLASH if SPL_DM_SPI 1132 select SPL_DM_MAILBOX if SPL 1133 select SPL_FIRMWARE if SPL 1134 select SPL_SEPARATE_BSS if SPL 1135 select SUPPORT_SPL 1136 select ZYNQMP_IPI 1137 imply BOARD_LATE_INIT 1138 imply CMD_DM 1139 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1140 imply FAT_WRITE 1141 imply MP 1142 imply DM_USB_GADGET 1143 1144config ARCH_TEGRA 1145 bool "NVIDIA Tegra" 1146 imply DISTRO_DEFAULTS 1147 imply FAT_WRITE 1148 1149config TARGET_VEXPRESS64_AEMV8A 1150 bool "Support vexpress_aemv8a" 1151 select ARM64 1152 select PL01X_SERIAL 1153 1154config TARGET_VEXPRESS64_BASE_FVP 1155 bool "Support Versatile Express ARMv8a FVP BASE model" 1156 select ARM64 1157 select PL01X_SERIAL 1158 select SEMIHOSTING 1159 1160config TARGET_VEXPRESS64_JUNO 1161 bool "Support Versatile Express Juno Development Platform" 1162 select ARM64 1163 select PL01X_SERIAL 1164 select DM 1165 select OF_CONTROL 1166 select OF_BOARD 1167 select CLK 1168 select DM_SERIAL 1169 select ARM_PSCI_FW 1170 select PSCI_RESET 1171 select DM_ETH 1172 select BLK 1173 select USB 1174 select DM_USB 1175 1176config TARGET_TOTAL_COMPUTE 1177 bool "Support Total Compute Platform" 1178 select ARM64 1179 select PL01X_SERIAL 1180 select DM 1181 select DM_SERIAL 1182 select DM_MMC 1183 select DM_GPIO 1184 1185config TARGET_LS2080A_EMU 1186 bool "Support ls2080a_emu" 1187 select ARCH_LS2080A 1188 select ARM64 1189 select ARMV8_MULTIENTRY 1190 select FSL_DDR_SYNC_REFRESH 1191 help 1192 Support for Freescale LS2080A_EMU platform. 1193 The LS2080A Development System (EMULATOR) is a pre-silicon 1194 development platform that supports the QorIQ LS2080A 1195 Layerscape Architecture processor. 1196 1197config TARGET_LS1088AQDS 1198 bool "Support ls1088aqds" 1199 select ARCH_LS1088A 1200 select ARM64 1201 select ARMV8_MULTIENTRY 1202 select ARCH_SUPPORT_TFABOOT 1203 select BOARD_LATE_INIT 1204 select SUPPORT_SPL 1205 select FSL_DDR_INTERACTIVE if !SD_BOOT 1206 help 1207 Support for NXP LS1088AQDS platform. 1208 The LS1088A Development System (QDS) is a high-performance 1209 development platform that supports the QorIQ LS1088A 1210 Layerscape Architecture processor. 1211 1212config TARGET_LS2080AQDS 1213 bool "Support ls2080aqds" 1214 select ARCH_LS2080A 1215 select ARM64 1216 select ARMV8_MULTIENTRY 1217 select ARCH_SUPPORT_TFABOOT 1218 select BOARD_LATE_INIT 1219 select SUPPORT_SPL 1220 imply SCSI 1221 imply SCSI_AHCI 1222 select FSL_DDR_BIST 1223 select FSL_DDR_INTERACTIVE if !SPL 1224 help 1225 Support for Freescale LS2080AQDS platform. 1226 The LS2080A Development System (QDS) is a high-performance 1227 development platform that supports the QorIQ LS2080A 1228 Layerscape Architecture processor. 1229 1230config TARGET_LS2080ARDB 1231 bool "Support ls2080ardb" 1232 select ARCH_LS2080A 1233 select ARM64 1234 select ARMV8_MULTIENTRY 1235 select ARCH_SUPPORT_TFABOOT 1236 select BOARD_LATE_INIT 1237 select SUPPORT_SPL 1238 select FSL_DDR_BIST 1239 select FSL_DDR_INTERACTIVE if !SPL 1240 imply SCSI 1241 imply SCSI_AHCI 1242 help 1243 Support for Freescale LS2080ARDB platform. 1244 The LS2080A Reference design board (RDB) is a high-performance 1245 development platform that supports the QorIQ LS2080A 1246 Layerscape Architecture processor. 1247 1248config TARGET_LS2081ARDB 1249 bool "Support ls2081ardb" 1250 select ARCH_LS2080A 1251 select ARM64 1252 select ARMV8_MULTIENTRY 1253 select BOARD_LATE_INIT 1254 select SUPPORT_SPL 1255 help 1256 Support for Freescale LS2081ARDB platform. 1257 The LS2081A Reference design board (RDB) is a high-performance 1258 development platform that supports the QorIQ LS2081A/LS2041A 1259 Layerscape Architecture processor. 1260 1261config TARGET_LX2160ARDB 1262 bool "Support lx2160ardb" 1263 select ARCH_LX2160A 1264 select ARM64 1265 select ARMV8_MULTIENTRY 1266 select ARCH_SUPPORT_TFABOOT 1267 select BOARD_LATE_INIT 1268 help 1269 Support for NXP LX2160ARDB platform. 1270 The lx2160ardb (LX2160A Reference design board (RDB) 1271 is a high-performance development platform that supports the 1272 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1273 1274config TARGET_LX2160AQDS 1275 bool "Support lx2160aqds" 1276 select ARCH_LX2160A 1277 select ARM64 1278 select ARMV8_MULTIENTRY 1279 select ARCH_SUPPORT_TFABOOT 1280 select BOARD_LATE_INIT 1281 help 1282 Support for NXP LX2160AQDS platform. 1283 The lx2160aqds (LX2160A QorIQ Development System (QDS) 1284 is a high-performance development platform that supports the 1285 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1286 1287config TARGET_LX2162AQDS 1288 bool "Support lx2162aqds" 1289 select ARCH_LX2162A 1290 select ARCH_MISC_INIT 1291 select ARM64 1292 select ARMV8_MULTIENTRY 1293 select ARCH_SUPPORT_TFABOOT 1294 select BOARD_LATE_INIT 1295 help 1296 Support for NXP LX2162AQDS platform. 1297 The lx2162aqds support is based on LX2160A Layerscape Architecture processor. 1298 1299config TARGET_HIKEY 1300 bool "Support HiKey 96boards Consumer Edition Platform" 1301 select ARM64 1302 select DM 1303 select DM_GPIO 1304 select DM_SERIAL 1305 select OF_CONTROL 1306 select PL01X_SERIAL 1307 select SPECIFY_CONSOLE_INDEX 1308 imply CMD_DM 1309 help 1310 Support for HiKey 96boards platform. It features a HI6220 1311 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. 1312 1313config TARGET_HIKEY960 1314 bool "Support HiKey960 96boards Consumer Edition Platform" 1315 select ARM64 1316 select DM 1317 select DM_SERIAL 1318 select OF_CONTROL 1319 select PL01X_SERIAL 1320 imply CMD_DM 1321 help 1322 Support for HiKey960 96boards platform. It features a HI3660 1323 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. 1324 1325config TARGET_POPLAR 1326 bool "Support Poplar 96boards Enterprise Edition Platform" 1327 select ARM64 1328 select DM 1329 select DM_SERIAL 1330 select DM_USB 1331 select OF_CONTROL 1332 select PL01X_SERIAL 1333 imply CMD_DM 1334 help 1335 Support for Poplar 96boards EE platform. It features a HI3798cv200 1336 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU 1337 making it capable of running any commercial set-top solution based on 1338 Linux or Android. 1339 1340config TARGET_LS1012AQDS 1341 bool "Support ls1012aqds" 1342 select ARCH_LS1012A 1343 select ARM64 1344 select ARCH_SUPPORT_TFABOOT 1345 select BOARD_LATE_INIT 1346 help 1347 Support for Freescale LS1012AQDS platform. 1348 The LS1012A Development System (QDS) is a high-performance 1349 development platform that supports the QorIQ LS1012A 1350 Layerscape Architecture processor. 1351 1352config TARGET_LS1012ARDB 1353 bool "Support ls1012ardb" 1354 select ARCH_LS1012A 1355 select ARM64 1356 select ARCH_SUPPORT_TFABOOT 1357 select BOARD_LATE_INIT 1358 imply SCSI 1359 imply SCSI_AHCI 1360 help 1361 Support for Freescale LS1012ARDB platform. 1362 The LS1012A Reference design board (RDB) is a high-performance 1363 development platform that supports the QorIQ LS1012A 1364 Layerscape Architecture processor. 1365 1366config TARGET_LS1012A2G5RDB 1367 bool "Support ls1012a2g5rdb" 1368 select ARCH_LS1012A 1369 select ARM64 1370 select ARCH_SUPPORT_TFABOOT 1371 select BOARD_LATE_INIT 1372 imply SCSI 1373 help 1374 Support for Freescale LS1012A2G5RDB platform. 1375 The LS1012A 2G5 Reference design board (RDB) is a high-performance 1376 development platform that supports the QorIQ LS1012A 1377 Layerscape Architecture processor. 1378 1379config TARGET_LS1012AFRWY 1380 bool "Support ls1012afrwy" 1381 select ARCH_LS1012A 1382 select ARM64 1383 select ARCH_SUPPORT_TFABOOT 1384 select BOARD_LATE_INIT 1385 imply SCSI 1386 imply SCSI_AHCI 1387 help 1388 Support for Freescale LS1012AFRWY platform. 1389 The LS1012A FRWY board (FRWY) is a high-performance 1390 development platform that supports the QorIQ LS1012A 1391 Layerscape Architecture processor. 1392 1393config TARGET_LS1012AFRDM 1394 bool "Support ls1012afrdm" 1395 select ARCH_LS1012A 1396 select ARM64 1397 select ARCH_SUPPORT_TFABOOT 1398 help 1399 Support for Freescale LS1012AFRDM platform. 1400 The LS1012A Freedom board (FRDM) is a high-performance 1401 development platform that supports the QorIQ LS1012A 1402 Layerscape Architecture processor. 1403 1404config TARGET_LS1028AQDS 1405 bool "Support ls1028aqds" 1406 select ARCH_LS1028A 1407 select ARM64 1408 select ARMV8_MULTIENTRY 1409 select ARCH_SUPPORT_TFABOOT 1410 select BOARD_LATE_INIT 1411 help 1412 Support for Freescale LS1028AQDS platform 1413 The LS1028A Development System (QDS) is a high-performance 1414 development platform that supports the QorIQ LS1028A 1415 Layerscape Architecture processor. 1416 1417config TARGET_LS1028ARDB 1418 bool "Support ls1028ardb" 1419 select ARCH_LS1028A 1420 select ARM64 1421 select ARMV8_MULTIENTRY 1422 select ARCH_SUPPORT_TFABOOT 1423 select BOARD_LATE_INIT 1424 help 1425 Support for Freescale LS1028ARDB platform 1426 The LS1028A Development System (RDB) is a high-performance 1427 development platform that supports the QorIQ LS1028A 1428 Layerscape Architecture processor. 1429 1430config TARGET_LS1088ARDB 1431 bool "Support ls1088ardb" 1432 select ARCH_LS1088A 1433 select ARM64 1434 select ARMV8_MULTIENTRY 1435 select ARCH_SUPPORT_TFABOOT 1436 select BOARD_LATE_INIT 1437 select SUPPORT_SPL 1438 select FSL_DDR_INTERACTIVE if !SD_BOOT 1439 help 1440 Support for NXP LS1088ARDB platform. 1441 The LS1088A Reference design board (RDB) is a high-performance 1442 development platform that supports the QorIQ LS1088A 1443 Layerscape Architecture processor. 1444 1445config TARGET_LS1021AQDS 1446 bool "Support ls1021aqds" 1447 select ARCH_LS1021A 1448 select ARCH_SUPPORT_PSCI 1449 select BOARD_EARLY_INIT_F 1450 select BOARD_LATE_INIT 1451 select CPU_V7A 1452 select CPU_V7_HAS_NONSEC 1453 select CPU_V7_HAS_VIRT 1454 select LS1_DEEP_SLEEP 1455 select SUPPORT_SPL 1456 select SYS_FSL_DDR 1457 select FSL_DDR_INTERACTIVE 1458 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1459 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI 1460 imply SCSI 1461 1462config TARGET_LS1021ATWR 1463 bool "Support ls1021atwr" 1464 select ARCH_LS1021A 1465 select ARCH_SUPPORT_PSCI 1466 select BOARD_EARLY_INIT_F 1467 select BOARD_LATE_INIT 1468 select CPU_V7A 1469 select CPU_V7_HAS_NONSEC 1470 select CPU_V7_HAS_VIRT 1471 select LS1_DEEP_SLEEP 1472 select SUPPORT_SPL 1473 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1474 imply SCSI 1475 1476config TARGET_PG_WCOM_SELI8 1477 bool "Support Hitachi-Powergrids SELI8 service unit card" 1478 select ARCH_LS1021A 1479 select ARCH_SUPPORT_PSCI 1480 select BOARD_EARLY_INIT_F 1481 select BOARD_LATE_INIT 1482 select CPU_V7A 1483 select CPU_V7_HAS_NONSEC 1484 select CPU_V7_HAS_VIRT 1485 select SYS_FSL_DDR 1486 select FSL_DDR_INTERACTIVE 1487 select VENDOR_KM 1488 imply SCSI 1489 help 1490 Support for Hitachi-Powergrids SELI8 service unit card. 1491 SELI8 is a QorIQ LS1021a based service unit card used 1492 in XMC20 and FOX615 product families. 1493 1494config TARGET_PG_WCOM_EXPU1 1495 bool "Support Hitachi-Powergrids EXPU1 service unit card" 1496 select ARCH_LS1021A 1497 select ARCH_SUPPORT_PSCI 1498 select BOARD_EARLY_INIT_F 1499 select BOARD_LATE_INIT 1500 select CPU_V7A 1501 select CPU_V7_HAS_NONSEC 1502 select CPU_V7_HAS_VIRT 1503 select SYS_FSL_DDR 1504 select FSL_DDR_INTERACTIVE 1505 select VENDOR_KM 1506 imply SCSI 1507 help 1508 Support for Hitachi-Powergrids EXPU1 service unit card. 1509 EXPU1 is a QorIQ LS1021a based service unit card used 1510 in XMC20 and FOX615 product families. 1511 1512config TARGET_LS1021ATSN 1513 bool "Support ls1021atsn" 1514 select ARCH_LS1021A 1515 select ARCH_SUPPORT_PSCI 1516 select BOARD_EARLY_INIT_F 1517 select BOARD_LATE_INIT 1518 select CPU_V7A 1519 select CPU_V7_HAS_NONSEC 1520 select CPU_V7_HAS_VIRT 1521 select LS1_DEEP_SLEEP 1522 select SUPPORT_SPL 1523 imply SCSI 1524 1525config TARGET_LS1021AIOT 1526 bool "Support ls1021aiot" 1527 select ARCH_LS1021A 1528 select ARCH_SUPPORT_PSCI 1529 select BOARD_LATE_INIT 1530 select CPU_V7A 1531 select CPU_V7_HAS_NONSEC 1532 select CPU_V7_HAS_VIRT 1533 select SUPPORT_SPL 1534 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1535 imply SCSI 1536 help 1537 Support for Freescale LS1021AIOT platform. 1538 The LS1021A Freescale board (IOT) is a high-performance 1539 development platform that supports the QorIQ LS1021A 1540 Layerscape Architecture processor. 1541 1542config TARGET_LS1043AQDS 1543 bool "Support ls1043aqds" 1544 select ARCH_LS1043A 1545 select ARM64 1546 select ARMV8_MULTIENTRY 1547 select ARCH_SUPPORT_TFABOOT 1548 select BOARD_EARLY_INIT_F 1549 select BOARD_LATE_INIT 1550 select SUPPORT_SPL 1551 select FSL_DDR_INTERACTIVE if !SPL 1552 select FSL_DSPI if !SPL_NO_DSPI 1553 select DM_SPI_FLASH if FSL_DSPI 1554 imply SCSI 1555 imply SCSI_AHCI 1556 help 1557 Support for Freescale LS1043AQDS platform. 1558 1559config TARGET_LS1043ARDB 1560 bool "Support ls1043ardb" 1561 select ARCH_LS1043A 1562 select ARM64 1563 select ARMV8_MULTIENTRY 1564 select ARCH_SUPPORT_TFABOOT 1565 select BOARD_EARLY_INIT_F 1566 select BOARD_LATE_INIT 1567 select SUPPORT_SPL 1568 select FSL_DSPI if !SPL_NO_DSPI 1569 select DM_SPI_FLASH if FSL_DSPI 1570 help 1571 Support for Freescale LS1043ARDB platform. 1572 1573config TARGET_LS1046AQDS 1574 bool "Support ls1046aqds" 1575 select ARCH_LS1046A 1576 select ARM64 1577 select ARMV8_MULTIENTRY 1578 select ARCH_SUPPORT_TFABOOT 1579 select BOARD_EARLY_INIT_F 1580 select BOARD_LATE_INIT 1581 select DM_SPI_FLASH if DM_SPI 1582 select SUPPORT_SPL 1583 select FSL_DDR_BIST if !SPL 1584 select FSL_DDR_INTERACTIVE if !SPL 1585 select FSL_DDR_INTERACTIVE if !SPL 1586 imply SCSI 1587 help 1588 Support for Freescale LS1046AQDS platform. 1589 The LS1046A Development System (QDS) is a high-performance 1590 development platform that supports the QorIQ LS1046A 1591 Layerscape Architecture processor. 1592 1593config TARGET_LS1046ARDB 1594 bool "Support ls1046ardb" 1595 select ARCH_LS1046A 1596 select ARM64 1597 select ARMV8_MULTIENTRY 1598 select ARCH_SUPPORT_TFABOOT 1599 select BOARD_EARLY_INIT_F 1600 select BOARD_LATE_INIT 1601 select DM_SPI_FLASH if DM_SPI 1602 select POWER_MC34VR500 1603 select SUPPORT_SPL 1604 select FSL_DDR_BIST 1605 select FSL_DDR_INTERACTIVE if !SPL 1606 imply SCSI 1607 help 1608 Support for Freescale LS1046ARDB platform. 1609 The LS1046A Reference Design Board (RDB) is a high-performance 1610 development platform that supports the QorIQ LS1046A 1611 Layerscape Architecture processor. 1612 1613config TARGET_LS1046AFRWY 1614 bool "Support ls1046afrwy" 1615 select ARCH_LS1046A 1616 select ARM64 1617 select ARMV8_MULTIENTRY 1618 select ARCH_SUPPORT_TFABOOT 1619 select BOARD_EARLY_INIT_F 1620 select BOARD_LATE_INIT 1621 select DM_SPI_FLASH if DM_SPI 1622 imply SCSI 1623 help 1624 Support for Freescale LS1046AFRWY platform. 1625 The LS1046A Freeway Board (FRWY) is a high-performance 1626 development platform that supports the QorIQ LS1046A 1627 Layerscape Architecture processor. 1628 1629config TARGET_SL28 1630 bool "Support sl28" 1631 select ARCH_LS1028A 1632 select ARM64 1633 select ARMV8_MULTIENTRY 1634 select SUPPORT_SPL 1635 select BINMAN 1636 select DM 1637 select DM_GPIO 1638 select DM_I2C 1639 select DM_MMC 1640 select DM_SPI_FLASH 1641 select DM_ETH 1642 select DM_MDIO 1643 select DM_PCI 1644 select DM_RNG 1645 select DM_RTC 1646 select DM_SCSI 1647 select DM_SERIAL 1648 select DM_SPI 1649 select DM_USB 1650 select SPL_DM if SPL 1651 select SPL_DM_SPI if SPL 1652 select SPL_DM_SPI_FLASH if SPL 1653 select SPL_DM_I2C if SPL 1654 select SPL_DM_MMC if SPL 1655 select SPL_DM_SERIAL if SPL 1656 help 1657 Support for Kontron SMARC-sAL28 board. 1658 1659config TARGET_COLIBRI_PXA270 1660 bool "Support colibri_pxa270" 1661 select CPU_PXA 1662 1663config ARCH_UNIPHIER 1664 bool "Socionext UniPhier SoCs" 1665 select BOARD_LATE_INIT 1666 select DM 1667 select DM_ETH 1668 select DM_GPIO 1669 select DM_I2C 1670 select DM_MMC 1671 select DM_MTD 1672 select DM_RESET 1673 select DM_SERIAL 1674 select DM_USB 1675 select OF_BOARD_SETUP 1676 select OF_CONTROL 1677 select OF_LIBFDT 1678 select PINCTRL 1679 select SPL_BOARD_INIT if SPL 1680 select SPL_DM if SPL 1681 select SPL_LIBCOMMON_SUPPORT if SPL 1682 select SPL_LIBGENERIC_SUPPORT if SPL 1683 select SPL_OF_CONTROL if SPL 1684 select SPL_PINCTRL if SPL 1685 select SUPPORT_SPL 1686 imply CMD_DM 1687 imply DISTRO_DEFAULTS 1688 imply FAT_WRITE 1689 help 1690 Support for UniPhier SoC family developed by Socionext Inc. 1691 (formerly, System LSI Business Division of Panasonic Corporation) 1692 1693config ARCH_STM32 1694 bool "Support STMicroelectronics STM32 MCU with cortex M" 1695 select CPU_V7M 1696 select DM 1697 select DM_SERIAL 1698 imply CMD_DM 1699 1700config ARCH_STI 1701 bool "Support STMicrolectronics SoCs" 1702 select BLK 1703 select CPU_V7A 1704 select DM 1705 select DM_MMC 1706 select DM_RESET 1707 select DM_SERIAL 1708 imply CMD_DM 1709 help 1710 Support for STMicroelectronics STiH407/10 SoC family. 1711 This SoC is used on Linaro 96Board STiH410-B2260 1712 1713config ARCH_STM32MP 1714 bool "Support STMicroelectronics STM32MP Socs with cortex A" 1715 select ARCH_MISC_INIT 1716 select ARCH_SUPPORT_TFABOOT 1717 select BOARD_LATE_INIT 1718 select CLK 1719 select DM 1720 select DM_GPIO 1721 select DM_RESET 1722 select DM_SERIAL 1723 select MISC 1724 select OF_CONTROL 1725 select OF_LIBFDT 1726 select OF_SYSTEM_SETUP 1727 select PINCTRL 1728 select REGMAP 1729 select SUPPORT_SPL 1730 select SYSCON 1731 select SYSRESET 1732 select SYS_THUMB_BUILD 1733 imply SPL_SYSRESET 1734 imply CMD_DM 1735 imply CMD_POWEROFF 1736 imply OF_LIBFDT_OVERLAY 1737 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1738 imply USE_PREBOOT 1739 help 1740 Support for STM32MP SoC family developed by STMicroelectronics, 1741 MPUs based on ARM cortex A core 1742 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). 1743 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot 1744 chain. 1745 SPL is the unsecure FSBL for the basic boot chain. 1746 1747config ARCH_ROCKCHIP 1748 bool "Support Rockchip SoCs" 1749 select BLK 1750 select BINMAN if SPL_OPTEE 1751 select DM 1752 select DM_GPIO 1753 select DM_I2C 1754 select DM_MMC 1755 select DM_PWM 1756 select DM_REGULATOR 1757 select DM_SERIAL 1758 select DM_SPI 1759 select DM_SPI_FLASH 1760 select DM_USB if USB 1761 select ENABLE_ARM_SOC_BOOT0_HOOK 1762 select OF_CONTROL 1763 select SPI 1764 select SPL_DM if SPL 1765 select SPL_DM_SPI if SPL 1766 select SPL_DM_SPI_FLASH if SPL 1767 select SYS_MALLOC_F 1768 select SYS_THUMB_BUILD if !ARM64 1769 imply ADC 1770 imply CMD_DM 1771 imply DEBUG_UART_BOARD_INIT 1772 imply DISTRO_DEFAULTS 1773 imply FAT_WRITE 1774 imply SARADC_ROCKCHIP 1775 imply SPL_SYSRESET 1776 imply SPL_SYS_MALLOC_SIMPLE 1777 imply SYS_NS16550 1778 imply TPL_SYSRESET 1779 imply USB_FUNCTION_FASTBOOT 1780 1781config ARCH_OCTEONTX 1782 bool "Support OcteonTX SoCs" 1783 select CLK 1784 select DM 1785 select ARM64 1786 select OF_CONTROL 1787 select OF_LIVE 1788 select BOARD_LATE_INIT 1789 select SYS_CACHE_SHIFT_7 1790 1791config ARCH_OCTEONTX2 1792 bool "Support OcteonTX2 SoCs" 1793 select CLK 1794 select DM 1795 select ARM64 1796 select OF_CONTROL 1797 select OF_LIVE 1798 select BOARD_LATE_INIT 1799 select SYS_CACHE_SHIFT_7 1800 1801config TARGET_THUNDERX_88XX 1802 bool "Support ThunderX 88xx" 1803 select ARM64 1804 select OF_CONTROL 1805 select PL01X_SERIAL 1806 select SYS_CACHE_SHIFT_7 1807 1808config ARCH_ASPEED 1809 bool "Support Aspeed SoCs" 1810 select DM 1811 select OF_CONTROL 1812 imply CMD_DM 1813 1814config TARGET_DURIAN 1815 bool "Support Phytium Durian Platform" 1816 select ARM64 1817 help 1818 Support for durian platform. 1819 It has 2GB Sdram, uart and pcie. 1820 1821config TARGET_PRESIDIO_ASIC 1822 bool "Support Cortina Presidio ASIC Platform" 1823 select ARM64 1824 1825config TARGET_XENGUEST_ARM64 1826 bool "Xen guest ARM64" 1827 select ARM64 1828 select XEN 1829 select OF_CONTROL 1830 select LINUX_KERNEL_IMAGE_HEADER 1831 select XEN_SERIAL 1832 select SSCANF 1833endchoice 1834 1835config ARCH_SUPPORT_TFABOOT 1836 bool 1837 1838config TFABOOT 1839 bool "Support for booting from TF-A" 1840 depends on ARCH_SUPPORT_TFABOOT 1841 default n 1842 help 1843 Some platforms support the setup of secure registers (for instance 1844 for CPU errata handling) or provide secure services like PSCI. 1845 Those services could also be provided by other firmware parts 1846 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot 1847 does not need to (and cannot) execute this code. 1848 Enabling this option will make a U-Boot binary that is relying 1849 on other firmware layers to provide secure functionality. 1850 1851config TI_SECURE_DEVICE 1852 bool "HS Device Type Support" 1853 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 1854 help 1855 If a high secure (HS) device type is being used, this config 1856 must be set. This option impacts various aspects of the 1857 build system (to create signed boot images that can be 1858 authenticated) and the code. See the doc/README.ti-secure 1859 file for further details. 1860 1861if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE 1862config ISW_ENTRY_ADDR 1863 hex "Address in memory or XIP address of bootloader entry point" 1864 default 0x402F4000 if AM43XX 1865 default 0x402F0400 if AM33XX 1866 default 0x40301350 if OMAP54XX 1867 help 1868 After any reset, the boot ROM searches the boot media for a valid 1869 boot image. For non-XIP devices, the ROM then copies the image into 1870 internal memory. For all boot modes, after the ROM processes the 1871 boot image it eventually computes the entry point address depending 1872 on the device type (secure/non-secure), boot media (xip/non-xip) and 1873 image headers. 1874endif 1875 1876source "arch/arm/mach-aspeed/Kconfig" 1877 1878source "arch/arm/mach-at91/Kconfig" 1879 1880source "arch/arm/mach-bcm283x/Kconfig" 1881 1882source "arch/arm/mach-bcmstb/Kconfig" 1883 1884source "arch/arm/mach-davinci/Kconfig" 1885 1886source "arch/arm/mach-exynos/Kconfig" 1887 1888source "arch/arm/mach-highbank/Kconfig" 1889 1890source "arch/arm/mach-integrator/Kconfig" 1891 1892source "arch/arm/mach-ipq40xx/Kconfig" 1893 1894source "arch/arm/mach-k3/Kconfig" 1895 1896source "arch/arm/mach-keystone/Kconfig" 1897 1898source "arch/arm/mach-kirkwood/Kconfig" 1899 1900source "arch/arm/mach-lpc32xx/Kconfig" 1901 1902source "arch/arm/mach-mvebu/Kconfig" 1903 1904source "arch/arm/mach-octeontx/Kconfig" 1905 1906source "arch/arm/mach-octeontx2/Kconfig" 1907 1908source "arch/arm/cpu/armv7/ls102xa/Kconfig" 1909 1910source "arch/arm/mach-imx/mx2/Kconfig" 1911 1912source "arch/arm/mach-imx/mx3/Kconfig" 1913 1914source "arch/arm/mach-imx/mx5/Kconfig" 1915 1916source "arch/arm/mach-imx/mx6/Kconfig" 1917 1918source "arch/arm/mach-imx/mx7/Kconfig" 1919 1920source "arch/arm/mach-imx/mx7ulp/Kconfig" 1921 1922source "arch/arm/mach-imx/imx8/Kconfig" 1923 1924source "arch/arm/mach-imx/imx8m/Kconfig" 1925 1926source "arch/arm/mach-imx/imxrt/Kconfig" 1927 1928source "arch/arm/mach-imx/mxs/Kconfig" 1929 1930source "arch/arm/mach-omap2/Kconfig" 1931 1932source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" 1933 1934source "arch/arm/mach-orion5x/Kconfig" 1935 1936source "arch/arm/mach-owl/Kconfig" 1937 1938source "arch/arm/mach-rmobile/Kconfig" 1939 1940source "arch/arm/mach-meson/Kconfig" 1941 1942source "arch/arm/mach-mediatek/Kconfig" 1943 1944source "arch/arm/mach-qemu/Kconfig" 1945 1946source "arch/arm/mach-rockchip/Kconfig" 1947 1948source "arch/arm/mach-s5pc1xx/Kconfig" 1949 1950source "arch/arm/mach-snapdragon/Kconfig" 1951 1952source "arch/arm/mach-socfpga/Kconfig" 1953 1954source "arch/arm/mach-sti/Kconfig" 1955 1956source "arch/arm/mach-stm32/Kconfig" 1957 1958source "arch/arm/mach-stm32mp/Kconfig" 1959 1960source "arch/arm/mach-sunxi/Kconfig" 1961 1962source "arch/arm/mach-tegra/Kconfig" 1963 1964source "arch/arm/mach-u8500/Kconfig" 1965 1966source "arch/arm/mach-uniphier/Kconfig" 1967 1968source "arch/arm/cpu/armv7/vf610/Kconfig" 1969 1970source "arch/arm/mach-zynq/Kconfig" 1971 1972source "arch/arm/mach-zynqmp/Kconfig" 1973 1974source "arch/arm/mach-versal/Kconfig" 1975 1976source "arch/arm/mach-zynqmp-r5/Kconfig" 1977 1978source "arch/arm/cpu/armv7/Kconfig" 1979 1980source "arch/arm/cpu/armv8/Kconfig" 1981 1982source "arch/arm/mach-imx/Kconfig" 1983 1984source "arch/arm/mach-nexell/Kconfig" 1985 1986source "board/armltd/total_compute/Kconfig" 1987 1988source "board/bosch/shc/Kconfig" 1989source "board/bosch/guardian/Kconfig" 1990source "board/CarMediaLab/flea3/Kconfig" 1991source "board/Marvell/aspenite/Kconfig" 1992source "board/Marvell/gplugd/Kconfig" 1993source "board/Marvell/octeontx/Kconfig" 1994source "board/Marvell/octeontx2/Kconfig" 1995source "board/armltd/vexpress64/Kconfig" 1996source "board/cortina/presidio-asic/Kconfig" 1997source "board/broadcom/bcm963158/Kconfig" 1998source "board/broadcom/bcm968360bg/Kconfig" 1999source "board/broadcom/bcm968580xref/Kconfig" 2000source "board/broadcom/bcmns3/Kconfig" 2001source "board/cavium/thunderx/Kconfig" 2002source "board/cirrus/edb93xx/Kconfig" 2003source "board/eets/pdu001/Kconfig" 2004source "board/emulation/qemu-arm/Kconfig" 2005source "board/freescale/ls2080aqds/Kconfig" 2006source "board/freescale/ls2080ardb/Kconfig" 2007source "board/freescale/ls1088a/Kconfig" 2008source "board/freescale/ls1028a/Kconfig" 2009source "board/freescale/ls1021aqds/Kconfig" 2010source "board/freescale/ls1043aqds/Kconfig" 2011source "board/freescale/ls1021atwr/Kconfig" 2012source "board/freescale/ls1021atsn/Kconfig" 2013source "board/freescale/ls1021aiot/Kconfig" 2014source "board/freescale/ls1046aqds/Kconfig" 2015source "board/freescale/ls1043ardb/Kconfig" 2016source "board/freescale/ls1046ardb/Kconfig" 2017source "board/freescale/ls1046afrwy/Kconfig" 2018source "board/freescale/ls1012aqds/Kconfig" 2019source "board/freescale/ls1012ardb/Kconfig" 2020source "board/freescale/ls1012afrdm/Kconfig" 2021source "board/freescale/lx2160a/Kconfig" 2022source "board/grinn/chiliboard/Kconfig" 2023source "board/hisilicon/hikey/Kconfig" 2024source "board/hisilicon/hikey960/Kconfig" 2025source "board/hisilicon/poplar/Kconfig" 2026source "board/isee/igep003x/Kconfig" 2027source "board/kontron/sl28/Kconfig" 2028source "board/myir/mys_6ulx/Kconfig" 2029source "board/seeed/npi_imx6ull/Kconfig" 2030source "board/spear/spear300/Kconfig" 2031source "board/spear/spear310/Kconfig" 2032source "board/spear/spear320/Kconfig" 2033source "board/spear/spear600/Kconfig" 2034source "board/spear/x600/Kconfig" 2035source "board/st/stv0991/Kconfig" 2036source "board/tcl/sl50/Kconfig" 2037source "board/toradex/colibri_pxa270/Kconfig" 2038source "board/variscite/dart_6ul/Kconfig" 2039source "board/vscom/baltos/Kconfig" 2040source "board/phytium/durian/Kconfig" 2041source "board/xen/xenguest_arm64/Kconfig" 2042source "board/keymile/Kconfig" 2043 2044source "arch/arm/Kconfig.debug" 2045 2046endmenu 2047 2048config SPL_LDSCRIPT 2049 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK 2050 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 2051 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 2052