1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
5 */
6
7 #include <common.h>
8 #include <init.h>
9 #include <log.h>
10 #include <dm/uclass.h>
11 #include <env.h>
12 #include <env_internal.h>
13 #include <fdtdec.h>
14 #include <fpga.h>
15 #include <malloc.h>
16 #include <mmc.h>
17 #include <watchdog.h>
18 #include <wdt.h>
19 #include <zynqpl.h>
20 #include <asm/global_data.h>
21 #include <asm/arch/hardware.h>
22 #include <asm/arch/sys_proto.h>
23 #include "../common/board.h"
24
25 DECLARE_GLOBAL_DATA_PTR;
26
board_init(void)27 int board_init(void)
28 {
29 if (IS_ENABLED(CONFIG_SPL_BUILD))
30 printf("Silicon version:\t%d\n", zynq_get_silicon_version());
31
32 return 0;
33 }
34
board_late_init(void)35 int board_late_init(void)
36 {
37 int env_targets_len = 0;
38 const char *mode;
39 char *new_targets;
40 char *env_targets;
41
42 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
43 debug("Saved variables - Skipping\n");
44 return 0;
45 }
46
47 if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
48 return 0;
49
50 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
51 case ZYNQ_BM_QSPI:
52 mode = "qspi";
53 env_set("modeboot", "qspiboot");
54 break;
55 case ZYNQ_BM_NAND:
56 mode = "nand";
57 env_set("modeboot", "nandboot");
58 break;
59 case ZYNQ_BM_NOR:
60 mode = "nor";
61 env_set("modeboot", "norboot");
62 break;
63 case ZYNQ_BM_SD:
64 mode = "mmc0";
65 env_set("modeboot", "sdboot");
66 break;
67 case ZYNQ_BM_JTAG:
68 mode = "jtag pxe dhcp";
69 env_set("modeboot", "jtagboot");
70 break;
71 default:
72 mode = "";
73 env_set("modeboot", "");
74 break;
75 }
76
77 /*
78 * One terminating char + one byte for space between mode
79 * and default boot_targets
80 */
81 env_targets = env_get("boot_targets");
82 if (env_targets)
83 env_targets_len = strlen(env_targets);
84
85 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
86 if (!new_targets)
87 return -ENOMEM;
88
89 sprintf(new_targets, "%s %s", mode,
90 env_targets ? env_targets : "");
91
92 env_set("boot_targets", new_targets);
93
94 return board_late_init_xilinx();
95 }
96
97 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
dram_init_banksize(void)98 int dram_init_banksize(void)
99 {
100 return fdtdec_setup_memory_banksize();
101 }
102
dram_init(void)103 int dram_init(void)
104 {
105 if (fdtdec_setup_mem_size_base() != 0)
106 return -EINVAL;
107
108 zynq_ddrc_init();
109
110 return 0;
111 }
112 #else
dram_init(void)113 int dram_init(void)
114 {
115 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
116 CONFIG_SYS_SDRAM_SIZE);
117
118 zynq_ddrc_init();
119
120 return 0;
121 }
122 #endif
123
env_get_location(enum env_operation op,int prio)124 enum env_location env_get_location(enum env_operation op, int prio)
125 {
126 u32 bootmode = zynq_slcr_get_boot_mode() & ZYNQ_BM_MASK;
127
128 if (prio)
129 return ENVL_UNKNOWN;
130
131 switch (bootmode) {
132 case ZYNQ_BM_SD:
133 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
134 return ENVL_FAT;
135 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
136 return ENVL_EXT4;
137 return ENVL_UNKNOWN;
138 case ZYNQ_BM_NAND:
139 if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
140 return ENVL_NAND;
141 if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
142 return ENVL_UBI;
143 return ENVL_UNKNOWN;
144 case ZYNQ_BM_NOR:
145 case ZYNQ_BM_QSPI:
146 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
147 return ENVL_SPI_FLASH;
148 return ENVL_UNKNOWN;
149 case ZYNQ_BM_JTAG:
150 default:
151 return ENVL_NOWHERE;
152 }
153 }
154