1 /* SPDX-License-Identifier: GPL-2.0+ */
2 
3 #ifndef __SL28_H
4 #define __SL28_H
5 
6 #include <asm/arch/stream_id_lsch3.h>
7 #include <asm/arch/config.h>
8 #include <asm/arch/soc.h>
9 
10 /* we don't use hwconfig but this has to be defined.. */
11 #define HWCONFIG_BUFFER_SIZE 256
12 
13 /* we don't have secure memory unless we have a BL31 */
14 #ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
15 #undef CONFIG_SYS_MEM_RESERVE_SECURE
16 #endif
17 
18 /* DDR */
19 #define CONFIG_DDR_ECC
20 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
21 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
22 
23 #define CONFIG_VERY_BIG_RAM
24 #define CONFIG_CHIP_SELECTS_PER_CTRL	4
25 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
26 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
27 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
28 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
29 #define CONFIG_SYS_DDR_BLOCK2_BASE	0x2080000000ULL
30 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	1
31 
32 /* early stack pointer */
33 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
34 
35 /* memtest command */
36 #define CONFIG_SYS_MEMTEST_START        0x80000000
37 #define CONFIG_SYS_MEMTEST_END          0x9fffffff
38 
39 /* SMP */
40 #define CPU_RELEASE_ADDR		secondary_boot_addr
41 
42 /* generic timer */
43 #define COUNTER_FREQUENCY		25000000
44 
45 /* size of malloc() pool */
46 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2048 * 1024)
47 
48 /* early heap for SPL DM */
49 #define CONFIG_MALLOC_F_ADDR		CONFIG_SYS_FSL_OCRAM_BASE
50 
51 /* serial port */
52 #define CONFIG_SYS_NS16550_CLK          (get_bus_freq(0) / 2)
53 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
54 
55 #define CONFIG_SYS_CLK_FREQ		100000000
56 #define CONFIG_DDR_CLK_FREQ		100000000
57 #define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
58 
59 /* ethernet */
60 #define CONFIG_SYS_RX_ETH_BUFFER	8
61 
62 /* SPL */
63 #define CONFIG_SPL_BSS_START_ADDR	0x80100000
64 #define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
65 #define CONFIG_SPL_MAX_SIZE		0x20000
66 #define CONFIG_SPL_STACK		(CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
67 
68 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00100000
69 #define CONFIG_SYS_SPL_MALLOC_START	0x80200000
70 #define CONFIG_SYS_MONITOR_LEN		(1024 * 1024)
71 
72 /* environment */
73 /* see include/configs/ti_armv7_common.h */
74 #define CONFIG_SYS_LOAD_ADDR		0x82000000
75 #define ENV_MEM_LAYOUT_SETTINGS \
76 	"loadaddr=0x82000000\0" \
77 	"kernel_addr_r=0x82000000\0" \
78 	"fdt_addr_r=0x88000000\0" \
79 	"bootm_size=0x10000000\0" \
80 	"pxefile_addr_r=0x80100000\0" \
81 	"scriptaddr=0x80000000\0" \
82 	"ramdisk_addr_r=0x88080000\0"
83 
84 #define BOOT_TARGET_DEVICES(func) \
85 	func(MMC, mmc, 0) \
86 	func(MMC, mmc, 1) \
87 	func(NVME, nvme, 0) \
88 	func(USB, usb, 0) \
89 	func(SCSI, scsi, 0) \
90 	func(DHCP, dhcp, 0) \
91 	func(PXE, pxe, 0)
92 #include <config_distro_bootcmd.h>
93 
94 #define CONFIG_EXTRA_ENV_SETTINGS \
95 	"env_addr=0x203e0004\0" \
96 	"envload=env import -d -b ${env_addr}\0" \
97 	"install_rcw=source 20200000\0" \
98 	"fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
99 	ENV_MEM_LAYOUT_SETTINGS \
100 	BOOTENV
101 
102 #endif /* __SL28_H */
103