1// SPDX-License-Identifier: GPL-2.0+ OR X11 2/* 3 * Copyright 2015 Timesys Corporation. 4 * Copyright 2015 General Electric Company 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2 as published by the Free Software Foundation. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44#include "imx6q-ba16.dtsi" 45 46/ { 47 mclk: clock-mclk { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <22000000>; 51 }; 52 53 gpio-poweroff { 54 compatible = "gpio-poweroff"; 55 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 56 status = "okay"; 57 }; 58 59 reg_wl18xx_vmmc: regulator-wl18xx { 60 compatible = "regulator-fixed"; 61 regulator-name = "vwl1807"; 62 regulator-min-microvolt = <3300000>; 63 regulator-max-microvolt = <3300000>; 64 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>; 65 startup-delay-us = <70000>; 66 enable-active-high; 67 }; 68 69 reg_wlan: regulator-wlan { 70 compatible = "regulator-fixed"; 71 regulator-name = "3P3V_wlan"; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 regulator-always-on; 75 regulator-boot-on; 76 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>; 77 }; 78 79 sound { 80 compatible = "fsl,imx6q-ba16-sgtl5000", 81 "fsl,imx-audio-sgtl5000"; 82 model = "imx6q-ba16-sgtl5000"; 83 ssi-controller = <&ssi1>; 84 audio-codec = <&sgtl5000>; 85 audio-routing = 86 "MIC_IN", "Mic Jack", 87 "Mic Jack", "Mic Bias", 88 "LINE_IN", "Line In Jack", 89 "Headphone Jack", "HP_OUT"; 90 mux-int-port = <1>; 91 mux-ext-port = <4>; 92 }; 93 94 aliases { 95 mdio-gpio0 = &mdio0; 96 }; 97 98 mdio0: mdio-gpio { 99 compatible = "virtual,mdio-gpio"; 100 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */ 101 <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */ 102 103 #address-cells = <1>; 104 #size-cells = <0>; 105 106 switch@0 { 107 compatible = "marvell,mv88e6085"; /* 88e6240*/ 108 reg = <0>; 109 110 switch_ports: ports { 111 #address-cells = <1>; 112 #size-cells = <0>; 113 }; 114 115 mdio { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 119 switchphy0: switchphy@0 { 120 reg = <0>; 121 }; 122 123 switchphy1: switchphy@1 { 124 reg = <1>; 125 }; 126 127 switchphy2: switchphy@2 { 128 reg = <2>; 129 }; 130 131 switchphy3: switchphy@3 { 132 reg = <3>; 133 }; 134 135 switchphy4: switchphy@4 { 136 reg = <4>; 137 }; 138 }; 139 }; 140 }; 141}; 142 143&ecspi5 { 144 cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&pinctrl_ecspi5>; 147 status = "okay"; 148 149 m25_eeprom: m25p80@0 { 150 compatible = "atmel,at25"; 151 spi-max-frequency = <10000000>; 152 size = <0x8000>; 153 pagesize = <64>; 154 reg = <0>; 155 address-width = <16>; 156 }; 157}; 158 159&i2c1 { 160 pinctrl-names = "default", "gpio"; 161 pinctrl-1 = <&pinctrl_i2c1_gpio>; 162 sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; 163 scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; 164 165 pca9547: mux@70 { 166 compatible = "nxp,pca9547"; 167 reg = <0x70>; 168 #address-cells = <1>; 169 #size-cells = <0>; 170 171 mux1_i2c1: i2c@0 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 reg = <0x0>; 175 176 ads7830: ads7830@48 { 177 compatible = "ti,ads7830"; 178 reg = <0x48>; 179 }; 180 181 mma8453: mma8453@1c { 182 compatible = "fsl,mma8453"; 183 reg = <0x1c>; 184 }; 185 }; 186 187 mux1_i2c2: i2c@1 { 188 #address-cells = <1>; 189 #size-cells = <0>; 190 reg = <0x1>; 191 192 eeprom: eeprom@50 { 193 compatible = "atmel,24c08"; 194 reg = <0x50>; 195 }; 196 197 mpl3115: mpl3115@60 { 198 compatible = "fsl,mpl3115"; 199 reg = <0x60>; 200 }; 201 }; 202 203 mux1_i2c3: i2c@2 { 204 #address-cells = <1>; 205 #size-cells = <0>; 206 reg = <0x2>; 207 }; 208 209 mux1_i2c4: i2c@3 { 210 #address-cells = <1>; 211 #size-cells = <0>; 212 reg = <0x3>; 213 214 sgtl5000: codec@a { 215 compatible = "fsl,sgtl5000"; 216 reg = <0x0a>; 217 clocks = <&mclk>; 218 VDDA-supply = <®_1p8v>; 219 VDDIO-supply = <®_3p3v>; 220 }; 221 }; 222 223 mux1_i2c5: i2c@4 { 224 #address-cells = <1>; 225 #size-cells = <0>; 226 reg = <0x4>; 227 228 pca9539: pca9539@74 { 229 compatible = "nxp,pca9539"; 230 reg = <0x74>; 231 gpio-controller; 232 #gpio-cells = <2>; 233 interrupt-controller; 234 interrupt-parent = <&gpio2>; 235 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 236 237 P12 { 238 gpio-hog; 239 gpios = <10 0>; 240 output-low; 241 line-name = "PCA9539-P12"; 242 }; 243 244 P13 { 245 gpio-hog; 246 gpios = <11 0>; 247 output-low; 248 line-name = "PCA9539-P13"; 249 }; 250 251 P14 { 252 gpio-hog; 253 gpios = <12 0>; 254 output-low; 255 line-name = "PCA9539-P14"; 256 }; 257 258 P15 { 259 gpio-hog; 260 gpios = <13 0>; 261 output-low; 262 line-name = "PCA9539-P15"; 263 }; 264 265 P16 { 266 gpio-hog; 267 gpios = <14 0>; 268 output-low; 269 line-name = "PCA9539-P16"; 270 }; 271 272 P17 { 273 gpio-hog; 274 gpios = <15 0>; 275 output-low; 276 line-name = "PCA9539-P17"; 277 }; 278 }; 279 }; 280 281 mux1_i2c6: i2c@5 { 282 #address-cells = <1>; 283 #size-cells = <0>; 284 reg = <0x5>; 285 }; 286 287 mux1_i2c7: i2c@6 { 288 #address-cells = <1>; 289 #size-cells = <0>; 290 reg = <0x6>; 291 }; 292 293 mux1_i2c8: i2c@7 { 294 #address-cells = <1>; 295 #size-cells = <0>; 296 reg = <0x7>; 297 }; 298 }; 299}; 300 301&i2c2 { 302 pinctrl-names = "default", "gpio"; 303 pinctrl-1 = <&pinctrl_i2c2_gpio>; 304 sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; 305 scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; 306}; 307 308&i2c3 { 309 pinctrl-names = "default", "gpio"; 310 pinctrl-1 = <&pinctrl_i2c3_gpio>; 311 sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 312 scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 313}; 314 315&iomuxc { 316 pinctrl_i2c1_gpio: i2c1gpiogrp { 317 fsl,pins = < 318 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0 319 MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0 320 >; 321 }; 322 323 pinctrl_i2c2_gpio: i2c2gpiogrp { 324 fsl,pins = < 325 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0 326 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0 327 >; 328 }; 329 330 pinctrl_i2c3_gpio: i2c3gpiogrp { 331 fsl,pins = < 332 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0 333 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 334 >; 335 }; 336}; 337 338&pmu { 339 secure-reg-access; 340}; 341 342&usdhc2 { 343 status = "disabled"; 344}; 345 346&usdhc4 { 347 pinctrl-names = "default"; 348 pinctrl-0 = <&pinctrl_usdhc4>; 349 bus-width = <4>; 350 vmmc-supply = <®_wl18xx_vmmc>; 351 no-1-8-v; 352 non-removable; 353 wakeup-source; 354 keep-power-in-suspend; 355 cap-power-off-card; 356 max-frequency = <25000000>; 357 #address-cells = <1>; 358 #size-cells = <0>; 359 status = "okay"; 360 361 wlcore: wlcore@2 { 362 compatible = "ti,wl1837"; 363 reg = <2>; 364 interrupt-parent = <&gpio2>; 365 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; 366 tcxo-clock-frequency = <26000000>; 367 }; 368}; 369 370&pcie { 371 /* Synopsys, Inc. Device */ 372 pci_root: root@0,0 { 373 compatible = "pci16c3,abcd"; 374 reg = <0x00000000 0 0 0 0>; 375 376 #address-cells = <3>; 377 #size-cells = <2>; 378 #interrupt-cells = <1>; 379 }; 380}; 381 382#include "imx6q-bx50v3-uboot.dtsi" 383