1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2002 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 #include <common.h> 8 #include <cpu_func.h> 9 10 /* 11 * CPU test 12 * 13 * This test checks the arithmetic logic unit (ALU) of CPU. 14 * It tests independently various groups of instructions using 15 * run-time modification of the code to reduce the memory footprint. 16 * For more details refer to post/cpu/ *.c files. 17 */ 18 19 #include <watchdog.h> 20 #include <post.h> 21 #include <asm/mmu.h> 22 23 #if CONFIG_POST & CONFIG_SYS_POST_CPU 24 25 extern int cpu_post_test_cmp (void); 26 extern int cpu_post_test_cmpi (void); 27 extern int cpu_post_test_two (void); 28 extern int cpu_post_test_twox (void); 29 extern int cpu_post_test_three (void); 30 extern int cpu_post_test_threex (void); 31 extern int cpu_post_test_threei (void); 32 extern int cpu_post_test_andi (void); 33 extern int cpu_post_test_srawi (void); 34 extern int cpu_post_test_rlwnm (void); 35 extern int cpu_post_test_rlwinm (void); 36 extern int cpu_post_test_rlwimi (void); 37 extern int cpu_post_test_store (void); 38 extern int cpu_post_test_load (void); 39 extern int cpu_post_test_cr (void); 40 extern int cpu_post_test_b (void); 41 extern int cpu_post_test_multi (void); 42 extern int cpu_post_test_string (void); 43 extern int cpu_post_test_complex (void); 44 cpu_post_makecr(long v)45ulong cpu_post_makecr (long v) 46 { 47 ulong cr = 0; 48 49 if (v < 0) 50 cr |= 0x80000000; 51 if (v > 0) 52 cr |= 0x40000000; 53 if (v == 0) 54 cr |= 0x20000000; 55 56 return cr; 57 } 58 cpu_post_test(int flags)59int cpu_post_test (int flags) 60 { 61 int ic = icache_status(); 62 int ret = 0; 63 64 WATCHDOG_RESET(); 65 if (ic) 66 icache_disable(); 67 68 if (ret == 0) 69 ret = cpu_post_test_cmp (); 70 if (ret == 0) 71 ret = cpu_post_test_cmpi (); 72 if (ret == 0) 73 ret = cpu_post_test_two (); 74 if (ret == 0) 75 ret = cpu_post_test_twox (); 76 WATCHDOG_RESET(); 77 if (ret == 0) 78 ret = cpu_post_test_three (); 79 if (ret == 0) 80 ret = cpu_post_test_threex (); 81 if (ret == 0) 82 ret = cpu_post_test_threei (); 83 if (ret == 0) 84 ret = cpu_post_test_andi (); 85 WATCHDOG_RESET(); 86 if (ret == 0) 87 ret = cpu_post_test_srawi (); 88 if (ret == 0) 89 ret = cpu_post_test_rlwnm (); 90 if (ret == 0) 91 ret = cpu_post_test_rlwinm (); 92 if (ret == 0) 93 ret = cpu_post_test_rlwimi (); 94 WATCHDOG_RESET(); 95 if (ret == 0) 96 ret = cpu_post_test_store (); 97 if (ret == 0) 98 ret = cpu_post_test_load (); 99 if (ret == 0) 100 ret = cpu_post_test_cr (); 101 if (ret == 0) 102 ret = cpu_post_test_b (); 103 WATCHDOG_RESET(); 104 if (ret == 0) 105 ret = cpu_post_test_multi (); 106 WATCHDOG_RESET(); 107 if (ret == 0) 108 ret = cpu_post_test_string (); 109 if (ret == 0) 110 ret = cpu_post_test_complex (); 111 WATCHDOG_RESET(); 112 113 if (ic) 114 icache_enable(); 115 116 WATCHDOG_RESET(); 117 118 return ret; 119 } 120 121 #endif /* CONFIG_POST & CONFIG_SYS_POST_CPU */ 122