1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 19
4 *
5 * Some assumptions are made:
6 *    * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4)
7 *    * mezzanine card M13 is connected to IO SLOT6 (25g-aui for DPMAC 5,6)
8 *    * mezzanine card M7 is connected to IO SLOT2 (xlaui4 for DPMAC 2)
9 *
10 * Copyright 2020 NXP
11 *
12 */
13
14#include "fsl-lx2160a-qds.dtsi"
15
16&dpmac2 {
17	status = "okay";
18	phy-handle = <&cortina_phy0>;
19	phy-connection-type = "xlaui4";
20};
21
22&dpmac3 {
23	status = "okay";
24	phy-handle = <&aquantia_phy1>;
25	phy-connection-type = "usxgmii";
26};
27
28&dpmac4 {
29	status = "okay";
30	phy-handle = <&aquantia_phy2>;
31	phy-connection-type = "usxgmii";
32};
33
34&dpmac5 {
35	status = "okay";
36	phy-handle = <&inphi_phy0>;
37	phy-connection-type = "25g-aui";
38};
39
40&dpmac6 {
41	status = "okay";
42	phy-handle = <&inphi_phy1>;
43	phy-connection-type = "25g-aui";
44};
45
46&emdio1_slot1 {
47	aquantia_phy1: ethernet-phy@4 {
48		compatible = "ethernet-phy-ieee802.3-c45";
49		reg = <0x0>;
50	};
51
52	aquantia_phy2: ethernet-phy@5 {
53		compatible = "ethernet-phy-ieee802.3-c45";
54		reg = <0x1>;
55	};
56};
57
58&emdio1_slot2 {
59	cortina_phy0: ethernet-phy@0 {
60		compatible = "ethernet-phy-ieee802.3-c45";
61		reg = <0x0>;
62	};
63};
64
65&emdio1_slot6 {
66	inphi_phy0: ethernet-phy@0 {
67		compatible = "ethernet-phy-id0210.7440";
68		reg = <0x0>;
69	};
70
71	inphi_phy1: ethernet-phy@1 {
72		compatible = "ethernet-phy-id0210.7440";
73		reg = <0x1>;
74	};
75};
76