1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * Copyright 2019 Toradex AG
4 */
5
6/dts-v1/;
7#include <dt-bindings/gpio/gpio.h>
8#include "imx6dl.dtsi"
9
10/ {
11	model = "Toradex Colibri iMX6DL/S";
12	compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
13
14	/* Will be filled by the bootloader */
15	memory@10000000 {
16		device_type = "memory";
17		reg = <0x10000000 0>;
18	};
19
20	aliases {
21		mmc0 = &usdhc3;
22		mmc1 = &usdhc1;
23		usb0 = &usbotg; /* required for ums */
24		ethernet0 = &fec;
25	};
26
27	chosen {
28		stdout-path = &uart1;
29	};
30
31	reg_module_3v3: regulator-module-3v3 {
32		compatible = "regulator-fixed";
33		regulator-name = "+V3.3";
34		regulator-min-microvolt = <3300000>;
35		regulator-max-microvolt = <3300000>;
36		regulator-always-on;
37	};
38
39	reg_usb_host_vbus: regulator-usb-host-vbus {
40		compatible = "regulator-fixed";
41		pinctrl-names = "default";
42		pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
43		regulator-name = "usb_host_vbus";
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; /* USBH_PEN */
47	};
48};
49
50&fec {
51	pinctrl-names = "default";
52	pinctrl-0 = <&pinctrl_enet>;
53	phy-mode = "rmii";
54	phy-handle = <&ethphy>;
55	status = "okay";
56
57	mdio {
58		#address-cells = <1>;
59		#size-cells = <0>;
60
61		ethphy: ethernet-phy@0 {
62			reg = <0>;
63			micrel,led-mode = <0>;
64			status = "okay";
65		};
66	};
67};
68
69/*
70 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
71 * touch screen controller
72 */
73&i2c2 {
74	clock-frequency = <100000>;
75	pinctrl-names = "default";
76	pinctrl-0 = <&pinctrl_i2c2>;
77	status = "okay";
78
79	pmic: pfuze100@8 {
80		compatible = "fsl,pfuze100";
81		reg = <0x08>;
82
83		regulators {
84			sw1a_reg: sw1ab {
85				regulator-min-microvolt = <300000>;
86				regulator-max-microvolt = <1875000>;
87				regulator-boot-on;
88				regulator-always-on;
89				regulator-ramp-delay = <6250>;
90			};
91
92			sw1c_reg: sw1c {
93				regulator-min-microvolt = <300000>;
94				regulator-max-microvolt = <1875000>;
95				regulator-boot-on;
96				regulator-always-on;
97				regulator-ramp-delay = <6250>;
98			};
99
100			sw3a_reg: sw3a {
101				regulator-min-microvolt = <400000>;
102				regulator-max-microvolt = <1975000>;
103				regulator-boot-on;
104				regulator-always-on;
105			};
106
107			swbst_reg: swbst {
108				regulator-min-microvolt = <5000000>;
109				regulator-max-microvolt = <5150000>;
110				regulator-boot-on;
111				regulator-always-on;
112			};
113
114			snvs_reg: vsnvs {
115				regulator-min-microvolt = <1000000>;
116				regulator-max-microvolt = <3000000>;
117				regulator-boot-on;
118				regulator-always-on;
119			};
120
121			vref_reg: vrefddr {
122				regulator-boot-on;
123				regulator-always-on;
124			};
125
126			/* vgen1: unused */
127
128			vgen2_reg: vgen2 {
129				regulator-min-microvolt = <800000>;
130				regulator-max-microvolt = <1550000>;
131				regulator-boot-on;
132				regulator-always-on;
133			};
134
135			/* vgen3: unused */
136
137			vgen4_reg: vgen4 {
138				regulator-min-microvolt = <1800000>;
139				regulator-max-microvolt = <1800000>;
140				regulator-boot-on;
141				regulator-always-on;
142			};
143
144			vgen5_reg: vgen5 {
145				regulator-min-microvolt = <1800000>;
146				regulator-max-microvolt = <3300000>;
147				regulator-boot-on;
148				regulator-always-on;
149			};
150
151			vgen6_reg: vgen6 {
152				regulator-min-microvolt = <1800000>;
153				regulator-max-microvolt = <3300000>;
154				regulator-boot-on;
155				regulator-always-on;
156			};
157		};
158	};
159};
160
161/*
162 * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
163 */
164&i2c3 {
165	clock-frequency = <100000>;
166	pinctrl-names = "default", "gpio";
167	pinctrl-0 = <&pinctrl_i2c3>;
168	pinctrl-1 = <&pinctrl_i2c3_recovery>;
169	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
170	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
171	status = "okay";
172};
173
174/* Colibri UART_A */
175&uart1 {
176	pinctrl-names = "default";
177	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
178	fsl,dte-mode;
179	uart-has-rtscts;
180	status = "okay";
181};
182
183/* Colibri UART_B */
184&uart2 {
185	pinctrl-names = "default";
186	pinctrl-0 = <&pinctrl_uart2_dte>;
187	fsl,dte-mode;
188	uart-has-rtscts;
189	status = "okay";
190};
191
192/* Colibri UART_C */
193&uart3 {
194	pinctrl-names = "default";
195	pinctrl-0 = <&pinctrl_uart3_dte>;
196	fsl,dte-mode;
197	status = "okay";
198};
199
200/* Colibri USBH */
201&usbh1 {
202	dr_mode = "host";
203	vbus-supply = <&reg_usb_host_vbus>;
204	status = "okay";
205};
206
207/* Colibri USBC */
208&usbotg {
209	dr_mode = "host";
210	status = "okay";
211};
212
213/* Colibri MMC */
214&usdhc1 {
215	pinctrl-names = "default";
216	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
217	cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
218	disable-wp;
219	vqmmc-supply = <&reg_module_3v3>;
220	bus-width = <4>;
221	no-1-8-v;
222	status = "okay";
223};
224
225/* eMMC */
226&usdhc3 {
227	pinctrl-names = "default";
228	pinctrl-0 = <&pinctrl_usdhc3>;
229	vqmmc-supply = <&reg_module_3v3>;
230	bus-width = <8>;
231	no-1-8-v;
232	non-removable;
233	status = "okay";
234};
235
236&iomuxc {
237	pinctrl_ecspi4: ecspi4grp {
238		fsl,pins = <
239			MX6QDL_PAD_EIM_D22__ECSPI4_MISO	0x100b1
240			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI	0x100b1
241			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK	0x100b1
242			/* SPI CS */
243			MX6QDL_PAD_EIM_A25__GPIO5_IO02	0x000b1
244		>;
245	};
246
247	pinctrl_enet: enetgrp {
248		fsl,pins = <
249			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
250			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
251			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
252			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
253			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
254			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
255			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
256			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
257			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
258			MX6QDL_PAD_GPIO_16__ENET_REF_CLK     ((1<<30) | 0x1b0b0)
259		>;
260	};
261
262	pinctrl_gpio_bl_on: gpioblon {
263		fsl,pins = <
264			MX6QDL_PAD_EIM_D26__GPIO3_IO26	0x1b0b0
265		>;
266	};
267
268	pinctrl_hdmi_ddc: hdmiddcgrp {
269		fsl,pins = <
270			MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL	0x4001b8b1
271			MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA	0x4001b8b1
272		>;
273	};
274
275	pinctrl_i2c2: i2c2grp {
276		fsl,pins = <
277			MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1
278			MX6QDL_PAD_EIM_D16__I2C2_SDA	0x4001b8b1
279		>;
280	};
281
282	pinctrl_i2c3: i2c3grp {
283		fsl,pins = <
284			MX6QDL_PAD_GPIO_3__I2C3_SCL	0x4001b8b1
285			MX6QDL_PAD_GPIO_6__I2C3_SDA	0x4001b8b1
286		>;
287	};
288
289	pinctrl_i2c3_recovery: i2c3recoverygrp {
290		fsl,pins = <
291			MX6QDL_PAD_GPIO_3__GPIO1_IO03	0x4001b8b1
292			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x4001b8b1
293		>;
294	};
295
296	pinctrl_ipu1_lcdif: ipu1lcdifgrp {
297		fsl,pins = <
298			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0xa1
299			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0xa1
300			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0xa1
301			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0xa1
302			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0xa1
303			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0xa1
304			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0xa1
305			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0xa1
306			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0xa1
307			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0xa1
308			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0xa1
309			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0xa1
310			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0xa1
311			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0xa1
312			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0xa1
313			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0xa1
314			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0xa1
315			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0xa1
316			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0xa1
317			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0xa1
318			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0xa1
319			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0xa1
320		>;
321	};
322
323	pinctrl_mmc_cd: gpiommccd {
324		fsl,pins = <
325			MX6QDL_PAD_NANDF_D5__GPIO2_IO05	0x1b0b1
326		>;
327	};
328
329	pinctrl_pwm1: pwm1grp {
330		fsl,pins = <
331			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b1
332		>;
333	};
334
335	pinctrl_pwm2: pwm2grp {
336		fsl,pins = <
337			MX6QDL_PAD_GPIO_1__PWM2_OUT	0x1b0b1
338			MX6QDL_PAD_EIM_A21__GPIO2_IO17	0x00040
339		>;
340	};
341
342	pinctrl_pwm3: pwm3grp {
343		fsl,pins = <
344			MX6QDL_PAD_SD4_DAT1__PWM3_OUT	0x1b0b1
345			MX6QDL_PAD_EIM_A22__GPIO2_IO16	0x00040
346		>;
347	};
348
349	pinctrl_pwm4: pwm4grp {
350		fsl,pins = <
351			MX6QDL_PAD_SD4_DAT2__PWM4_OUT	0x1b0b1
352		>;
353	};
354
355	pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
356		fsl,pins = <
357			/* SODIMM 129 USBH_PEN */
358			MX6QDL_PAD_EIM_D31__GPIO3_IO31	0x0f058
359		>;
360	};
361
362	pinctrl_uart1_dce: uart1dcegrp {
363		fsl,pins = <
364			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
365			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
366		>;
367	};
368
369	/* DTE mode */
370	pinctrl_uart1_dte: uart1dtegrp {
371		fsl,pins = <
372			MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA	0x1b0b1
373			MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA	0x1b0b1
374			MX6QDL_PAD_EIM_D19__UART1_RTS_B		0x1b0b1
375			MX6QDL_PAD_EIM_D20__UART1_CTS_B		0x1b0b1
376		>;
377	};
378
379	/* Additional DTR, DSR, DCD */
380	pinctrl_uart1_ctrl: uart1ctrlgrp {
381		fsl,pins = <
382			MX6QDL_PAD_EIM_D23__UART1_DCD_B	0x1b0b0
383			MX6QDL_PAD_EIM_D24__UART1_DTR_B	0x1b0b0
384			MX6QDL_PAD_EIM_D25__UART1_DSR_B	0x1b0b0
385		>;
386	};
387
388	pinctrl_uart2_dte: uart2dtegrp {
389		fsl,pins = <
390			MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA	0x1b0b1
391			MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA	0x1b0b1
392			MX6QDL_PAD_SD4_DAT6__UART2_RTS_B	0x1b0b1
393			MX6QDL_PAD_SD4_DAT5__UART2_CTS_B	0x1b0b1
394		>;
395	};
396
397	pinctrl_uart3_dte: uart3dtegrp {
398		fsl,pins = <
399			MX6QDL_PAD_SD4_CLK__UART3_TX_DATA	0x1b0b1
400			MX6QDL_PAD_SD4_CMD__UART3_RX_DATA	0x1b0b1
401		>;
402	};
403
404	pinctrl_usdhc1: usdhc1grp {
405		fsl,pins = <
406			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17071
407			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10071
408			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17071
409			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17071
410			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17071
411			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17071
412		>;
413	};
414
415	pinctrl_usdhc3: usdhc3grp {
416		fsl,pins = <
417			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
418			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
419			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
420			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
421			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
422			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
423			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
424			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
425			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
426			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
427			/* eMMC reset */
428			MX6QDL_PAD_SD3_RST__SD3_RESET	0x17059
429		>;
430	};
431};
432