1// SPDX-License-Identifier: GPL-2.0+ 2// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> 3 4/dts-v1/; 5 6#include <dt-bindings/leds/common.h> 7 8#include "o4-imx6ull-nano.dtsi" 9 10/ { 11 model = "O4-iMX-NANO"; 12 compatible = "out4,o4-imx-nano", 13 "out4,o4-imx6ull-nano", 14 "fsl,imx6ull"; 15 16 aliases { 17 mmc1 = &usdhc1; 18 }; 19 20 chosen { 21 stdout-path = &uart1; 22 }; 23 24 leds { 25 compatible = "gpio-leds"; 26 27 led0 { 28 color = <LED_COLOR_ID_RED>; 29 gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>; 30 }; 31 32 led1{ 33 color = <LED_COLOR_ID_GREEN>; 34 gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>; 35 }; 36 37 led2 { 38 gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>; 39 color = <LED_COLOR_ID_BLUE>; 40 }; 41 42 led3 { 43 color = <LED_COLOR_ID_RED>; 44 gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>; 45 }; 46 47 led4{ 48 color = <LED_COLOR_ID_GREEN>; 49 gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>; 50 }; 51 52 led5 { 53 color = <LED_COLOR_ID_BLUE>; 54 gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>; 55 }; 56 }; 57 58 usbotg1_vbus: reg_usbotg1_vbus { 59 compatible = "regulator-fixed"; 60 enable-active-high; 61 gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>; 62 regulator-max-microvolt = <5000000>; 63 regulator-min-microvolt = <5000000>; 64 regulator-name = "usb0"; 65 }; 66 67 usbotg2_vbus: reg_usbotg2_vbus { 68 compatible = "regulator-fixed"; 69 enable-active-high; 70 gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>; 71 regulator-max-microvolt = <5000000>; 72 regulator-min-microvolt = <5000000>; 73 regulator-name = "usb1"; 74 }; 75}; 76 77&iomuxc { 78 pinctrl_uart1: uart1grp { 79 fsl,pins = < 80 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 81 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 82 >; 83 }; 84 85 pinctrl_usdhc1: usdhc1grp { 86 fsl,pins = < 87 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 88 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 89 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 90 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 91 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 92 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 93 MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 94 >; 95 }; 96 97 pinctrl_mdio: mdiogrp { 98 fsl,pins = < 99 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 100 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 101 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ 102 >; 103 }; 104 105 pinctrl_i2c2: i2c2grp { 106 fsl,pins = < 107 MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0 108 MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0 109 >; 110 }; 111 112 pinctrl_i2c2_gpio: i2c2gpiogrp { 113 fsl,pins = < 114 MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0 115 MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0 116 >; 117 }; 118 119 pinctrl_can1: can1grp { 120 fsl,pins = < 121 MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 122 MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 123 >; 124 }; 125 126 pinctrl_uart2: uart2grp { 127 fsl,pins = < 128 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 129 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 130 MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 131 >; 132 }; 133}; 134 135&uart1 { 136 pinctrl-0 = <&pinctrl_uart1>; 137 pinctrl-names = "default"; 138 status = "okay"; 139}; 140 141&usdhc1 { 142 bus-width = <4>; 143 no-1-8-v; 144 pinctrl-0 = <&pinctrl_usdhc1>; 145 pinctrl-names = "default"; 146 status = "okay"; 147 wakeup-source; 148}; 149 150&fec1 { 151 phy-handle = <&phy0>; 152 phy-mode = "rmii"; 153 pinctrl-0 = <&pinctrl_fec1>; 154 pinctrl-names = "default"; 155 status = "okay"; 156}; 157 158&fec2 { 159 phy-handle = <&phy1>; 160 phy-mode = "rmii"; 161 phy-reset-duration = <250>; 162 phy-reset-post-delay = <100>; 163 phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 164 pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>; 165 pinctrl-names = "default"; 166 status = "okay"; 167 168 mdio { 169 #address-cells = <1>; 170 #size-cells = <0>; 171 172 phy0: ethernet-phy@0 { 173 clocks = <&clks IMX6UL_CLK_ENET_REF>; 174 clock-names = "rmii-ref"; 175 interrupt-parent = <&gpio5>; 176 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 177 pinctrl-0 = <&pinctrl_phy0_irq>; 178 pinctrl-names = "default"; 179 reg = <0>; 180 }; 181 182 phy1: ethernet-phy@1 { 183 clocks = <&clks IMX6UL_CLK_ENET2_REF>; 184 clock-names = "rmii-ref"; 185 interrupt-parent = <&gpio5>; 186 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 187 pinctrl-0 = <&pinctrl_phy1_irq>; 188 pinctrl-names = "default"; 189 reg = <1>; 190 }; 191 }; 192}; 193 194&usbotg1 { 195 dr_mode = "host"; 196 status = "okay"; 197 vbus-supply = <&usbotg1_vbus>; 198}; 199 200&usbotg2 { 201 dr_mode = "host"; 202 status = "okay"; 203 vbus-supply = <&usbotg2_vbus>; 204}; 205 206&i2c2 { 207 clock_frequency = <100000>; 208 pinctrl-0 = <&pinctrl_i2c2>; 209 pinctrl-1 = <&pinctrl_i2c2_gpio>; 210 pinctrl-names = "default", "gpio"; 211 scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 212 sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 213 status = "okay"; 214 215 pcf8574a: gpio@38 { 216 compatible = "nxp,pcf8574a"; 217 #gpio-cells = <2>; 218 gpio-controller; 219 reg = <0x38>; 220 }; 221}; 222 223&can1 { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&pinctrl_can1>; 226 status = "okay"; 227}; 228 229&uart2 { 230 linux,rs485-enabled-at-boot-time; 231 pinctrl-0 = <&pinctrl_uart2>; 232 pinctrl-names = "default"; 233 status = "okay"; 234 uart-has-rtscts; 235}; 236