1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13	model = "Bosch AM335x Guardian";
14	compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16	chosen {
17		stdout-path = &uart0;
18		tick-timer = &timer2;
19	};
20
21	cpus {
22		cpu@0 {
23			cpu0-supply = <&dcdc2_reg>;
24		};
25	};
26
27	memory@80000000 {
28		device_type = "memory";
29		reg = <0x80000000 0x10000000>; /* 256 MB */
30	};
31
32	gpio_keys {
33		compatible = "gpio-keys";
34		pinctrl-names = "default";
35		pinctrl-0 = <&guardian_button_pins>;
36
37		select-button {
38			label = "guardian-select-button";
39			linux,code = <KEY_5>;
40			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
41			wakeup-source;
42		};
43
44		power-button {
45			label = "guardian-power-button";
46			linux,code = <KEY_POWER>;
47			gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
48			wakeup-source;
49		};
50	};
51
52	leds {
53		compatible = "gpio-leds";
54		pinctrl-names = "default";
55		pinctrl-0 = <&guardian_led_pins>;
56
57		life-led {
58			label = "guardian:life-led";
59			gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
60			linux,default-trigger = "heartbeat";
61			default-state = "on";
62		};
63	};
64
65	panel {
66		compatible = "ti,tilcdc,panel";
67		pinctrl-names = "default", "sleep";
68		pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
69		pinctrl-1 = <&lcd_pins_sleep>;
70
71		display-timings {
72			320x240 {
73				hactive         = <320>;
74				vactive         = <240>;
75				hback-porch     = <68>;
76				hfront-porch    = <20>;
77				hsync-len       = <1>;
78				vback-porch     = <18>;
79				vfront-porch    = <4>;
80				vsync-len       = <1>;
81				clock-frequency = <9000000>;
82				hsync-active    = <0>;
83				vsync-active    = <0>;
84			};
85		};
86		panel-info {
87			ac-bias           = <255>;
88			ac-bias-intrpt    = <0>;
89			dma-burst-sz      = <16>;
90			bpp               = <24>;
91			bus-width         = <16>;
92			fdd               = <0x80>;
93			sync-edge         = <0>;
94			sync-ctrl         = <1>;
95			raster-order      = <0>;
96			fifo-th           = <0>;
97		};
98
99	};
100
101	pwm7: dmtimer-pwm {
102		compatible = "ti,omap-dmtimer-pwm";
103		ti,timers = <&timer7>;
104		pinctrl-names = "default";
105		pinctrl-0 = <&dmtimer7_pins>;
106	};
107
108	vmmcsd_fixed: regulator-3v3 {
109		compatible = "regulator-fixed";
110		regulator-name = "vmmcsd_fixed";
111		regulator-min-microvolt = <3300000>;
112		regulator-max-microvolt = <3300000>;
113	};
114};
115
116&cppi41dma  {
117	status = "okay";
118};
119
120&elm {
121	status = "okay";
122};
123
124&gpmc {
125	pinctrl-names = "default";
126	pinctrl-0 = <&nandflash_pins>;
127	ranges = <0 0 0x08000000 0x1000000>;  /* CS0: 16MB for NAND */
128	status = "okay";
129
130	nand@0,0 {
131		compatible = "ti,omap2-nand";
132		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
133		interrupt-parent = <&gpmc>;
134		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
135			     <1 IRQ_TYPE_NONE>; /* termcount */
136		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
137		ti,nand-ecc-opt = "bch16";
138		ti,elm-id = <&elm>;
139		nand-bus-width = <8>;
140		gpmc,device-width = <1>;
141		gpmc,sync-clk-ps = <0>;
142		gpmc,cs-on-ns = <0>;
143		gpmc,cs-rd-off-ns = <30>;
144		gpmc,cs-wr-off-ns = <30>;
145		gpmc,adv-on-ns = <0>;
146		gpmc,adv-rd-off-ns = <30>;
147		gpmc,adv-wr-off-ns = <30>;
148		gpmc,we-on-ns = <0>;
149		gpmc,we-off-ns = <15>;
150		gpmc,oe-on-ns = <1>;
151		gpmc,oe-off-ns = <15>;
152		gpmc,access-ns = <30>;
153		gpmc,rd-cycle-ns = <30>;
154		gpmc,wr-cycle-ns = <30>;
155		gpmc,wait-on-read = "true";
156		gpmc,wait-on-write = "true";
157		gpmc,bus-turnaround-ns = <0>;
158		gpmc,cycle2cycle-delay-ns = <0>;
159		gpmc,clk-activation-ns = <0>;
160		gpmc,wait-monitoring-ns = <0>;
161		gpmc,wr-access-ns = <0>;
162		gpmc,wr-data-mux-bus-ns = <0>;
163
164		/*
165		 * MTD partition table
166		 *
167		 * All SPL-* partitions are sized to minimal length which can
168		 * be independently programmable. For NAND flash this is equal
169		 * to size of erase-block.
170		 */
171		#address-cells = <1>;
172		#size-cells = <1>;
173
174		partition@0 {
175			label = "SPL";
176			reg = <0x0 0x40000>;
177		};
178
179		partition@1 {
180			label = "SPL.backup1";
181			reg = <0x40000  0x40000>;
182		};
183
184		partition@2 {
185			label = "SPL.backup2";
186			reg = <0x80000  0x40000>;
187		};
188
189		partition@3 {
190			label = "SPL.backup3";
191			reg = <0xc0000  0x40000>;
192		};
193
194		partition@4 {
195			label = "u-boot";
196			reg = <0x100000 0x100000>;
197		};
198
199		partition@5 {
200			label = "u-boot.backup1";
201			reg = <0x200000 0x100000>;
202		};
203
204		partition@6 {
205			label = "u-boot-2";
206			reg = <0x300000 0x100000>;
207		};
208
209		partition@7 {
210			label = "u-boot-2.backup1";
211			reg = <0x400000 0x100000>;
212		};
213
214		partition@8 {
215			label = "u-boot-env";
216			reg = <0x500000 0x40000>;
217		};
218
219		partition@9 {
220			label = "u-boot-env.backup1";
221			reg = <0x540000 0x40000>;
222		};
223
224		partition@10 {
225			label = "splash-screen";
226			reg = <0x580000 0x40000>;
227		};
228
229		partition@11 {
230			label = "UBI";
231			reg = <0x5c0000 0x1fa40000>;
232		};
233	};
234};
235
236&i2c0 {
237	pinctrl-names = "default";
238	pinctrl-0 = <&i2c0_pins>;
239	clock-frequency = <400000>;
240	status = "okay";
241
242	tps: tps@24 {
243		reg = <0x24>;
244	};
245};
246
247&lcdc {
248	blue-and-red-wiring = "crossed";
249	status = "okay";
250};
251
252&mmc1 {
253	bus-width = <0x4>;
254	pinctrl-names = "default";
255	pinctrl-0 = <&mmc1_pins>;
256	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
257	vmmc-supply = <&vmmcsd_fixed>;
258	status = "okay";
259};
260
261&rtc {
262	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
263	clock-names = "ext-clk", "int-clk";
264	system-power-controller;
265};
266
267&spi0 {
268	ti,pindir-d0-out-d1-in;
269	pinctrl-names = "default";
270	pinctrl-0 = <&spi0_pins>;
271	status = "okay";
272};
273
274/include/ "tps65217.dtsi"
275
276&tps {
277	ti,pmic-shutdown-controller;
278	interrupt-parent = <&intc>;
279	interrupts = <7>; /* NMI */
280
281	backlight {
282		isel = <1>;  /* 1 - ISET1, 2 ISET2 */
283		fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
284		default-brightness = <100>;
285	};
286
287	regulators {
288		dcdc1_reg: regulator@0 {
289			regulator-name = "vdds_dpr";
290			regulator-always-on;
291		};
292
293		dcdc2_reg: regulator@1 {
294			regulator-name = "vdd_mpu";
295			regulator-min-microvolt = <925000>;
296			regulator-max-microvolt = <1351500>;
297			regulator-boot-on;
298			regulator-always-on;
299		};
300
301		dcdc3_reg: regulator@2 {
302			regulator-name = "vdd_core";
303			regulator-min-microvolt = <925000>;
304			regulator-max-microvolt = <1150000>;
305			regulator-boot-on;
306			regulator-always-on;
307		};
308
309		ldo1_reg: regulator@3 {
310			regulator-name = "vio,vrtc,vdds";
311			regulator-always-on;
312		};
313
314		ldo2_reg: regulator@4 {
315			regulator-name = "vdd_3v3aux";
316			regulator-always-on;
317		};
318
319		ldo3_reg: regulator@5 {
320			regulator-name = "vdd_1v8";
321			regulator-min-microvolt = <1800000>;
322			regulator-max-microvolt = <1800000>;
323			regulator-always-on;
324		};
325
326		ldo4_reg: regulator@6 {
327			regulator-name = "vdd_3v3a";
328			regulator-always-on;
329		};
330	};
331};
332
333&tscadc {
334	status = "okay";
335
336	adc {
337		ti,adc-channels = <0 1 2 3 4 5 6>;
338	};
339};
340
341&uart0 {
342	pinctrl-names = "default";
343	pinctrl-0 = <&uart0_pins>;
344	status = "okay";
345};
346
347&uart2 {
348	pinctrl-names = "default";
349	pinctrl-0 = <&uart2_pins>;
350	status = "okay";
351};
352
353&usb {
354	status = "okay";
355};
356
357&usb_ctrl_mod {
358	status = "okay";
359};
360
361&usb0 {
362	dr_mode = "peripheral";
363	status = "okay";
364};
365
366&usb0_phy {
367	status = "okay";
368};
369
370&usb1 {
371	dr_mode = "host";
372	status = "okay";
373};
374
375&usb1_phy {
376	status = "okay";
377};
378
379&am33xx_pinmux {
380	pinctrl-names = "default";
381	pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
382
383	clkout2_pin: pinmux_clkout2_pin {
384		pinctrl-single,pins = <
385			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
386		>;
387	};
388
389	dmtimer7_pins: pinmux_dmtimer7_pins {
390		pinctrl-single,pins = <
391			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
392		>;
393	};
394
395	guardian_button_pins: pinmux_gpio_keys_pins {
396		pinctrl-single,pins = <
397			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
398			AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7)
399		>;
400	};
401
402	guardian_interface_pins: pinmux_guardian_interface_pins {
403		pinctrl-single,pins = <
404			AM33XX_IOPAD(0x928, PIN_OUTPUT          | MUX_MODE7)
405			AM33XX_IOPAD(0x990, PIN_OUTPUT          | MUX_MODE7)
406			AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
407			AM33XX_IOPAD(0x980, PIN_INPUT           | MUX_MODE7)
408			AM33XX_IOPAD(0x984, PIN_INPUT           | MUX_MODE7)
409			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP   | MUX_MODE7)
410			AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
411			AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
412			AM33XX_IOPAD(0x91c, PIN_INPUT           | MUX_MODE7)
413			AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
414		>;
415	};
416
417	i2c0_pins: pinmux_i2c0_pins {
418		pinctrl-single,pins = <
419			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
420			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
421		>;
422	};
423
424	lcd_disen_pins: pinmux_lcd_disen_pins {
425		pinctrl-single,pins = <
426			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
427		>;
428	};
429
430	lcd_pins_default: pinmux_lcd_pins_default {
431		pinctrl-single,pins = <
432			AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
433			AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
434			AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
435			AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
436			AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
437			AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
438			AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
439			AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
440			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
441			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
442			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
443			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
444			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
445			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
446			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
447			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
448			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
449			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
450			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
451			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
452			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
453			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
454			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
455			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
456			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
457			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
458			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
459			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
460		>;
461	};
462
463	lcd_pins_sleep: pinmux_lcd_pins_sleep {
464		pinctrl-single,pins = <
465			AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
466			AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
467			AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
468			AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
469			AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
470			AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
471			AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
472			AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
473			AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
474			AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
475			AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
476			AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
477			AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
478			AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
479			AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
480			AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
481			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
482			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
483			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
484			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
485		>;
486	};
487
488	guardian_led_pins: pinmux_leds_pins {
489		pinctrl-single,pins = <
490			AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
491		>;
492	};
493
494	mmc1_pins: pinmux_mmc1_pins {
495		pinctrl-single,pins = <
496			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
497			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
498			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
499			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
500			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
501			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
502			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
503		>;
504	};
505
506	spi0_pins: pinmux_spi0_pins {
507		pinctrl-single,pins = <
508			AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
509			AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
510			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
511			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
512		>;
513	};
514
515	uart0_pins: pinmux_uart0_pins {
516		pinctrl-single,pins = <
517			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
518			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
519		>;
520	};
521
522	uart2_pins: pinmux_uart2_pins {
523		pinctrl-single,pins = <
524			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
525			AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
526		>;
527	};
528
529	nandflash_pins: pinmux_nandflash_pins {
530		pinctrl-single,pins = <
531			AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
532			AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
533			AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
534			AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
535			AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
536			AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
537			AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
538			AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
539			AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
540			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
541			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
542			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
543			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
544			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
545			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
546		>;
547	};
548};
549